Patents by Inventor Yoshihiro Hirota

Yoshihiro Hirota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030158437
    Abstract: A magnesium halide salt of a 2-alkyl-2-adamantanol is reacted with a carboxylic acid halide such as acrylic chloride or the like in the presence of a tertiary amine to produce a 2-alkyl-2-adamantyl ester (the first invention).
    Type: Application
    Filed: January 27, 2003
    Publication date: August 21, 2003
    Inventors: Masao Yamaguchi, Yoshihiro Hirota, Hiromasa Yamamoto
  • Publication number: 20030120107
    Abstract: There is provided a method for obtaining an alkyladamantyl ester efficiently by distilling and purifying a crude alkyladamantyl ester containing impurities which decompose the alkyladamantyl ester without decomposing the alkyladamantyl ester.
    Type: Application
    Filed: November 22, 2002
    Publication date: June 26, 2003
    Inventors: Hiromasa Yamamoto, Masao Yamaguchi, Yoshihiro Hirota, Takashi Kobayakawa
  • Publication number: 20030120106
    Abstract: This invention discloses a process for preparing an 2-alkyl-2-adamantyl ester comprising the steps of combining a solution or suspension of 2-adamantanone and an alkyl halide with lithium metal for reacting them to generate an lithium 2-alkyl-2-adamantyl alcoholate, and then reacting the lithium 2-alkyl-2-adamantyl alcoholate with an acid halide.
    Type: Application
    Filed: November 18, 2002
    Publication date: June 26, 2003
    Inventors: Masao Yamaguchi, Hideki Kikuchi, Yoshihiro Hirota
  • Publication number: 20030109747
    Abstract: A high-purity alicyclic ketone which is a raw material for an alkyl-substituted alicyclic ester such as an alkyl adamantyl ester compound which is useful as a resist raw material can be obtained by a simple operation such as extraction without a special purification step such as distillation or recrystallization. In this process, when an alicyclic hydrocarbon is oxidized with concentrated sulfuric acid or fuming sulfuric acid, the reaction solution after oxidation is poured into water and a solid is extracted with an organic solvent, the concentration of sulfuric acid in the water layer at the time of extraction is adjusted to 60 to 90 wt % to carry out extraction so as to obtain an alicyclic ketone.
    Type: Application
    Filed: October 28, 2002
    Publication date: June 12, 2003
    Inventors: Masao Yamaguchi, Hiromasa Yamamoto, Hideki Kikuchi, Yoshihiro Hirota, Atsushi Kadokura, Takashi Matsumura
  • Publication number: 20020171454
    Abstract: A second operational amplifier (11) of a core unit (1) shorts an inverting input terminal and an output terminal. A signal line (19) is connected to a non-inverting input terminal. A capacitive sensor (18) is connected to the signal line (19). A first operational amplifier (12) earths the non-inverting input terminal. One end of a first resistance (15) and one end of a second resistance (16) are respectively connected to the inverting input terminal. The other end of the first resistance (15) is connected to an alternate current voltage generator (14). The other end of the second resistance (16) is connected to the output terminal of the first operational amplifier (11). A signal output terminal (21) of the core unit (1) is connected to an inverting amplification device (2). An alternate output terminal (22) of the core unit (1) and an inverting output terminal (42) of the inverting amplification device (2) are connected to an addition device (3).
    Type: Application
    Filed: December 3, 2001
    Publication date: November 21, 2002
    Inventors: Masami Yakabe, Toshiyuki Matsumoto, Yoshihiro Hirota, Kouichi Nakano
  • Patent number: 6373264
    Abstract: An apparatus for detecting an impedance variable in response to a sensed physical amount of a sensor is provided which comprises an impedance-frequency conversion unit and a counter. The impedance-frequency conversion unit converts the sensor impedance to an oscillation signal a frequency of which corresponds to the sensor impedance. The impedance-frequency conversion unit comprises an impedance-voltage converter for providing a voltage corresponding to the sensor impedance, and a Wien bridge oscillator including an element an impedance of which varies in response to the voltage from the impedance-voltage converter, for generating the oscillation signal. The Wien bridge oscillator is capable of generating a square wave signal as the oscillation signal. The counter counts the number of waves (or wave number) of the oscillation signal in a predetermined time period to output a count value which can be handled as a digital signal.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: April 16, 2002
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Toshiyuki Matsumoto, Yoshihiro Hirota, Muneo Harada, Takaya Miyano
  • Patent number: 6348809
    Abstract: There is provided a probing and measurement system for measuring a capacitance value of a capacitance to be measured, by removing any influence made by a parasitic capacitance and a fluctuation thereof within a shield box 11. The probing and measurement system comprises a prober 1, a signal line having one end to be in contact with a sample to be measured, a shield line surrounding the signal line, and a capacitance measurement circuit 6. The capacitance measurement circuit 6 comprises an operational amplifier 61 having an inverting input terminal connected to the other end of the signal line and a non-inverting input terminal connected to the shield line, wherein an imaginary short state exists between the inverting input terminal and the non-inverting input terminal, and wherein a signal having a value corresponding to an electrostatic capacitance of the sample to be measured is outputted when an AC signal is applied to the non-inverting input terminal.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: February 19, 2002
    Assignee: Sumitomo Metal Industries Limited
    Inventors: Yoshihiro Hirota, Toshiyuki Matsumoto
  • Patent number: 6335642
    Abstract: A impedance-to-voltage converter for converting an impedance of a target to a voltage is described which comprises an operational amplifier (OP), a coaxial cable consisting a signal line and shielding element(s), and an AC signal generator. A feedback impedance circuit is connected between output and inverting terminals of the OP, and whereby a non-inverting terminal and the inverting terminal are an imaginal-short condition. One end of the signal line is connected to the inverting input terminal of the OP and the other end is connected to one electrode of the target and the AC signal generator is connected to the non-inverting input terminal of the OP. The shielding element comprises at least one shielding layer surrounding the signal line and is connected to the non-inverting input terminal of the OP, and thus the signal line and the shielding layer are the same voltage due to the imaginal-short of the input terminals of the OP, resulting in reduction of noise on the signal line.
    Type: Grant
    Filed: September 22, 1999
    Date of Patent: January 1, 2002
    Assignees: Sumitomo Metal Industries Limited, Hokuto Electronics Inc.
    Inventors: Tatsuo Hiroshima, Koichi Nakano, Muneo Harada, Toshiyuki Matsumoto, Yoshihiro Hirota
  • Patent number: 6331780
    Abstract: A static capacitance-to-voltage converter is capable of converting a static capacitance into a voltage without suffering from a stray capacitance formed between a signal and a shielding line or a stray capacitance formed between an exposed portion of the signal line and its surroundings. The static capacitance-to-voltage converter is formed of an operational amplifier placed in an imaginary short-circuit state between an inverting input and a non-inverting input thereof; a signal line having one end connected to the inverting input and the other end capable of being connected to a static capacitance; a shielding line surrounding the signal line and connected to the non-inverting input; an alternating current signal generator for applying the non-inverting input with an alternating current signal; and zero adjusters for adjusting the output of the static capacitance-to-voltage converter to minimum when no static capacitance is connected to the signal line.
    Type: Grant
    Filed: September 23, 1999
    Date of Patent: December 18, 2001
    Assignee: Sumitomo Metal Industries Ltd.
    Inventors: Tatsuo Hiroshima, Koichi Nakano, Muneo Harada, Toshiyuki Matsumoto, Yoshihiro Hirota
  • Patent number: 6326795
    Abstract: A detection circuit which is capable of outputting a voltage proportional to a static capacitance of a sensor is provided, which comprises a voltage input terminal connected to receive an input voltage and an operational amplifier. The input voltage received at the voltage input terminal is changed between two different reference voltages. An inverting input terminal of the amplifier is connected to the voltage input terminal through a resistor, and a non-inverting input terminal of the amplifier is connected to the voltage input terminal through the sensor capacitance and to one of the reference voltages through a switch. An output voltage of the amplifier is connected to the inverting input terminal through a feedback circuit including a resistor and a switch. The switches are closed and the one of the reference voltages is supplied to the input terminal during an initialization cycle. The switches are opened and the other reference voltage is supplied to the input terminal during a measurement cycle.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: December 4, 2001
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Toshiyuki Matsumoto, Yoshihiro Hirota, Muneo Harada, Takaya Miyano
  • Patent number: 6194888
    Abstract: An impedance-to-voltage converter utilizes an operational amplifier to convert an impedance into a voltage without suffering from the influence of stray capacitances. The impedance-to-voltage converter is formed of an operational amplifier which has an imaginary short-circuit state between an inverting input and a non-inverting input thereof when an impedance element is connected between an output and the inverting input, a shielding line for shielding a line for connecting the impedance element to the inverting input, an AC signal generator connected to the non-inverting input, and a shielding line for shielding the signal line. The shielding lines are connected to the non-inverting input.
    Type: Grant
    Filed: October 4, 1999
    Date of Patent: February 27, 2001
    Assignee: Sumitomo Metal Industries Limited
    Inventors: Toshiyuki Matsumoto, Yoshihiro Hirota, Muneo Harada
  • Patent number: 6034549
    Abstract: A level shift circuit consisting MOSFETs is provided which comprises at least two bias voltage supply circuits and a driver circuit cascaded between input and output terminals of the level shift circuit. The first stage of the bias voltage supply circuits receives an input voltage and the last stage thereof supplies a level-shifted voltage to the driver circuit. The driver circuit includes N- and P-channel transistors. Gates of the transistors of the driver circuit receive the level-shifted voltage from the bias voltage supply circuits and the input voltage, respectively. Sources of the transistors of the driver circuit are commonly connected to the output terminal to provide an output voltage.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: March 7, 2000
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Toshiyuki Matsumoto, Yoshihiro Hirota
  • Patent number: 5973538
    Abstract: A small sensor circuit with reducible electric power consumption is formed by connecting inverting amplifiers comprised of CMOS inverters connected in an odd number of stages, in series to guarantee the linearity of the relationship between inputs and outputs, and connecting an impedance as a sensor between the inputs and outputs, or to an input.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: October 26, 1999
    Assignee: Sumitomo Medal Industries, Ltd.
    Inventors: Guoliang Shou, Kazunori Motohashi, Shengmin Lin, Makoto Yamamoto, Toshiyuki Matsumoto, Muneo Harada, Takahiko Ooasa, Yoshihiro Hirota
  • Patent number: 5892266
    Abstract: The present invention reduces parasitic capacitance in a capacitive element distribution system by running unit electrode lead lines and common electrode lead lines in different directions so that the conductor lines may be sufficiently separated to suppress parasitic capacitance.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: April 6, 1999
    Assignees: Sumitomo Metal Industries, Ltd., Yozan, Inc.
    Inventors: Yoshihiro Hirota, Toshiyuki Matsumoto, Guoliang Shou, Kazunori Motohashi
  • Patent number: 5305176
    Abstract: An inductive load drive circuit includes a transistor having a collector and emitter current path interposed between an inductive load and a constant current source, and a feedback circuit. The feedback circuit has a Zener diode and a resistor which are connected with each other in series. The feedback circuit is connected between the collector and the base of the transistor. A speed-up capacitor is connected in parallel with the resistor and in series with the base of the transistor.
    Type: Grant
    Filed: October 9, 1991
    Date of Patent: April 19, 1994
    Assignee: NEC Corporation
    Inventor: Yoshihiro Hirota
  • Patent number: 5217849
    Abstract: A two-layer film carrier for TAB is made from a substrate prepared by forming a copper layer on a polyimide film by additive plating. A photoresist layer is formed on the copper layer, and another photoresist layer on the polyimide film. Both of the photoresist layers are simultaneously exposed to light through a mask applied to each of them to define a desired pattern. The exposed portions of the photoresist layer on the copper layer are subjected to development and postbaking, whereby selected portions of the copper layer are exposed. The exposed portions of the copper layer are additive plated with copper, whereby leads are formed. The exposed portions of the photoresist layer on the polyimide film are subjected to development and postbaking, whereby selected portions of the polyimide film are exposed. The remaining portions of the photoresist layer are removed from the copper layer and the underlying copper layer is etched.
    Type: Grant
    Filed: February 18, 1992
    Date of Patent: June 8, 1993
    Assignee: Sumitomo Metal Mining Company Limited
    Inventors: Takeshi Chonan, Yoshihiro Hirota, Yuko Kudo