Patents by Inventor Yoshihiro Nakao

Yoshihiro Nakao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080008181
    Abstract: In the case of a “distributed” integrated network node (architecture), a specific judgment process cannot be executed in any routing and transferring unit. The routing and transferring unit has been required to share such judgment process related information with an enhanced processing unit or with other routing and transferring units. Thus the manufacturing cost has increased when using an enhanced processing unit and the processing speed has been lowered unavoidably when cooperation is required among routing and transferring units. Those have been conventional problems. Furthermore, if any flow is disposed during a transfer from a packet transferring unit provided in a routing and transferring unit to a processing unit, the packet is disposed regardless of the packet priority. This has also been another conventional problem.
    Type: Application
    Filed: February 26, 2007
    Publication date: January 10, 2008
    Inventors: Masaki Yamada, Mitsuru Nagasaka, Takayuki Muranaka, Yoshihiro Nakao, Shinichi Akahane
  • Publication number: 20070300126
    Abstract: An information processing device implements error control including at least one of error detection and error correction. The device comprises an information bit sequence acquiring unit and an encoder. The information bit sequence acquiring unit acquires an information bit sequence. The encoder generates a redundant bit sequence enabling execution of error control of the entire information bit sequence, the redundant bit sequence being generated through encoding by a predetermined code based on the information bit sequence and generates a codeword that includes the information bit sequence and the redundant bit sequence. The encoder generates the redundant bit sequence in such a way that one or more bits contained in the redundant bit sequence each functions as a parity bit for one of a plurality of divided information bit sequences produced by dividing the information bit sequence.
    Type: Application
    Filed: February 21, 2007
    Publication date: December 27, 2007
    Inventors: Yoshihiro Nakao, Isao Kimura
  • Publication number: 20070042410
    Abstract: Provided herein are a method for selecting a gene participating in the desired brewing character and compiling a database of the whole genome sequence of industrial yeast; identifying a gene participating in a brewing characteristic from the database; functional analysis of the gene; and a DNA array of the whole genome sequences of an industrial yeast. Also provided are a method for yeast breeding; a method of producing an alcoholic beverage with improved quality; and a screening method to identify genes that increase productivity and/or improve flavor in the production of an alcohol or an alcoholic beverage by (A) analyzing a whole industrial yeast genome sequence, (B) comparing the genome sequence with the genome sequence of S. cerevisiae, (C) selecting a gene of the industrial yeast encoding having 70 to 97% identity to an amino acid sequence of S. cerevisiae; and (D) analyzing the selected gene.
    Type: Application
    Filed: August 7, 2006
    Publication date: February 22, 2007
    Inventors: Yoshihiro Nakao, Norihisa Nakamura, Yukiko Kodama, Tomoko Fujimura, Toshihiko Ashikari
  • Patent number: 7145960
    Abstract: A transmitter apparatus has a modulator for modulating a carrier wave to produce a modulated wave having communication data superimposed thereon and a transmitter for transmitting the modulated wave to a receiver apparatus. Before starting communication, the transmitter apparatus transmits a predetermined dummy pulse to the receiver apparatus so as to bring the communication data restored by demodulation in the receiver apparatus into a logic state in which the communication data should be kept when no communication is taking place. This makes it possible to perform correct communication even if the communication data demodulated in the receiver apparatus before the start of communication is not kept in the logic state in which it should be kept when no communication is taking place.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: December 5, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Haruhiko Shigemasa, Yoshihiro Nakao
  • Patent number: 7109764
    Abstract: A PLL clock signal generation circuit comprising a phase comparator, a charge pump circuit, a filter circuit, a voltage control oscillator and a divider, wherein a multiple rate control circuit is further included which detects a state of the reference voltage (output from a filter circuit) and controls a change of a multiple rate of a divider according to a state of the detected reference voltage. The multiple rate control circuit further outputs control signal LPFOUT for changing a multiple rate so that the PLL clock signal generation circuit does not deviate from a region capable of locking when being detected of deviation from the region capable of locking by detecting the state of reference voltage.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: September 19, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuhiko Sakamoto, Yoshihiro Nakao
  • Publication number: 20060099612
    Abstract: An object of the present invention is to provide a method for analyzing gene of an industrial yeast. The method of the present invention comprises (a) analyzing the genome sequence of the industrial yeast; and (c-1) selecting a gene of the industrial yeast encoding an amino acid sequence having 70 to 97% identity to an amino acid sequence encoded by the gene of Saccharomyces cerevisiae, or (c-2) selecting a gene of the industrial yeast consisting of a nucleotide sequence having 60 to 94% identity to the nucleotide sequence of the gene of Saccharomyces cerevisiae.
    Type: Application
    Filed: September 2, 2005
    Publication date: May 11, 2006
    Inventors: Yoshihiro Nakao, Norihisa Nakamura, Yukiko Kodama, Tomoko Fujimura, Toshihiko Ashikari
  • Publication number: 20060046253
    Abstract: An object of the present invention is to provide a method for analyzing gene of an industrial yeast. The method of the present invention comprises (a) determining the whole genome sequence of the industrial yeast; and (c-1) selecting a gene of the industrial yeast encoding an amino acid sequence having 70 to 97% identity to an amino acid sequence encoded by the gene of Saccharomyces cerevisiae, or (c-2) selecting a gene of the industrial yeast consisting of a nucleotide sequence having 60 to 94% identity to the nucleotide sequence of the gene of Saccharomyces cerevisiae.
    Type: Application
    Filed: September 2, 2004
    Publication date: March 2, 2006
    Applicant: SUNTORY LIMITED
    Inventors: Yoshihiro Nakao, Norihisa Nakamura, Yukiko Kodama, Tomoko Fujimura, Toshihiko Ashikari
  • Publication number: 20050099235
    Abstract: A PLL clock signal generation circuit comprising a phase comparator, a charge pump circuit, a filter circuit, a voltage control oscillator and a divider, wherein a multiple rate control circuit is further included which detects a state of the reference voltage (output from a filter circuit) and controls a change of a multiple rate of a divider according to a state of the detected reference voltage. The multiple rate control circuit further outputs control signal LPFOUT for changing a multiple rate so that the PLL clock signal generation circuit does not deviate from a region capable of locking when being detected of deviation from the region capable of locking by detecting the state of reference voltage.
    Type: Application
    Filed: November 9, 2004
    Publication date: May 12, 2005
    Inventors: Yasuhiko Sakamoto, Yoshihiro Nakao
  • Patent number: 6889905
    Abstract: An electromagnetic coupling characteristic adjustment method for adjusting an electromagnetic coupling characteristic between a reader/writer device and an IC card which are used in a non-contact communication system in which a power transmission antenna coil provided in the reader/writer device and a power receiving antenna coil provided in the IC card are electromagnetically coupled so that the reader/writer device supplies power to the IC card without contact with the IC card. The power supply device includes adjustment impedance elements respectively connected in series and in parallel with the power transmission antenna coil. Impedances of these adjustment impedance elements are determined so that the semiconductor device receives greatest power when a power supply distance, which is a distance between the power transmission antenna coil and the power receiving antenna coil, has a predetermined value not less than 0.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: May 10, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Haruhiko Shigemasa, Yoshihiro Nakao
  • Publication number: 20040265862
    Abstract: The present invention provides (A) a method for the selection of genes participating in the desired brewing character, which comprises preparing a database compiling the data of the whole genome sequence of industrial yeast, particularly a brewing yeast used for alcoholic beverages; selecting gene participating in a desired brewing character that the brewing yeast specifically possesses; and carrying out functional analysis of the gene by disruption or overexpression; (B) a DNA array in which oligonucleotide(s) selected based on the data base compiling the data of the whole genome sequences of an industrial yeast, (C) a breeding method for constructing improved cultures achieving the desired brewing character, (D) a method for producing an alcohol or an alcoholic beverage in which productivity and quality are improved using the yeast, (E) a gene which is specific to the improved brewing yeast, and (F) a peptide encoded by the gene.
    Type: Application
    Filed: March 4, 2004
    Publication date: December 30, 2004
    Applicant: SUNTORY LIMITED
    Inventors: Yoshihiro Nakao, Norihisa Nakamura, Yukiko Kodama, Tomoko Fujimura, Toshihiko Ashikari
  • Publication number: 20040095291
    Abstract: An electromagnetic coupling characteristic adjustment method for adjusting an electromagnetic coupling characteristic between a reader/writer device and an IC card which are used in a non-contact communication system in which a power transmission antenna coil provided in the reader/writer device and a power receiving antenna coil provided in the IC card are electromagnetically coupled so that the reader/writer device supplies power to the IC card without contact with the IC card. The power supply device includes adjustment impedance elements respectively connected in series and in parallel with the power transmission antenna coil. Impedances of these adjustment impedance elements are determined so that the semiconductor device receives greatest power when a power supply distance, which is a distance between the power transmission antenna coil and the power receiving antenna coil, has a predetermined value not less than 0.
    Type: Application
    Filed: November 12, 2003
    Publication date: May 20, 2004
    Inventors: Haruhiko Shigemasa, Yoshihiro Nakao
  • Patent number: 6737884
    Abstract: A power-on reset circuit includes a first reset circuit, a second reset circuit, and an NOR circuit. The first reset circuit detects VCC2V supplied to a logic section so as to produce a first reset signal RST1, and the second reset circuit detects REGIN voltage, which is an output voltage of a rectifying circuit that rectifies power voltage obtained from an external power supply source, so as to produce a second reset signal RST2. The NOR circuit outputs either the RST1 or the RST2 as a reset signal P-RST. The above arrangement can provide the power-on reset circuit which outputs a reliable and effective reset signal even in case where the rising of power obtained from the external power supply source varies.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: May 18, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Haruhiko Shigemasa, Yoshihiro Nakao
  • Patent number: 6665259
    Abstract: An optical disk apparatus includes a carriage, an actuator for performing focus and tracking control, a first lens supported by the actuator, and a suspension member mounted on the carriage. The optical disk apparatus also includes a slider attached to the suspension member to be brought into facing relation to a storage disk. A second lens is supported by the slider to be associated with the first lens. The optical disk apparatus further includes optical axis adjusting means separate from the actuator. The adjusting means is designed to move the first and the second lenses to each other in parallel to the disk member.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: December 16, 2003
    Assignee: Fujitsu Limted
    Inventor: Yoshihiro Nakao
  • Publication number: 20030123370
    Abstract: The magneto-optical recording and reproducing apparatus comprises a laser source, a collimator lens, an objective lens, a magneto-optical recording medium, a servo signal detector, a reproduction signal detector, a signal separating polarization beam splitter, a data recording polarization beam splitter and a data reproducing polarization beam splitter. The data recording polarization beam splitter and the data reproducing polarization beam splitter are disposed on a rotatable PBS holder so that the positions of the beam splitters can be changed according to whether the apparatus is for reproducing data or for recording data. With the apparatus, the quantity of light emitted from the laser source can be reduced since the optical path efficiency of the laser beam to the medium is enhanced at the time of recording, and carrier-output/noise ratio C/N can be increased at the time of reproducing.
    Type: Application
    Filed: March 14, 2002
    Publication date: July 3, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Yoshihiro Nakao, Haruhiko Izumi
  • Publication number: 20030123567
    Abstract: A transmitter apparatus has a modulator for modulating a carrier wave to produce a modulated wave having communication data superimposed thereon and a transmitter for transmitting the modulated wave to a receiver apparatus. Before starting communication, the transmitter apparatus transmits a predetermined dummy pulse to the receiver apparatus so as to bring the communication data restored by demodulation in the receiver apparatus into a logic state in which the communication data should be kept when no communication is taking place. This makes it possible to perform correct communication even if the communication data demodulated in the receiver apparatus before the start of communication is not kept in the logic state in which it should be kept when no communication is taking place.
    Type: Application
    Filed: November 7, 2002
    Publication date: July 3, 2003
    Inventors: Haruhiko Shigemasa, Yoshihiro Nakao
  • Publication number: 20030020525
    Abstract: A power-on reset circuit includes a first reset circuit, a second reset circuit, and an NOR circuit. The first reset circuit detects VCC2V supplied to a logic section so as to produce a first reset signal RST1, and the second reset circuit detects REGIN voltage, which is an output voltage of a rectifying circuit that rectifies power voltage obtained from an external power supply source, so as to produce a second reset signal RST2. The NOR circuit outputs either the RST1 or the RST2 as a reset signal P-RST. The above arrangement can provide the power-on reset circuit which outputs a reliable and effective reset signal even in case where the rising of power obtained from the external power supply source varies.
    Type: Application
    Filed: July 30, 2002
    Publication date: January 30, 2003
    Inventors: Haruhiko Shigemasa, Yoshihiro Nakao
  • Patent number: 6447888
    Abstract: A ceramic wiring board provided with an insulating layer of a high dielectric constant formed of a ceramic sintered product having a high dielectric constants wherein the ceramic sintered product contains a crystal phase of lanthanum titanate and a glass phase present on the grain boundaries of the crystal phase, and has a coefficient of thermal expansion at 40 to 400° C. of not smaller than 8×10−6/° C. and a specific inductive capacity at 1 MHz of not smaller than 10. The wiring board contains a capacitor and is very useful in realizing various electric circuit devices in small sizes, and can be further reliably mounted on a printed board that uses an organic resin as an insulating material.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: September 10, 2002
    Assignee: Kyocera Corporation
    Inventors: Shinichi Suzuki, Kenichi Nagae, Yoshihiro Nakao, Masanari Kokubu, Masahiko Higashi
  • Patent number: 6348427
    Abstract: A glass ceramic sintered product obtained by sintering a mixture powder containing a BaO-containing glass, metal oxide particles having a coefficient of linear thermal expansion at 40 to 400° C. of not smaller than 6 ppm/°C., and a Zr compound and, particularly, containing the Zr compound in an amount of from 0.1 to 30% by weight calculated as Zr02, and exhibiting a coefficient of linear thermal expansion at 40 to 400° C. of from 8.5 to 18 ppm/°C. The glass ceramic sintered product exhibits excellent resistance against chemicals and does not discolor even when subjected to treatment with an acidic or alkaline solution in the step of plating. A wiring board using the glass ceramic sintered product as an insulating substrate exhibits a coefficient of linear thermal expansion substantially similar to that of an external circuit board, effectively suppressing the occurrence of thermal stress and cracking.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: February 19, 2002
    Assignee: Kyocera Corporation
    Inventors: Noriaki Hamada, Hideto Yonekura, Kenichi Nagae, Youji Furukubo, Yoshihiro Nakao, Masahiko Higashi
  • Patent number: 6320832
    Abstract: A method and device for controlling a power of pulsed light is provided, which is emitted by a light source, condensed by a object lens and irradiated to a recording medium for recording information in the recording medium. In order to use the power more efficiently under the limitation of the maximum output of the light source and the maximum efficiency of condensing light in the optical system, the method includes steps of performing test writing with the pulsed light having a fixed bottom power and variable peak power, calculating an optimum average power in accordance with the bottom power and the peak power of the optimum condition obtained by the test writing step, and recalculating the peak power and the bottom power in accordance with the optimum average power so that the peak power is decreased and the bottom power is increased.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: November 20, 2001
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Nakao, Haruhiko Izumi
  • Publication number: 20010022237
    Abstract: A ceramic wiring board provided with an insulating layer of a high dielectric constant formed of a ceramic sintered product having a high dielectric constants wherein the ceramic sintered product contains a crystal phase of lanthanum titanate and a glass phase present on the grain boundaries of the crystal phase, and has a coefficient of thermal expansion at 40 to 400° C. of not smaller than 8×10−6/° C. and a specific inductive capacity at 1 MHz of not smaller than 10. The wiring board contains a capacitor and is very useful in realizing various electric circuit devices in small sizes, and can be further reliably mounted on a printed board that uses an organic resin as an insulating material.
    Type: Application
    Filed: January 30, 2001
    Publication date: September 20, 2001
    Applicant: KYOCERA CORPORATION
    Inventors: Shinichi Suzuki, Kenichi Nagae, Yoshihiro Nakao, Masanari Kokubu, Masahiko Higashi