Patents by Inventor Yoshihiro Ueda

Yoshihiro Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200046205
    Abstract: An endoscope aid attachably and detachably attached to a treatment tool insertion channel of an endoscope includes a flexible tubular-member longer than a total length of the treatment tool insertion channel. The tubular-member has a treatment tool insertion pipe line and a suction pipe line. A distal end part of the tubular-member has a sliding contact part that has an outer periphery coming in sliding contact with an inner peripheral surface of an outlet portion of the treatment tool insertion channel maintained in the shape of a straight pipe irrespective of bending of a bending part of the endoscope and is disposed in the outlet portion, and an extending part that extends from the sliding contact part to a distal end side and is disposed to protrude from an outlet of the treatment tool insertion channel. A distal-end-side opening of the suction pipe line is provided in the extending part.
    Type: Application
    Filed: July 19, 2019
    Publication date: February 13, 2020
    Applicant: FUJIFILM Corporation
    Inventor: Yoshihiro UEDA
  • Publication number: 20200026145
    Abstract: An IQ optical modulator including: a parent Mach-Zehnder type (MZM) optical waveguide; child MZM optical waveguides constituting two arms of the parent MZM; two electrode transmission lines provided along the two arms of the child MZM, respectively, and receiving modulation signal to phase-modulate an optical signal; an RF extension line connected to the two electrode transmission lines, respectively; a first optical splitter branching light into the two arms of the parent MZM; a second optical splitter branching light into the two arms of the child MZM; and a first optical multiplexer multiplexing light from the two arms of the child MZM, wherein stripe direction of the child MZM optical waveguide is same as the RF extension line, the second optical splitter, and the first optical multiplexer, and is orthogonal to the first optical splitter.
    Type: Application
    Filed: March 20, 2018
    Publication date: January 23, 2020
    Inventors: Yoshihiro Ogiso, Josuke Ozaki, Yuta Ueda
  • Publication number: 20200005053
    Abstract: A line detector apparatus and method on a vehicle for detecting a line on a road with a higher degree of accuracy. The vehicle includes front, right-side and left-side image capturing sensors mounted on a vehicle and respectively capture an image, including a road surface, at the front and right and left sides of the vehicle to respectively generate front, right-side and left-side images. The line detector includes a processor that calculates a line on a road as a first line from the front image, the line on the road as a second line from the right-side image, and the line on the road as a third line from the left-side image. The processor selects one of multiple mutually-different algorithms based on the first to third lines, and calculates the line on the road based on the first to third lines by using the selected algorithm.
    Type: Application
    Filed: June 21, 2019
    Publication date: January 2, 2020
    Applicant: MAZDA MOTOR CORPORATION
    Inventors: Junki TAMARU, Takayuki MORITANI, Hiroyuki UEDA, Hideaki TAMAZUMI, Yoshihiro YAMAMOTO
  • Patent number: 10513257
    Abstract: An ignition switch is turned on, and when an abnormality is detected in any of electronic control instruments or sensors, real failure is established, and a fail-safe process is performed. After a lapse of a predetermined period from the establishment of the real failure, fault determination is established, a failure level is sent, and a hybrid fail-safe process is performed. Then, when the abnormality is eliminated, the real failure is not established, and the fail-safe process of an engine is finished. Then, when the ignition switch is turned off and then again turned on, sending of the failure level to a hybrid control unit is stopped, and the hybrid fail-safe process is finished.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: December 24, 2019
    Assignee: MITSUBISHI JIDOSHA KOGYO KABUSHIKI KAISHA
    Inventors: Yoshihiro Omi, Katsunori Ueda, Kazunori Handa, Masayuki Takagaki, Dairoku Ishii
  • Patent number: 10507230
    Abstract: A composition having tissue repair activity, which is capable of promoting reactions associated with tissue repair, contains at least one selected from the group consisting of a first component that is a protein having a monocyte chemotactic protein-1 (MCP-1) activity, a second component that is a protein having the extracellular domain activity of sialic acid-binding immunoglobulin-type lectin-9 (Siglec-9), and a third component that is at least one of chondroitin sulfate and chondroitin sulfate proteoglycan.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: December 17, 2019
    Assignee: TOKUSHIMA UNIVERSITY
    Inventors: Akihito Yamamoto, Minoru Ueda, Kohki Matsubara, Akio Suzumura, Koichi Furukawa, Yoshihiro Matsushita, Hirotaka Wakayama, Nobunori Takahashi, Shin Tsunekawa, Takako Izumoto
  • Publication number: 20190377365
    Abstract: A vehicle management apparatus includes: a communication unit communicating with a vehicle with lodging capability; a vehicle management control unit creating a travel plan based on information transmitted from a use terminal operated by a user, and managing travel of the vehicle; and an emergency vehicle management unit managing so that an emergency vehicle is deployed at a position so as to arrive at a route, on which the vehicle moves according to the travel plan, within a predetermined arrival time.
    Type: Application
    Filed: April 15, 2019
    Publication date: December 12, 2019
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Katsuya TERAHATA, Yushi SEKI, Yoshihiro SAKAYANAGI, Koichi UEDA, Shuntaro SHINOHARA, Ryoko HASHIMOTO
  • Patent number: 10482941
    Abstract: According to one embodiment, a magnetic memory device includes a first memory portion, a first conductive portion, a first interconnection, and a controller. The first memory portion includes a first magnetic portion including a first portion and a second portion, a first magnetic layer, and a first nonmagnetic layer provided between the second portion and the first magnetic layer. The first conductive portion is electrically connected to the first portion. The first interconnection is electrically connected to the first magnetic layer. The controller is electrically connected to the first conductive portion and the first interconnection. The controller applies a first pulse having a first pulse height and a first pulse length between the first conductive portion and the first interconnection in a first write operation and applies a second pulse having a second pulse height and a second pulse length in a first shift operation.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: November 19, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Takuya Shimada, Yasuaki Ootera, Tsuyoshi Kondo, Nobuyuki Umetsu, Michael Arnaud Quinsat, Masaki Kado, Susumu Hashimoto, Shiho Nakamura, Hideaki Aochi, Tomoya Sanuki, Shinji Miyano, Yoshihiro Ueda, Yuichi Ito, Yasuhito Yoshimizu
  • Patent number: 10460783
    Abstract: A magnetic storage device includes a magnetic storage thin line including a linear magnetic body having first and second magnetic domains whose magnetization directions are variable, a magnetoresistance effect element having a first resistance according to the magnetization direction of the first magnetic domain or a second resistance according to the magnetization direction of the second magnetic domain, and a read circuit that compares the first resistance of the magnetoresistance effect element with the second resistance of the magnetoresistance effect element. The read circuit outputs first data when the first resistance and the second resistance correspond to the same low or high resistance state and outputs second data when the first resistance and the second resistance correspond to different low/high resistance states.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: October 29, 2019
    Assignee: Toshiba Memory Corporation
    Inventor: Yoshihiro Ueda
  • Patent number: 10446249
    Abstract: According to one embodiment, a magnetic memory device includes a first interconnect, a second interconnect, a first memory portion, and a controller. The first memory portion is provided between the first and second interconnects. The controller is electrically connected with the first and second interconnects. The first memory portion includes a first magnetic member, a first magnetic element, and a first non-linear element. The first magnetic element is provided between the first magnetic member and the second interconnect in a first current path between the first and second interconnects. The first non-linear element is provided between the first magnetic element and the second interconnect in the first current path. The controller is configured to supply a first shift current in the first current path in a first shift operation. The controller is configured to supply a first reading current in the first current path in a first reading operation.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: October 15, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Michael Arnaud Quinsat, Yasuaki Ootera, Tsuyoshi Kondo, Nobuyuki Umetsu, Takuya Shimada, Masaki Kado, Susumu Hashimoto, Shiho Nakamura, Hideaki Aochi, Tomoya Sanuki, Shinji Miyano, Yoshihiro Ueda, Yuichi Ito, Yasuhito Yoshimizu
  • Patent number: 10446212
    Abstract: According to one embodiment, a magnetic memory device includes a first magnetic portion, a first electrode, a second electrode, a third electrode, a second magnetic portion, a first nonmagnetic portion, and a controller. The first magnetic portion includes an extension portion and a third portion. The extension portion includes a first portion and a second portion. The third portion is connected to the second portion. The first electrode is electrically connected to the first portion. At least a portion of the third portion is positioned between the second electrode and the third electrode. The second magnetic portion is provided between the second electrode and the at least a portion of the third portion. The first nonmagnetic portion is provided between the second magnetic portion and the at least a portion of the third portion. The controller is electrically connected to the first, second electrode, and third electrodes.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: October 15, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Susumu Hashimoto, Yasuaki Ootera, Tsuyoshi Kondo, Takuya Shimada, Michael Arnaud Quinsat, Masaki Kado, Nobuyuki Umetsu, Shiho Nakamura, Tomoya Sanuki, Yoshihiro Ueda, Shinji Miyano, Hideaki Aochi, Yasuhito Yoshimizu, Yuichi Ito
  • Patent number: 10438011
    Abstract: According to an aspect of the invention, an information processing apparatus includes a monitoring unit and a control unit. The monitoring unit monitors movement of each document being correlated with a score indicating how much the document includes pieces of personal information. The control unit controls the movement of the document monitored by the monitoring unit when a relationship among an importance degree of personal information of a movement source, an importance degree of personal information of a movement destination, and the score of the document which is a target to be moved corresponds to a predetermined relationship in a case where the document having the score larger than a predetermined threshold value or greater than or equal to the predetermined threshold value is set to the target to be moved.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: October 8, 2019
    Assignee: FUJI XEROX CO., LTD.
    Inventor: Yoshihiro Ueda
  • Publication number: 20190287598
    Abstract: According to one embodiment, a magnetic memory device includes a first memory portion, a first conductive portion, a first interconnection, and a controller. The first memory portion includes a first magnetic portion including a first portion and a second portion, a first magnetic layer, and a first nonmagnetic layer provided between the second portion and the first magnetic layer. The first conductive portion is electrically connected to the first portion. The first interconnection is electrically connected to the first magnetic layer. The controller is electrically connected to the first conductive portion and the first interconnection. The controller applies a first pulse having a first pulse height and a first pulse length between the first conductive portion and the first interconnection in a first write operation and applies a second pulse having a second pulse height and a second pulse length in a first shift operation.
    Type: Application
    Filed: September 12, 2018
    Publication date: September 19, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Takuya SHIMADA, Yasuaki OOTERA, Tsuyoshi KONDO, Nobuyuki UMETSU, Michael Arnaud QUINSAT, Masaki KADO, Susumu HASHIMOTO, Shiho NAKAMURA, Hideaki AOCHI, Tomoya SANUKI, Shinji MIYANO, Yoshihiro UEDA, Yuichi ITO, Yasuhito YOSHIMIZU
  • Publication number: 20190287637
    Abstract: According to one embodiment, a magnetic memory device includes a first interconnect, a second interconnect, a first memory portion, and a controller. The first memory portion is provided between the first and second interconnects. The controller is electrically connected with the first and second interconnects. The first memory portion includes a first magnetic member, a first magnetic element, and a first non-linear element. The first magnetic element is provided between the first magnetic member and the second interconnect in a first current path between the first and second interconnects. The first non-linear element is provided between the first magnetic element and the second interconnect in the first current path. The controller is configured to supply a first shift current in the first current path in a first shift operation. The controller is configured to supply a first reading current in the first current path in a first reading operation.
    Type: Application
    Filed: September 4, 2018
    Publication date: September 19, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Michael Arnaud Quinsat, Yasuaki Ootera, Tsuyoshi Kondo, Nobuyuki Umetsu, Takuya Shimada, Masaki Kado, Susumu Hashimoto, Shiho Nakamura, Hideaki Aochi, Tomoya Sanuki, Shinji Myano, Yoshihiro Ueda, Yuichi Ito, Yasuhito Yoshimizu
  • Publication number: 20190287593
    Abstract: A magnetic storage device includes a magnetic storage thin line including a linear magnetic body having first and second magnetic domains whose magnetization directions are variable, a magnetoresistance effect element having a first resistance according to the magnetization direction of the first magnetic domain or a second resistance according to the magnetization direction of the second magnetic domain, and a read circuit that compares the first resistance of the magnetoresistance effect element with the second resistance of the magnetoresistance effect element. The read circuit outputs first data when the first resistance and the second resistance correspond to the same low or high resistance state and outputs second data when the first resistance and the second resistance correspond to different low/high resistance states.
    Type: Application
    Filed: August 27, 2018
    Publication date: September 19, 2019
    Inventor: Yoshihiro UEDA
  • Patent number: 10403381
    Abstract: According to one embodiment, a magnetic memory device includes a first magnetic member, a first electrode, a first magnetic layer, a first non-magnetic layer, a first conductive layer and a controller. The first magnetic member includes a first extending portion and a third magnetic portion. The first extending portion includes first and second magnetic portions. The third magnetic portion is connected with the second magnetic portion. The first electrode is electrically connected with the first magnetic portion. The first non-magnetic layer is provided between the first magnetic layer and at least a part of the third magnetic portion. The first conductive layer includes first and second conductive portions, and a third conductive portion being between the first conductive portion and the second conductive portion. The controller is electrically connected with the first electrode, the first magnetic layer, the first conductive portion and the second conductive portion.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: September 3, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Michael Arnaud Quinsat, Takuya Shimada, Susumu Hashimoto, Nobuyuki Umetsu, Yasuaki Ootera, Masaki Kado, Tsuyoshi Kondo, Shiho Nakamura, Tomoya Sanuki, Yoshihiro Ueda, Yuichi Ito, Shinji Miyano, Hideaki Aochi, Yasuhito Yoshimizu
  • Patent number: 10354739
    Abstract: According to one embodiment, a magnetic memory device includes a first magnetic portion, a first magnetic layer, a first nonmagnetic layer, a second magnetic portion, a second magnetic layer, a second nonmagnetic layer, a first electrode, and a second electrode. The first magnetic portion includes a first magnetic part and a second magnetic part. The first nonmagnetic layer is provided between the first magnetic layer and the first magnetic part. The second magnetic portion includes a third magnetic part and a fourth magnetic part. The second nonmagnetic layer is provided between the second magnetic layer and the third magnetic part. The first electrode electrically is connected to the second magnetic part and the fourth magnetic part. The second electrode is electrically connected to the first magnetic part and the third magnetic part.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: July 16, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Yasuaki Ootera, Tsuyoshi Kondo, Nobuyuki Umetsu, Michael Arnaud Quinsat, Takuya Shimada, Masaki Kado, Susumu Hashimoto, Shiho Nakamura, Hideaki Aochi, Tomoya Sanuki, Shinji Miyano, Yoshihiro Ueda, Yuichi Ito, Yasuhito Yoshimizu
  • Publication number: 20190197041
    Abstract: An answerer extraction system includes a receiving unit that receives a question from an asker, a recording unit that records a reference history of the asker's referencing past questions or answers, and an extraction unit that extracts an answerer who is to answer the question on the basis of the reference history of the asker.
    Type: Application
    Filed: March 1, 2019
    Publication date: June 27, 2019
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Akio YAMASHITA, Yoshihiro Ueda
  • Patent number: 10311932
    Abstract: According to one embodiment, a magnetic memory device includes a magnetic portion, a first magnetic layer, a first nonmagnetic layer, a first element portion, first to third interconnects, and a controller. In a first operation, the controller sets the first interconnect to a first potential, the second interconnect to a second potential, and the third interconnect to a third potential. An absolute value of a difference between the second potential and the third potential is greater than that between the first potential and the third potential. In a second operation, the controller sets the first interconnect to a fourth potential, the second interconnect to a fifth potential, and the third interconnect to a sixth potential. An absolute value of a difference between the fifth potential and the sixth potential is less than that between the fourth potential and the sixth potential.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: June 4, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Nobuyuki Umetsu, Tsuyoshi Kondo, Yasuaki Ootera, Takuya Shimada, Michael Arnaud Quinsat, Masaki Kado, Susumu Hashimoto, Shiho Nakamura, Tomoya Sanuki, Yoshihiro Ueda, Yuichi Ito, Shinji Miyano, Hideaki Aochi, Yasuhito Yoshimizu
  • Patent number: 10300475
    Abstract: A circumferential coating material which is coated on a circumferential surface of a honeycomb structure monolithically formed by extrusion, to form a circumferential coating layer, the circumferential coating material containing fused silica in a range of 20 to 75 mass %, containing a color developing agent in a range of 5 to 50 mass %, containing colloidal silica in a range of 5 to 30 mass %, and further containing a silicon based water repellent agent in a range of 1 to 10 mass % to a total mass of the fused silica, the color developing agent, and the colloidal silica.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: May 28, 2019
    Assignee: NGK Insulators, Ltd.
    Inventors: Shuji Ueda, Shungo Nagai, Takayoshi Shibayama, Yoshihiro Sato, Makoto Murai, Kojiro Hayashi
  • Patent number: 10304902
    Abstract: According to one embodiment, a magnetic memory device includes a first magnetic member, a first magnetic layer, and a first nonmagnetic layer. The first magnetic member includes a first extension portion and a third portion. The first extension portion extends along a first direction and includes a first portion and a second portion. The third portion is connected to the second portion. A direction from the first portion toward the second portion is aligned with the first direction. At least a portion of the third portion is tilted with respect to the first direction. The first nonmagnetic layer is provided between the first magnetic layer and the at least a portion of the third portion. The first nonmagnetic layer is provided along the at least a portion of the third portion and is tilted with respect to the first direction.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: May 28, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Masaki Kado, Tsuyoshi Kondo, Yasuaki Ootera, Takuya Shimada, Michael Arnaud Quinsat, Nobuyuki Umetsu, Susumu Hashimoto, Shiho Nakamura, Hideaki Aochi, Tomoya Sanuki, Shinji Miyano, Yoshihiro Ueda, Yuichi Ito, Yasuhito Yoshimizu