Patents by Inventor Yoshihisa Hatta

Yoshihisa Hatta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190035975
    Abstract: The semiconductor light-emitting element substrate is provided with: a reference surface which includes a flat surface parallel to a crystal plane of the material of the semiconductor light-emitting element substrate; and a plurality of protrusions which protrude from the reference surface, the protrusions being arranged on a two-dimensional lattice along the crystal plane and including a flat surface parallel with the crystal plane as a distal face. In a plane including the reference surface, mutually adjacent protrusions have a pitch P of not less than 100 nm and not more than 5.0 ?m, wherein 0.76?S1/S2?7.42 is satisfied, where S1 is a first area which is the total area of the distal faces per unit area as viewed in plan opposing the reference surface, and S2 is a second area which is the total area of the reference surface per unit area.
    Type: Application
    Filed: January 18, 2017
    Publication date: January 31, 2019
    Inventors: Kotaro Dai, Kei Shinotsuka, Yoshihisa Hatta
  • Patent number: 9915758
    Abstract: A mold for manufacturing an optical element is provided with a base material, and a recessing and protruding layer formed on a surface of the base material. The recessing and protruding structure of the recessing and protruding layer having a plurality of areas continuously arranged in a positional relationship in which the central point of seven adjacent protrusions is an intersection point of diagonal lines of six vertices of a regular hexagon, and the areas, shapes, and crystal orientations of the plurality of areas are random.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: March 13, 2018
    Assignee: OJI HOLDINGS CORPORATION
    Inventors: Kotaro Dai, Kei Shinotsuka, Yoshihisa Hatta
  • Publication number: 20170309784
    Abstract: A method of manufacturing a semiconductor light emitting device, the method including arranging multiple particles M in a monolayer on a substrate S, dry etching the multiple particles M arranged to provide a void between the particles M in a condition by which the particles M are etched while the substrate S is not substantially etched; and dry etching the substrate S by using the multiple particles M1 after the particle etching as an etching mask, thereby forming an uneven structure on one surface X the substrate S.
    Type: Application
    Filed: July 10, 2017
    Publication date: October 26, 2017
    Inventors: Yoshihisa HATTA, Kei SHINOTSUKA, Kotaro DAI, Yasuhito KAJITA
  • Patent number: 9748441
    Abstract: A method of manufacturing a semiconductor light emitting device, including arranging a plurality of particles in a monolayer on a substrate, dry etching the plurality of particles arranged to provide a void between the particles in a condition IN which the particles are etched while the substrate is not substantially etched; and dry etching the substrate using the plurality of particles after the particle etching step as an etching mask, thereby forming an uneven structure on one surface of the substrate.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: August 29, 2017
    Assignee: OJI HOLDINGS CORPORATION
    Inventors: Yoshihisa Hatta, Kei Shinotsuka, Kotaro Dai, Yasuhito Kajita
  • Patent number: 9515223
    Abstract: A semiconductor light emitting device substrate including an uneven structure on one surface, the uneven structure including numerous convex portions and a flat surface between the convex portions, and multiple areas in which the central portions of seven adjacent convex portions are continuously and positionally aligned to become six vertices and intersection points of diagonal lines of a regular hexagon, and the area, shape and lattice orientation of the plurality of areas are random. A semiconductor light emitting device including the semiconductor light emitting device substrate; and a semiconductor functional layer laminated on the semiconductor light emitting device substrate.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: December 6, 2016
    Assignee: OJI HOLDINGS CORPORATION
    Inventors: Yoshihisa Hatta, Kei Shinotsuka, Kotaro Dai, Yasuhito Kajita
  • Publication number: 20160197236
    Abstract: A method of manufacturing a semiconductor light emitting device, including arranging a plurality of particles in a monolayer on a substrate, dry etching the plurality of particles arranged to provide a void between the particles in a condition IN which the particles are etched while the substrate is not substantially etched; and dry etching the substrate using the plurality of particles after the particle etching step as an etching mask, thereby forming an uneven structure on one surface of the substrate.
    Type: Application
    Filed: March 15, 2016
    Publication date: July 7, 2016
    Inventors: Yoshihisa HATTA, Kei SHINOTSUKA, Kotaro DAI, Yasuhito KAJITA
  • Publication number: 20150301230
    Abstract: A mold for manufacturing an optical element is provided with a base material, and a recessing and protruding layer formed on a surface of the base material. The recessing and protruding structure of the recessing and protruding layer having a plurality of areas continuously arranged in a positional relationship in which the central point of seven adjacent protrusions is an intersection point of diagonal lines of six vertices of a regular hexagon, and the areas, shapes, and crystal orientations of the plurality of areas are random.
    Type: Application
    Filed: December 11, 2013
    Publication date: October 22, 2015
    Inventors: Kotaro Dai, Kei Shinotsuka, Yoshihisa Hatta
  • Publication number: 20150221824
    Abstract: A method of manufacturing a semiconductor light emitting device, the method including: a particle arranging step for arranging a plurality of particles M in a monolayer on a substrate S, a particle etching step for dry etching the plurality of particles M arranged to provide a void between the particles M in a condition by which the particles M are etched while the substrate S is not etched substantially; and a substrate etching step for dry etching the substrate S by using the plurality of particles M1 after the particle etching step as an etching mask, thereby forming an uneven structure on one surface X the substrate S.
    Type: Application
    Filed: August 21, 2013
    Publication date: August 6, 2015
    Inventors: Yoshihisa Hatta, Kei Shinotsuka, Kotaro Dai, Yasuhito Kajita
  • Patent number: 8796704
    Abstract: A system for displaying images is provided. The system includes an emissive display device including a plurality of pixel elements arranged in an array. Each pixel element includes a first substrate and a second substrate disposed thereunder, wherein the first substrate includes at least three subpixel regions. An organic light-emitting device is disposed between the first and second substrates and on the second substrate. At least one patterned polarizer film is disposed between the first and second substrates to be correspondingly located at one of the subpixel regions. At least one retarder film is disposed between the first and second substrates and affixed to the patterned polarizer film.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: August 5, 2014
    Assignee: Innolux Corporation
    Inventors: Yoshihisa Hatta, Pao-Chung Wu
  • Patent number: 8729554
    Abstract: A top-emission organic light-emitting diode (OLED) structure is provided. The top-emission OLED structure includes a substrate, a reflective layer, a first conductive layer, a second conductive layer and an emissive layer. The reflective layer is disposed above the substrate. The reflective layer includes a first material, a second material and a third material. The first material is aluminum (Al), the second material is nickel (Ni), and the third material is selected form a group consisting of group 13 elements and group 14 elements of a periodic table of elements. The first conductive layer is disposed above the reflective layer. The second conductive layer is disposed above the first conductive layer. The emissive layer is disposed between the first conductive and the second conductive layer.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: May 20, 2014
    Assignee: Chimei Innolux Corporation
    Inventors: Yoshihisa Hatta, Kazuchika Matsutani, Pao-Chung Wu
  • Publication number: 20120280259
    Abstract: A system for displaying images is provided. The system includes an emissive display device including a plurality of pixel elements arranged in an array. Each pixel element includes a first substrate and a second substrate disposed thereunder, wherein the first substrate includes at least three subpixel regions. An organic light-emitting device is disposed between the first and second substrates and on the second substrate. At least one patterned polarizer film is disposed between the first and second substrates to be correspondingly located at one of the subpixel regions. At least one retarder film is disposed between the first and second substrates and affixed to the patterned polarizer film.
    Type: Application
    Filed: May 2, 2011
    Publication date: November 8, 2012
    Applicant: CHIMEI INNOLUX CORPORATION
    Inventors: Yoshihisa HATTA, Pao-Chung WU
  • Publication number: 20120273817
    Abstract: A top-emission organic light-emitting diode (OLED) structure is provided. The top-emission OLED structure includes a substrate, a reflective layer, a first conductive layer, a second conductive layer and an emissive layer. The reflective layer is disposed above the substrate. The reflective layer includes a first material, a second material and a third material. The first material is aluminum (Al), the second material is nickel (Ni), and the third material is selected form a group consisting of group 13 elements and group 14 elements of a periodic table of elements. The first conductive layer is disposed above the reflective layer. The second conductive layer is disposed above the first conductive layer. The emissive layer is disposed between the first conductive and the second conductive layer.
    Type: Application
    Filed: April 27, 2011
    Publication date: November 1, 2012
    Applicant: CHIMEI INNOLUX CORPORATION
    Inventors: Yoshihisa HATTA, Kazuchika MATSUTANI, Pao-Chung WU
  • Publication number: 20050146666
    Abstract: It is an object of the invention to provide a liquid crystal display device which permits both miniaturization and cost reduction to be realized and has a high reliability. A device comprises a driving substrate (11) having wiring layers (18a, 18b), an opposite substrate (21) having an opposite electrode (24), a sealing (31) member disposed between the driving substrate (11) and the opposite substrate (21), and a liquid crystal layer (41) formed by a liquid crystal material sealed by the sealing member (31) in the space between the driving substrate (11) and the opposite substrate (21). A side face (11a) of the driving substrate (11) is flush with a side face (21a) of the opposite substrate (21). The wiring layers (18a, 18b) extend to an edge of the side face (11a) of the driving substrate (11), an end of the wiring layers (18a, 18b) having a possibility to contact with the atmosphere, the opposite electrode (24) extending to or near to an edge of the side face (21a) of the opposite substrate (21).
    Type: Application
    Filed: February 12, 2003
    Publication date: July 7, 2005
    Inventor: Yoshihisa Hatta
  • Patent number: 6768134
    Abstract: The invention provides a semiconductor device and a method for forming patterns in which the manufacturing cost is reduced while the step coverage is improved. The ITO film 50 and the MoCr film 100 are dry-etched after having formed the ITO film 50 and the MoCr film 100.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: July 27, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Yoshihisa Hatta
  • Publication number: 20040082123
    Abstract: The invention provides a semiconductor device and a method for forming patterns in which the manufacturing cost is reduced while the step coverage is improved. The ITO film 50 and the MoCr film 100 are dry-etched after having formed the ITO film 50 and the MoCr film 100.
    Type: Application
    Filed: December 3, 2003
    Publication date: April 29, 2004
    Inventor: Yoshihisa Hatta
  • Patent number: 6693000
    Abstract: The invention provides a semiconductor device and a method for forming patterns in which the manufacturing cost is reduced while the step coverage is improved. The ITO film 50 and the MoCr film 100 are dry-etched after having formed the ITO film 50 and the MoCr film 100.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: February 17, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Yoshihisa Hatta
  • Patent number: 6684495
    Abstract: A method of making a circuit board (10) on which surface electronic components (15) are mounted during the method using a solder reflow process. The board comprises a circuit portion (12), a surrounding circumferential portion (13) and at least one elongated opening (14) formed in the surrounding circumferential portion substantially parallel to the direction that the board travels during the reflow direction (16), thereby preventing electronic component soldering failures that may occur as a result of the deflection of the circuit board during the reflow process.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: February 3, 2004
    Assignee: International Business Machines Corporation
    Inventors: Yukiko Daido, Yoshihisa Hatta
  • Publication number: 20020191122
    Abstract: In accordance with the invention, a planarization film 9 is exposed using a photo mask 20 and then it is developed, so that the planarization film 9 is provided with recesses 9b. Finally, pixel electrodes 10 are formed on the planarization film 9 comprising those recesses 9b.
    Type: Application
    Filed: May 24, 2002
    Publication date: December 19, 2002
    Inventors: Hideo Tanaka, Yoshihisa Hatta
  • Publication number: 20020048863
    Abstract: The invention provides a semiconductor device and a method for forming patterns in which the manufacturing cost is reduced while the step coverage is improved. The ITO film 50 and the MoCr film 100 are dry-etched after having formed the ITO film 50 and the MoCr film 100.
    Type: Application
    Filed: May 21, 2001
    Publication date: April 25, 2002
    Inventor: Yoshihisa Hatta
  • Publication number: 20020022364
    Abstract: The invention provides a method for forming a metal film for a thin film device so as to have certain gentle taper angles. The method is an improved fine work method to produce metal films such as light shutter films for thin film devices through the combined production method of a wet-etching step and a dry-etching step. Preliminarily, the cross sectional shape of the resist film is formed so as to have certain taper angles at both end portions. Accordingly, during the dry-etching step, an etchant gas can smoothly flow through along the sidewall of the resist and accordingly the metal film can be formed so as to have gentle taper angles along the flow line of the etchant gas. Thus, it is possible in accordance with the invention to significantly improve the production efficiency and the quality of such thin film devices as the TFTs to be used for the LCDs.
    Type: Application
    Filed: August 14, 2001
    Publication date: February 21, 2002
    Inventors: Yoshihisa Hatta, Akinori Matsumoto, Shinichi Li