Abstract: A solar cell module includes an encapsulating member and a sealing layer for sealing a solar cell, and further includes a solar cell having a transparent conductive layer on its front surface. The solar cell includes a coating layer formed over the transparent conductive layer and having a plurality of openings, and a collecting electrode positioned in the openings of the coating layer and including a primary conductive layer containing copper. An undercoat layer is provided between the primary conductive layer of the collecting electrode and the transparent conductive layer. The coating layer and the undercoat layer are both composed of a resin.

Abstract: A solar cell module includes an encapsulating member and a sealing layer for sealing a solar cell, and further includes a solar cell having a transparent conductive layer on its front surface. The solar cell includes a coating layer formed over the transparent conductive layer and having a plurality of openings, and a collecting electrode positioned in the openings of the coating layer and including a primary conductive layer containing copper. An undercoat layer is provided between the primary conductive layer of the collecting electrode and the transparent conductive layer. The coating layer and the undercoat layer are both composed of a resin.

Abstract: A solar cell has a collecting electrode formed therein. The collecting electrode is provided with: a main conductive layer that contains copper; and an overcoat layer that covers at least a part of the main conductive layer.

Abstract: This solar cell module is provided with a plurality of solar cells, a first protective member, a second protective member, a filler, and a wiring material. The solar cells have a photoelectric conversion part, transparent conductive layers formed on a principal surface of the photoelectric conversion part, and plated electrodes of silver or copper, formed directly on the transparent conductive layers.

Abstract: A solar cell module is provided with: a photoelectric conversion section having a substrate; collecting electrodes, which are disposed on the photoelectric conversion section; adhesive layers disposed on the collecting electrodes; and wiring material pieces respectively connected to the collecting electrodes with the adhesive layers therebetween. In the longitudinal direction of the collecting electrodes, the collecting electrodes respectively have end portions formed thicker than the center portions, and in the longitudinal direction of the collecting electrodes, the adhesive layers respectively have potions corresponding to the center portions of the collecting electrodes formed thicker than adhesive layer portions corresponding to the end portions of the collecting electrodes.

Abstract: A solar cell, comprising: a photoelectric conversion unit; a transparent conductive layer comprising a transparent conductive oxide, and formed upon the main surface of the photoelectric conversion unit; and a finger section and a bus bar section that are formed upon the transparent conductive layer. The transparent conductive layer has particles on a contact surface where the finger section and the bus bar section are formed. The particle diameter of the particles is, for example, 10-200 nm.

Abstract: A solar cell has a collecting electrode formed therein. The collecting electrode is provided with: a main conductive layer that contains copper; and an overcoat layer that covers at least a part of the main conductive layer.

Abstract: A semiconductor device manufacturing method including forming a conductive layer and a silicon film on a semiconductor substrate including an active region, forming an emitter electrode containing a first impurity on the silicon film above the active region, partially etching the silicon film using the emitter electrode as a mask, forming an insulative film covering the semiconductor substrate and a side wall film covering a side surface of the emitter electrode, introducing a second impurity into the conductive layer and silicon film so that the second impurity reaches the active region to form an impurity region containing the second impurity in parts of the conductive layer and silicon film, and diffusing the first impurity contained in the emitter electrode into the silicon film to form in the silicon film a first region containing the first impurity and a second region free of the first impurity.

Abstract: A method of fabricating a semiconductor device includes steps of forming a gate electrode on the surface of a region of a semiconductor substrate provided with a first element, forming an insulating film to cover the surface of the gate electrode and another region of the semiconductor substrate provided with a second element and forming a sidewall insulating film covering the side surface of the gate electrode while leaving the insulating film on the region of the semiconductor substrate provided with the second element by a prescribed thickness by etching the insulating film up to an intermediate portion from the surface thereof.

Abstract: A sophisticated semiconductor device capable of being fabricated without introducing a high-precision exposure apparatus is obtained. This semiconductor device includes a conductive layer formed on a first conductivity type collector layer, a first conductivity type emitter electrode formed on the conductive layer and a protruding portion protruding from an outer side toward an inner side of the emitter electrode along an interface between the emitter electrode and the conductive layer. The conductive layer has a first conductivity type emitter diffusion layer in contact with the emitter electrode through the protruding portion and a second conductivity type base layer.

Abstract: A semiconductor device includes an element isolation film having an inclined portion and a flat portion, a protective film formed not on the inclined portion but on the flat portion of the element isolation film, and an outer base layer formed to extend from on a surface of an active region surrounded by the element isolation film to on the protective film.

Abstract: A semiconductor device manufacturing method including forming a conductive layer and a silicon film on a semiconductor substrate including an active region, forming an emitter electrode containing a first impurity on the silicon film above the active region, partially etching the silicon film using the emitter electrode as a mask, forming an insulative film covering the semiconductor substrate and a side wall film covering a side surface of the emitter electrode, introducing a second impurity into the conductive layer and silicon film so that the second impurity reaches the active region to form an impurity region containing the second impurity in parts of the conductive layer and silicon film, and diffusing the first impurity contained in the emitter electrode into the silicon film to form in the silicon film a first region containing the first impurity and a second region free of the first impurity.

Abstract: A high capacity semiconductor device having a narrowed emitter layer. The semiconductor device includes a collector layer formed on a semiconductor substrate. An SiGe alloy layer is formed on the collector layer. A silicon film is formed on the SiGe layer. An emitter electrode is formed on the silicon film. A side wall film covers the side surface of the emitter electrode. The bottom surface of the emitter electrode is located above the lower surface of the side wall film. Part of the second region of the silicon film is located between the SiGe alloy layer and the side wall film. An impurity region is formed adjacent to the conductive layer. A silicide film is formed along the side surface of the second region, the side surface of the conductive layer, and the surface of the impurity region.

Abstract: A semiconductor substrate includes an element isolation film arranged in a semiconductor substrate. An active region surrounded by the element isolation film functions as a collector layer. A conductive layer, which includes an alloy layer, is arranged on the active region. An emitter layer is arranged on the conductive layer. An emitter electrode is arranged on the emitter layer. A first film covers the side surface of the emitter electrode. A p+ diffusion layer is located adjacent to the conductive layer. An impurity region extends between the first alloy layer and the element isolation film in the active region. The boundary between the p+ diffusion layer and the alloy layer is located on an impurity region.

Abstract: A high capacity semiconductor device having a narrowed emitter layer. The semiconductor device includes a collector layer formed on a semiconductor substrate. An SiGe alloy layer is formed on the collector layer. A silicon film is formed on the SiGe layer. An emitter electrode is formed on the silicon film. A side wall film covers the side surface of the emitter electrode. The bottom surface of the emitter electrode is located above the lower surface of the side wall film. Part of the second region of the silicon film is located between the SiGe alloy layer and the side wall film. An impurity region is formed adjacent to the conductive layer. A silicide film is formed along the side surface of the second region, the side surface of the conductive layer, and the surface of the impurity region.

Abstract: A high performance semiconductor device including a silicon oxide film that surrounds an SiGe alloy layer, which functions as a base layer, and an n-type diffusion layer, which functions as an emitter layer. Under a polycrystalline silicon film, the silicon oxide film extends over a boundary between an active region and an element isolation film. After a flat interlayer dielectric is formed, a lead wire is connected to a silicide film located above the isolation film.

Abstract: A method of fabricating a semiconductor device capable of suppressing defective etching in formation of a deep trench also when the number of polishing steps is reduced is obtained. This method of fabricating a semiconductor device comprises steps of forming a first trench on an element isolation region of a semiconductor substrate, forming a first film consisting of an insulator film to fill up the first trench, forming a second trench larger in depth than the first trench in the first trench, forming an embedded film in the second trench and substantially simultaneously polishing an excess depositional portion of the first film and an excess depositional portion of the embedded film.

Abstract: A semiconductor device capable of easily setting the sheet resistance of a resistive element or the like to an arbitrary value is obtained. This semiconductor device comprises a first silicide film formed on a first silicon region and a second silicide film, formed on a second silicon region, consisting of the same silicide material as the first silicide film and differing from the first silicide film in film quality to have a sheet resistance value different from that of the first silicide film. When an impurity is introduced into the second silicide film itself so that the second silicide film differs from the first silicide film in film quality in this case, for example, a second silicide film having an arbitrary high sheet resistance value can be obtained by controlling the type of and an introduction condition for the impurity.

Abstract: A method of fabricating a semiconductor device capable of suppressing defective etching in formation of a deep trench also when the number of polishing steps is reduced is obtained. This method of fabricating a semiconductor device comprises steps of forming a first trench on an element isolation region of a semiconductor substrate, forming a first film consisting of an insulator film to fill up the first trench, forming a second trench larger in depth than the first trench in the first trench, forming an embedded film in the second trench and substantially simultaneously polishing an excess depositional portion of the first film and an excess depositional portion of the embedded film.

Abstract: A semiconductor device capable of effectively preventing defective short-circuiting across a gate electrode and an impurity region and reducing the resistance of the gate electrode and the impurity region is provided. In this semiconductor device, a first gate film is formed on a channel region through a gate insulator film. A second gate film consisting of a first compound layer is formed on the first gate film. A second compound layer is formed on the surface of the impurity region. A reaction preventing film for preventing the first compound layer and the second compound layer from reacting with each other is formed on the second gate film. The first and second compound layers are formed independently of each other without reaction in the process of formation due to the reaction preventing film. Thus, defective short-circuiting across the gate electrode and the impurity region is effectively prevented while process tolerance is increased.