Abstract: A semiconductor device capable of easily setting the sheet resistance of a resistive element or the like to an arbitrary value is obtained. This semiconductor device comprises a first silicide film formed on a first silicon region and a second silicide film, formed on a second silicon region, consisting of the same silicide material as the first silicide film and differing from the first silicide film in film quality to have a sheet resistance value different from that of the first silicide film. When an impurity is introduced into the second silicide film itself so that the second silicide film differs from the first silicide film in film quality in this case, for example, a second silicide film having an arbitrary high sheet resistance value can be obtained by controlling the type of and an introduction condition for the impurity.

Abstract: A method for manufacturing a miniaturized semiconductor device having a conductive portion with a silicide structure. The manufacturing method includes depositing metal on the surface of a patterned semiconductor film to form the conductive portion, heat treating the semiconductor film on which the metal is deposited, removing the residual metal that did not react during the heat treatment, and repeating the depositing step, the heat treating step, and the removing step once or a number of times.

Abstract: A semiconductor device capable of effectively preventing defective short-circuiting across a gate electrode and an impurity region and reducing the resistance of the gate electrode and the impurity region is provided. In this semiconductor device, a first gate film is formed on a channel region through a gate insulator film. A second gate film consisting of a first compound layer is formed on the first gate film. A second compound layer is formed on the surface of the impurity region. A reaction preventing film for preventing the first compound layer and the second compound layer from reacting with each other is formed on the second gate film. The first and second compound layers are formed independently of each other without reaction in the process of formation due to the reaction preventing film. Thus, defective short-circuiting across the gate electrode and the impurity region is effectively prevented while process tolerance is increased.

Abstract: A method of manufacturing a semiconductor device capable of suppressing increase of a leakage current resulting from a high-temperature heat treatment is obtained. In this manufacturing method, an impurity region is formed by selectively ion-implanting an impurity into the main surface of a semiconductor substrate. The impurity region is activated by performing a high-temperature heat treatment. The semiconductor device is recovered from crystal defects resulting from the high-temperature heat treatment by performing a low-temperature heat treatment after performing the high-temperature heat treatment. According to this manufacturing method, the semiconductor device is recovered from the crystal defects resulting from the ion implantation by the high-temperature heat treatment, and recovered from the crystal defects resulting from the high-temperature heat treatment by the low-temperature heat treatment.

Abstract: A semiconductor device suitable for increasing operation speed and microminiaturization is provided. First and second impurity diffusion regions are formed sandwiching an element isolation insulation film. After a metal film is deposited all over a substrate, a heat treatment for silicidization is applied to form a metal silicide layer on the first and second impurity diffusion regions. The metal film not silicided is removed by etching with a predetermined region of the metal film on the two metal silicide layers and on the element isolation insulation film covered with a mask. The metal silicide layers on the first and second impurity diffusion regions are electrically connected by a metal interconnection layer that is not silicided and that extends on and in direct contact with the element isolation insulation film.

Abstract: A semiconductor device includes an insulating layer and an interconnection layer having a conductive layer provided over the insulating layer. The interconnection layer is patterned by photolithography. The device further includes a cap-metal layer, which is deposited on the conductive layer and suppresses reflection of light beams at the time of patterning the interconnection layer. The cap-metal layer has any one of the following structures: a double-layered structure having a titanium nitride layer and a titanium layer located between the titanium nitride layer and the conductive layer; a double-layered structure having a titanium nitride layer and an aluminum-titanium alloy layer located between the titanium nitride layer and the conductive layer; and a single-layered structure consisting essentially of an aluminum-titanium alloy. These design ensure accurate interconnection patterning in the photolithography, and provide improved EM and SM immunities of the interconnection.

Abstract: A semiconductor device is disclosed, which includes an insulating layer and an interconnection layer having a conductive layer provided over the insulating layer. The interconnection layer is patterned by photolithography. The device further includes a cap-metal layer, which is deposited on the conductive layer and suppresses reflection of light beams at the time of patterning the interconnection layer. The cap-metal layer has any one of the following structures: a double-layered structure having a titanium nitride layer and a titanium layer located between the titanium nitride layer and the conductive layer; a double-layered structure having a titanium nitride layer and an aluminum-titanium alloy layer located between the titanium nitride layer and the conductive layer; and a single-layered structure consisting essentially of an aluminum-titanium alloy. These design ensure accurate interconnection patterning in the photolithography, and provide improved EM and SM immunities of the interconnection.