Patents by Inventor Yoshimasa Horii
Yoshimasa Horii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8652854Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.Type: GrantFiled: March 12, 2012Date of Patent: February 18, 2014Assignee: Fujitsu Semiconductor LimitedInventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
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Patent number: 8497539Abstract: To realize miniaturization/high integration and increase in the amount of accumulated charges, and to give a memory structure having a high reliability. A 1 transistor 1 capacitor (1T1C) structure having 1 ferroelectric capacitor structure and 1 selection transistor every memory cell is adopted, and respective capacitor structures are disposed respectively in either one layer of interlayer insulating films of 2 layers having different heights from the surface of a semiconductor substrate.Type: GrantFiled: February 23, 2012Date of Patent: July 30, 2013Assignee: Fujitsu Semiconductor LimitedInventor: Yoshimasa Horii
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Patent number: 8344434Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a first ferroelectric film on a first conductive film by a film-forming method including at least a step of forming a film by a sol-gel method; forming a second ferroelectric film on the first ferroelectric film by a sputtering method; forming a second conductive film on the second ferroelectric film; and forming a capacitor provided with a lower electrode, a capacitor dielectric film and an upper electrode by patterning the first conductive film, the first and second ferroelectric films and the second conductive film.Type: GrantFiled: May 4, 2011Date of Patent: January 1, 2013Assignee: Fujitsu Semiconductor LimitedInventors: Wensheng Wang, Yoshimasa Horii
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Patent number: 8222683Abstract: To realize miniaturization/high integration and increase in the amount of accumulated charges, and to give a memory structure having a high reliability. A 1 transistor 1 capacitor (1T1C) structure having 1 ferroelectric capacitor structure and 1 selection transistor every memory cell is adopted, and respective capacitor structures are disposed respectively in either one layer of interlayer insulating films of 2 layers having different heights from the surface of a semiconductor substrate.Type: GrantFiled: September 6, 2006Date of Patent: July 17, 2012Assignee: Fujitsu Semiconductor LimitedInventor: Yoshimasa Horii
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Publication number: 20120171785Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.Type: ApplicationFiled: March 12, 2012Publication date: July 5, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
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Publication number: 20120153368Abstract: To realize miniaturization/high integration and increase in the amount of accumulated charges, and to give a memory structure having a high reliability. A 1 transistor 1 capacitor (1T1C) structure having 1 ferroelectric capacitor structure and 1 selection transistor every memory cell is adopted, and respective capacitor structures are disposed respectively in either one layer of interlayer insulating films of 2 layers having different heights from the surface of a semiconductor substrate.Type: ApplicationFiled: February 23, 2012Publication date: June 21, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Yoshimasa HORII
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Patent number: 8153448Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.Type: GrantFiled: May 12, 2009Date of Patent: April 10, 2012Assignee: Fujitsu Semiconductor LimitedInventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
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Publication number: 20110204479Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a first ferroelectric film on a first conductive film by a film-forming method including at least a step of forming a film by a sol-gel method; forming a second ferroelectric film on the first ferroelectric film by a sputtering method; forming a second conductive film on the second ferroelectric film; and forming a capacitor provided with a lower electrode, a capacitor dielectric film and an upper electrode by patterning the first conductive film, the first and second ferroelectric films and the second conductive film.Type: ApplicationFiled: May 4, 2011Publication date: August 25, 2011Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Wensheng Wang, Yoshimasa Horii
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Patent number: 7960228Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a first ferroelectric film on a first conductive film by a film-forming method including at least a step of forming a film by a sol-gel method; forming a second ferroelectric film on the first ferroelectric film by a sputtering method; forming a second conductive film on the second ferroelectric film; and forming a capacitor provided with a lower electrode, a capacitor dielectric film and an upper electrode by patterning the first conductive film, the first and second ferroelectric films and the second conductive film.Type: GrantFiled: November 14, 2007Date of Patent: June 14, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Wensheng Wang, Yoshimasa Horii
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Patent number: 7897413Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a ferroelectric film on a first conductive film by a sol-gel method; forming a first conductive metal oxide film on the ferroelectric film; carrying out a first annealing on the first conductive metal oxide film; forming a second conductive metal oxide film on the first conductive metal oxide film, so that the first and second conductive films serve as a second conductive film; and forming a capacitor by patterning the first conductive film, the ferroelectric film and the second conductive film. In the step of forming the first conductive metal oxide film, ferroelectric characteristics are adjusted with a flow rate ratio of oxygen by utilizing the fact that the ferroelectric characteristics of the ferroelectric film improve as the flow rate ratio of oxygen in a sputtering gas increases.Type: GrantFiled: November 13, 2007Date of Patent: March 1, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Wensheng Wang, Yoshimasa Horii
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Publication number: 20090280577Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.Type: ApplicationFiled: May 12, 2009Publication date: November 12, 2009Applicant: FUJITSU MICROELECTRONICS LIMITEDInventors: Tomohiro TAKAMATSU, Junichi WATANABE, Ko NAKAMURA, Wensheng WANG, Naoyuki SATO, Aki DOTE, Kenji NOMURA, Yoshimasa HORII, Masaki KURASAWA, Kazuaki TAKAI
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Patent number: 7547933Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.Type: GrantFiled: October 29, 2003Date of Patent: June 16, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
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Publication number: 20080261332Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a ferroelectric film on a first conductive film by a sol-gel method; forming a first conductive metal oxide film on the ferroelectric film; carrying out a first annealing on the first conductive metal oxide film; forming a second conductive metal oxide film on the first conductive metal oxide film, so that the first and second conductive films serve as a second conductive film; and forming a capacitor by patterning the first conductive film, the ferroelectric film and the second conductive film. In the step of forming the first conductive metal oxide film, ferroelectric characteristics are adjusted with a flow rate ratio of oxygen by utilizing the fact that the ferroelectric characteristics of the ferroelectric film improve as the flow rate ratio of oxygen in a sputtering gas increases.Type: ApplicationFiled: November 13, 2007Publication date: October 23, 2008Applicant: FUJITSU LIMITEDInventors: Wensheng Wang, Yoshimasa Horii
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Publication number: 20080111172Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a first ferroelectric film on a first conductive film by a film-forming method including at least a step of forming a film by a sol-gel method; forming a second ferroelectric film on the first ferroelectric film by a sputtering method; forming a second conductive film on the second ferroelectric film; and forming a capacitor provided with a lower electrode, a capacitor dielectric film and an upper electrode by patterning the first conductive film, the first and second ferroelectric films and the second conductive film.Type: ApplicationFiled: November 14, 2007Publication date: May 15, 2008Applicant: FUJITSU LIMITEDInventors: Wensheng Wang, Yoshimasa Horii
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Publication number: 20070170484Abstract: To realize miniaturization/high integration and increase in the amount of accumulated charges, and to give a memory structure having a high reliability. A 1 transistor 1 capacitor (1T1C) structure having 1 ferroelectric capacitor structure and 1 selection transistor every memory cell is adopted, and respective capacitor structures are disposed respectively in either one layer of interlayer insulating films of 2 layers having different heights from the surface of a semiconductor substrate.Type: ApplicationFiled: September 6, 2006Publication date: July 26, 2007Applicant: FUJITSU LIMITEDInventor: Yoshimasa Horii
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Patent number: 7241656Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.Type: GrantFiled: May 25, 2006Date of Patent: July 10, 2007Assignee: Fujitsu LimitedInventors: Jeffrey Scott Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon
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Patent number: 7239026Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.Type: GrantFiled: May 25, 2006Date of Patent: July 3, 2007Assignee: Fujitsu LimitedInventors: Jeffrey Scott Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon
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Patent number: 7176132Abstract: There are provided a step of forming an insulating film over a semiconductor substrate, a step of exciting a plasma of a gas having a molecular structure in which hydrogen and nitrogen are bonded and then irradiating the plasma onto the insulating film, a step of forming a self-orientation layer made of substance having a self-orientation characteristic on the insulating film, and a step of forming a first conductive film made of conductive substance having the self-orientation characteristic on the self-orientation layer.Type: GrantFiled: October 29, 2003Date of Patent: February 13, 2007Assignee: Fujitsu LimitedInventors: Naoya Sashida, Katsuyoshi Matsuura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
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Publication number: 20060273365Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.Type: ApplicationFiled: May 25, 2006Publication date: December 7, 2006Applicant: FUJITSU LIMITEDInventors: Jeffrey Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon
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Publication number: 20060211156Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.Type: ApplicationFiled: May 25, 2006Publication date: September 21, 2006Applicant: FUJITSU LIMITEDInventors: Jeffrey Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon