Patents by Inventor Yoshimasa Horii

Yoshimasa Horii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7075135
    Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: July 11, 2006
    Assignee: Fujitsu Limited
    Inventors: Jeffrey Scott Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon
  • Patent number: 7029984
    Abstract: A method is disclosed for fabricating a semiconductor device having a memory employing a ferroelectric capacitor in which the orientation of the ferroelectric film is controlled. The method for fabricating the semiconductor device includes a first film deposition process for forming a first ferroelectric layer, and a second film deposition process for forming a second ferroelectric layer on the first ferroelectric layer. The film deposition temperature of the first film deposition process is set to at least 600° C.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: April 18, 2006
    Assignee: Fujitsu Limited
    Inventors: Yoshimasa Horii, Masaaki Nakabayashi, Masaki Kurasawa, Kou Nakamura, Kazuaki Takai, Hideyuki Noshiro, Shigeyoshi Umemiya
  • Patent number: 6964873
    Abstract: A method of fabricating a semiconductor device having a ferroelectric capacitor includes the steps of forming a lower electrode layer of the ferroelectric capacitor on an insulation film covering an active device element, forming a ferroelectric film on the lower electrode layer as a capacitor insulation film, crystallizing the ferroelectric film by applying a thermal annealing process in an atmosphere containing a non-oxidizing gas and an oxidizing gas, and forming an upper electrode layer on the ferroelectric film.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: November 15, 2005
    Assignee: Fujitsu Limited
    Inventors: Katsuyoshi Matsuura, Mari Tani, Yoshimasa Horii, Fan Chu, Glen R. Fox, Brian Eastep
  • Publication number: 20050215006
    Abstract: A method is disclosed for fabricating a semiconductor device having a memory employing a ferroelectric capacitor in which the orientation of the ferroelectric film is controlled. The method for fabricating the semiconductor device includes a first film deposition process for forming a first ferroelectric layer, and a second film deposition process for forming a second ferroelectric layer on the first ferroelectric layer. The film deposition temperature of the first film deposition process is set to at least 600° C.
    Type: Application
    Filed: May 25, 2005
    Publication date: September 29, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Yoshimasa Horii, Masaaki Nakabayashi, Masaki Kurasawa, Kou Nakamura, Kazuaki Takai, Hideyuki Noshiro, Shigeyoshi Umemiya
  • Patent number: 6887716
    Abstract: A method for fabrication of ferroelectric capacitor elements of an integrated circuit includes steps of deposition of an electrically conductive bottom electrode layer, preferably made of a noble metal. The bottom electrode is covered with a layer of ferroelectric dielectric material. The ferroelectric dielectric is annealed with a first anneal prior to depositing a second electrode layer comprising a noble metal oxide. Deposition of the electrically conductive top electrode layer is followed by annealing the layer of ferroelectric dielectric material and the top electrode layer with a second anneal. The first and the second anneal are performed by rapid thermal annealing.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: May 3, 2005
    Assignee: Fujitsu Limited
    Inventors: Glen Fox, Fan Chu, Brian Eastep, Tomohiro Takamatsu, Yoshimasa Horii, Ko Nakamura
  • Patent number: 6812510
    Abstract: A ferroelectric capacitor having a ferroelectric layer and a pair of electrodes, in which the ferroelectric layer contains carbon or carbon atoms of 5×1018 cm−3 or less, and the pair of electrodes is formed by a MOCVD (Metal Organic Chemical Vapor Deposition) method. A process for manufacturing a ferroelectric capacitor having the steps of forming a ferroelectric layer on one of a pair of electrodes; heating the layer at a temperature higher than when forming the layer, and to form the other electrode on the ferroelectric layer, or the steps of forming a ferroelectric layer on one of a pair of electrodes; forming the other electrode on the ferroelectric layer; and heating the layer at a temperature higher than when forming the layer to form the other electrode on the ferroelectric layer, to control carbon atoms of the ferroelectric layer to be 5×1018 cm−3 or less.
    Type: Grant
    Filed: February 21, 2003
    Date of Patent: November 2, 2004
    Assignee: Fujitsu Limited
    Inventors: Yoshimasa Horii, Osamu Matsuura, Katsuyoshi Matsuura, Kazuaki Takai
  • Publication number: 20040166596
    Abstract: There are provided a step of forming an insulating film over a semiconductor substrate, a step of exciting a plasma of a gas having a molecular structure in which hydrogen and nitrogen are bonded and then irradiating the plasma onto the insulating film, a step of forming a self-orientation layer made of substance having a self-orientation characteristic on the insulating film, and a step of forming a first conductive film made of conductive substance having the self-orientation characteristic on the self-orientation layer.
    Type: Application
    Filed: October 29, 2003
    Publication date: August 26, 2004
    Inventors: Naoya Sashida, Katsuyoshi Matsuura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Publication number: 20040147047
    Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.
    Type: Application
    Filed: November 20, 2003
    Publication date: July 29, 2004
    Inventors: Jeffrey Scott Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon
  • Publication number: 20040113189
    Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
    Type: Application
    Filed: October 29, 2003
    Publication date: June 17, 2004
    Inventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Patent number: 6674633
    Abstract: A method for the fabrication of a cap layer on a top electrode layer of a ferroelectric capacitor includes the steps of depositing an amorphous layer, usually made of Sr(x)Ru(y)O3, on the top electrode and then annealing the amorphous layer in two stages in order convert the amorphous layer into the cap layer. The first anneal is performed at 500° C. to 700° C. in a non-oxidizing atmosphere, such as nitrogen, and converts the amorphous layer into a crystallized layer of Sr(x)Ru(y)O3. The second anneal is performed at 300° C. to 500° C. in an oxidizing atmosphere, such as oxygen, and converts the crystallized layer into the cap layer. The method is applied to the formation of a ferroelectric capacitor element of an integrated semiconductor device.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: January 6, 2004
    Assignee: Fujitsu Limited
    Inventors: Shan Sun, George Hickert, Katsuyoshi Matsuura, Takeyasu Saito, Soichiro Ozawa, Naoyuki Satoh, Mitsushi Fujiki, Satoru Mihara, Jeffrey S. Cross, Yoshimasa Horii
  • Publication number: 20030230773
    Abstract: A ferroelectric capacitor having a ferroelectric layer and a pair of electrodes, in which the ferroelectric layer contains carbon or carbon atoms of 5×1018cm−3 or less, and the pair of electrodes is formed by a MOCVD (Metal Organic Chemical Vapor Deposition) method. A process for manufacturing a ferroelectric capacitor having the steps of forming a ferroelectric layer on one of a pair of electrodes; heating the layer at a temperature higher than when forming the layer, and to form the other electrode on the ferroelectric layer, or the steps of forming a ferroelectric layer on one of a pair of electrodes; forming the other electrode on the ferroelectric layer; and heating the layer at a temperature higher than when forming the layer to form the other electrode on the ferroelectric layer, to control carbon atoms of the ferroelectric layer to be 5×1018cm.
    Type: Application
    Filed: February 21, 2003
    Publication date: December 18, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Yoshimasa Horii, Osamu Matsuura, Katsuyoshi Matsuura, Kazuaki Takai
  • Publication number: 20020177243
    Abstract: A method of fabricating a semiconductor device having a ferroelectric capacitor includes the steps of forming a lower electrode layer of the ferroelectric capacitor on an insulation film covering an active device element, forming a ferroelectric film on the lower electrode layer as a capacitor insulation film, crystallizing the ferroelectric film by applying a thermal annealing process in an atmosphere containing a non-oxidizing gas and an oxidizing gas, and forming an upper electrode layer on the ferroelectric film.
    Type: Application
    Filed: April 17, 2000
    Publication date: November 28, 2002
    Inventors: Katsuyoshi Matsuura, Mari Tani, Yoshimasa Horii, Fan Chu, Glen R. Fox, Brian Eastep
  • Publication number: 20020149040
    Abstract: A method for the fabrication of a cap layer on a top electrode layer of a ferroelectric capacitor includes the steps of depositing an amorphous layer, usually made of Sr(x)Ru(y)O3, on the top electrode and then annealing the amorphous layer in two stages in order convert the amorphous layer into the cap layer. The first anneal is performed at 500° C. to 700° C. in a non-oxidizing atmosphere, such as nitrogen, and converts the amorphous layer into a crystallized layer of Sr(x)Ru(y)O3. The second anneal is performed at 300° C. to 500° C. in an oxidizing atmosphere, such as oxygen, and converts the crystallized layer into the cap layer. The method is applied to the formation of a ferroelectric capacitor element of an integrated semiconductor device.
    Type: Application
    Filed: February 28, 2001
    Publication date: October 17, 2002
    Inventors: Shan Sun, George Hickert, Katsuyoshi Matsuura, Takeyasu Saito, Soichiro Ozawa, Naoyuki Satoh, Mitsushi Fujiki, Satoru Mihara, Jeffrey S. Cross, Yoshimasa Horii
  • Publication number: 20020142489
    Abstract: A method of fabricating a semiconductor device having a ferroelectric capacitor includes the steps of forming a lower electrode layer of the ferroelectric capacitor on an insulation film covering an active device element, forming a ferroelectric film on the lower electrode layer as a capacitor insulation film, crystallizing the ferroelectric film by applying a thermal annealing process in an atmosphere containing a non-oxidizing gas and an oxidizing gas, and forming an upper electrode layer on the ferroelectric film.
    Type: Application
    Filed: January 4, 2002
    Publication date: October 3, 2002
    Inventors: Katsuyoshi Matsuura, Mari Tani, Yoshimasa Horii, Fan Chu, Glen R. Fox, Brian Eastep
  • Publication number: 20020074601
    Abstract: A method for fabrication of ferroelectric capacitor elements of an integrated circuit includes steps of deposition of an electrically conductive bottom electrode layer, preferably made of a noble metal. The bottom electrode is covered with a layer of ferroelectric dielectric material. The ferroelectric dielectric is annealed with a first anneal prior to depositing a second electrode layer comprising a noble metal oxide. Deposition of the electrically conductive top electrode layer is followed by annealing the layer of ferroelectric dielectric material and the top electrode layer with a second anneal. The first and the second anneal are performed by rapid thermal annealing.
    Type: Application
    Filed: December 20, 2000
    Publication date: June 20, 2002
    Inventors: Glen Fox, Fan Chu, Brian Eastep, Tomohiro Takamatsu, Yoshimasa Horii, Ko Nakamura