Abstract: The objective of the invention is to provide a method of manufacturing a semiconductor device that allows individual molding of plural semiconductor chips carried on a surface of the substrate. It includes the following process steps: a process step in which plural semiconductor elements 102 are arranged on the surface of substrate 100; a process step in which the inner side of substrate 102 is fixed on lower die 130; a process step in which liquid resin 114 is supplied from nozzle 112 onto each of the semiconductor elements in order to cover at least a portion of each of semiconductor chips 102; a process step in which the upper die having plural cavities 144 formed in one surface is pressed onto the lower die, and liquid resin 114 is molded at a prescribed temperature by means of plural cavities 144; and a process step in which cavities 144 of upper die 140 are detached from the substrate, and plural molding resin portions are formed individually.

Abstract: An electronic assembly adapted for forming package on package (PoP) devices includes a package substrate having a molded IC die thereon that defines a mold cap height and substrate contact pads lateral to the molded IC die. An interposer including an interposer substrate has bottom metal land pads and top metal land pads, interposer vias, and an open receptacle region formed through the interposer substrate. The substrate top surface is positioned relative to the interposer so that the molded IC die is within the open receptacle region to align the bottom metal land pads and substrate contact pads. An underfill layer is between the substrate top surface and the bottom side of the interposer substrate. A step height from the mold cap height minus a height of the top metal land pads is generally from 0 to 0.2 mm.

Abstract: A method of forming stacked electronic articles using a through substrate via (TSV) wafer includes mounting a first carrier wafer to a top side of the TSV wafer using a first adhesive material that has a first debonding temperature. The TSV wafer is thinned from a bottom side of the TSV wafer to form a thinned TSV wafer. A second carrier wafer is mounted to the bottom side of the TSV wafer using a second adhesive material that has a second debonding temperature that is higher as compared to the first debonding temperature. The thinned TSV wafer is heated to a temperature above the first debonding temperature to remove the first carrier wafer from the thinned TSV wafer. At least one singulated IC die is bonded to TSV die formed on the top surface of the thinned TSV wafer to form the stacked electronic article.

Abstract: A method of forming stacked electronic articles using a through substrate via (TSV) wafer includes mounting a first carrier wafer to a top side of the TSV wafer using a first adhesive material that has a first debonding temperature. The TSV wafer is thinned from a bottom side of the TSV wafer to form a thinned TSV wafer. A second carrier wafer is mounted to the bottom side of the TSV wafer using a second adhesive material that has a second debonding temperature that is higher as compared to the first debonding temperature. The thinned TSV wafer is heated to a temperature above the first debonding temperature to remove the first carrier wafer from the thinned TSV wafer. At least one singulated IC die is bonded to TSV die formed on the top surface of the thinned TSV wafer to form the stacked electronic article.

Abstract: The objective of the invention is to provide a method of manufacturing a semiconductor device that allows individual molding of plural semiconductor chips carried on a surface of the substrate. It includes the following process steps: a process step in which plural semiconductor elements 102 are arranged on the surface of substrate 100; a process step in which the inner side of substrate 102 is fixed on lower die 130; a process step in which liquid resin 114 is supplied from nozzle 112 onto each of the semiconductor elements in order to cover at least a portion of each of semiconductor chips 102; a process step in which the upper die having plural cavities 144 formed in one surface is pressed onto the lower die, and liquid resin 114 is molded at a prescribed temperature by means of plural cavities 144; and a process step in which cavities 144 of upper die 140 are detached from the substrate, and plural molding resin portions are formed individually.

Abstract: A method for forming a semiconductor device can include providing a patterned layer of mold compound having a plurality of individual mold compound structures overlying a base film. The plurality of mold compound structures are aligned with a plurality of semiconductor dice to interpose the individual mold compound structures between the plurality of semiconductor dice. A pressure is applied to the individual mold compound structures to fill spaces between each of the plurality of semiconductor dice with the mold compound. The mold compound structures can be formed on the base film using a photosensitive mold compound. The mold compound structures can also be formed through the use of a patterned mask and a screen printing process.

Abstract: A method for bonding IC die to TSV wafers includes bonding at least one singulated IC die to respective ones of a plurality of IC die on a TSV wafer that includes a top semiconductor surface and TSV precursors including embedded TSV tips to form a die-wafer stack. The die-wafer stack is thinned beginning from the bottom surface of the TSV wafer to form a thinned die-wafer stack. The thinning includes exposing the embedded TSV tips to provide electrical access thereto from the bottom surface of the TSV wafer. The thinned die-wafer stack can be singulated to form a plurality of thinned die stacks.

Abstract: An electronic assembly adapted for forming package on package (PoP) devices includes a package substrate having a molded IC die thereon that defines a mold cap height and substrate contact pads lateral to the molded IC die. An interposer including an interposer substrate has bottom metal land pads and top metal land pads, interposer vias, and an open receptacle region formed through the interposer substrate. The substrate top surface is positioned relative to the interposer so that the molded IC die is within the open receptacle region to align the bottom metal land pads and substrate contact pads. An underfill layer is between the substrate top surface and the bottom side of the interposer substrate. A step height from the mold cap height minus a height of the top metal land pads is generally from 0 to 0.2 mm.

Abstract: A chair-type massage machine includes a seat on which a user sits; a leg rest whose one end portion is pivotally connected with a front portion of the seat for pivotal movement up and down, the leg rest supporting calves of the user; a driving unit for pivotally moving the leg rest with respect to the seat; a footrest pivotally connected with the other end portion of the leg rest for pivotal movement up and down, the footrest supporting feet of the user; and a massage means provided to at least one of the leg rest and the footrest. Also, a stopper unit is provided for restricting a pivotal movement range of the footrest with respect to the leg rest, and a biasing unit is disposed for applying a biasing force to the footrest in either an upward or downward a direction of the pivotal movement.

Abstract: To provide selective exposure of the TSV tip through a semiconductor wafer without undercut, the inventor has developed a new method of semiconductor device formation. An embodiment of the present teachings can include the use of sandblasting to remove a portion of the semiconductor wafer to expose the TSV tip without the need for additional wet and/or dry etching.

Abstract: A method for bonding IC die to TSV wafers includes bonding at least one singulated IC die to respective ones of a plurality of IC die on a TSV wafer that includes a top semiconductor surface and TSV precursors including embedded TSV tips to form a die-wafer stack. The die-wafer stack is thinned beginning from the bottom surface of the TSV wafer to form a thinned die-wafer stack. The thinning includes exposing the embedded TSV tips to provide electrical access thereto from the bottom surface of the TSV wafer. The thinned die-wafer stack can be singulated to form a plurality of thinned die stacks.

Abstract: A device with a semiconductor chip assembled on a planar substrate and encapsulation compound surrounding the assembled chip and a portion of the substrate near the chip; the compound has a planar top area. The encapsulation compound has a plurality of side areas reaching from the substrate to the top area; these side areas form edge lines with the top area, where the top area plane intersects with the respective plane of each side area. The encapsulation compound is recessed along the edge lines so that the material is caved-in along the lines; this feature causes the recess to prevent any compound from the side area planes to reach the top area plane, whereby the planarity of the top area is preserved.

Abstract: The objective of the invention is to prevent electrostatic destruction of semiconductor chips during resin molding. With the semiconductor device manufacturing method, a substrate 400 that includes on the surface multiple semiconductor chips 410 and liquid resin 434 supplied to multiple semiconductor devices is supported by an electrically insulated lower die 200. An upper die 110 in which multiple shape-forming parts (cavities) 112 are formed is pressed against lower die 200 through the medium of a polymer release film 300, and liquid resin 434 on the substrate is molded.

Abstract: An objective of this invention is to extend the range of choosing organic dye compounds as light-absorbing agent in a variety of fields of, for example, information storage, information display, solar energy generation, electric machinery apparatus, electric communicating apparatus, optical apparatus, cloth, building/bedding/decorating product, sanitary and health goods, and agricultural material by providing an organic dye compound which is superior in light-absorbing property, light resistance, and solubility in the near-infrared region: The objective is attainable by providing a cyanine dye that bears within the same molecule a plurality of cyanine dye skeletons bound to a divalent group(s) and an organometallic complex as counter ion, as well as substantially absorbing a light with a wavelength longer than 700 nm.

Abstract: A device with a semiconductor chip assembled on a planar substrate and encapsulation compound surrounding the assembled chip and a portion of the substrate near the chip; the compound has a planar top area. The encapsulation compound has a plurality of side areas reaching from the substrate to the top area; these side areas form edge lines with the top area, where the top area plane intersects with the respective plane of each side area. The encapsulation compound is recessed along the edge lines so that the material is caved-in along the lines; this feature causes the recess to prevent any compound from the side area planes to reach the top area plane, whereby the planarity of the top area is preserved.

Abstract: A method for forming electronic assemblies includes providing a plurality of IC die each having IC bonding conductors and a workpiece having workpiece bonding conductors. A curable dielectric film is applied to the IC bonding conductors or the workpiece surface. The plurality of IC die are placed on the workpiece surface so that the plurality of IC bonding conductors are aligned to and face the plurality of workpiece bonding conductors to provide a first bonding. The placing is performed at a vacuum level corresponding to a pressure <1 kPa, and at a temperature sufficient to provide tackiness to the curable dielectric film. The plurality of IC die are then pressed to provide a second bonding. A temperature during pressing cures the curable dielectric film to provide an underfill and forms metallic joints between the plurality of IC bonding conductors and the plurality of workpiece bonding conductors.

Abstract: A method of forming an electronic assembly including a plurality of IC die having bonding terminals that have a solderable material thereon and a workpiece. The workpiece includes workpiece contact pads including an elevated ring having a ring height at least 5 ?m above a minimum contact pad height in an indented bonding region that is within the elevated ring. The bonding terminals and/or the plurality of workpiece contact pads include solder thereon. A plurality of IC die are mounted on the workpiece. Heat is applied so that the solder becomes tacky while remaining below its melting temperature to obtain a tacked position. The plurality of IC die are pressed using a pressing tool to heat the solder to a peak temperature that is above the melting temperature. The elevated ring resists horizontal movement of the plurality of IC die from their tacked positions during pressing.

Abstract: The objective of the invention is to provide a method of manufacturing a semiconductor device that allows individual molding of plural semiconductor chips carried on a surface of the substrate. It includes the following process steps: a process step in which plural semiconductor elements 102 are arranged on the surface of substrate 100; a process step in which the inner side of substrate 102 is fixed on lower die 130; a process step in which liquid resin 114 is supplied from nozzle 112 onto each of the semiconductor elements in order to cover at least a portion of each of semiconductor chips 102; a process step in which the upper die having plural cavities 144 formed in one surface is pressed onto the lower die, and liquid resin 114 is molded at a prescribed temperature by means of plural cavities 144; and a process step in which cavities 144 of upper die 140 are detached from the substrate, and plural molding resin portions are formed individually.

Abstract: The objective of the invention is to provide a method of manufacturing a semiconductor device that allows individual molding of plural semiconductor chips carried on a surface of the substrate. It includes the following process steps: a process step in which plural semiconductor elements 102 are arranged on the surface of substrate 100; a process step in which the inner side of substrate 102 is fixed on lower die 130; a process step in which liquid resin 114 is supplied from nozzle 112 onto each of the semiconductor elements in order to cover at least a portion of each of semiconductor chips 102; a process step in which the upper die having plural cavities 144 formed in one surface is pressed onto the lower die, and liquid resin 114 is molded at a prescribed temperature by means of plural cavities 144; and a process step in which cavities 144 of upper die 140 are detached from the substrate, and plural molding resin portions are formed individually.

Abstract: A chair-type massage machine includes a seat on which a user sits; a leg rest whose one end portion is pivotally connected with a front portion of the seat for pivotal movement up and down, the leg rest supporting calves of the user; a driving unit for pivotally moving the leg rest with respect to the seat; a footrest pivotally connected with the other end portion of the leg rest for pivotal movement up and down, the footrest supporting feet of the user; and a massage means provided to at least one of the leg rest and the footrest. Also, a stopper unit is provided for restricting a pivotal movement range of the footrest with respect to the leg rest, and a biasing unit is disposed for applying a biasing force to the footrest in either an upward or downward a direction of the pivotal movement.