Patents by Inventor Yoshimichi Harada
Yoshimichi Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11676977Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: GrantFiled: April 4, 2022Date of Patent: June 13, 2023Assignee: SONY GROUP CORPORATIONInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Publication number: 20220231061Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: ApplicationFiled: April 4, 2022Publication date: July 21, 2022Applicant: Sony Group CorporationInventors: Yoshihiro Nabe, Hiroshi ` Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 11315970Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: GrantFiled: August 6, 2018Date of Patent: April 26, 2022Assignee: SONY CORPORATIONInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Publication number: 20190043905Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: ApplicationFiled: August 6, 2018Publication date: February 7, 2019Applicant: Sony CorporationInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 10050074Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: GrantFiled: May 27, 2016Date of Patent: August 14, 2018Assignee: Sony CorporationInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Publication number: 20160276385Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: ApplicationFiled: May 27, 2016Publication date: September 22, 2016Inventors: Yoshihiro Nabe, Hiroshi ` Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 9425070Abstract: Disclosed herein is a semiconductor device, including: a mount body having a first principal surface on which a wiring pattern is formed; a semiconductor chip mounted above the principal surface of the mount body on which the wiring pattern is formed; an underfill material filled between the mount body and the semiconductor chip, thereby forming a fillet in an outer peripheral portion of the semiconductor chip; and an introduction portion formed outside a side portion, along which the fillet is formed so as to be longest, of four side portions which measure a chip mounting area, on the mount body, onto which the semiconductor chip is mounted, the introduction portion serving to introduce the underfill material between the mount body and the semiconductor chip.Type: GrantFiled: January 13, 2011Date of Patent: August 23, 2016Assignee: SONY CORPORATIONInventors: Yoshimichi Harada, Makoto Murai, Takayuki Tanaka, Kana Nagayoshi, Takuya Nakamura
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Patent number: 9379155Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: GrantFiled: April 17, 2015Date of Patent: June 28, 2016Assignee: Sony CorporationInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Publication number: 20150221690Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: ApplicationFiled: April 17, 2015Publication date: August 6, 2015Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 9041179Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: GrantFiled: March 6, 2014Date of Patent: May 26, 2015Assignee: SONY CORPORATIONInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 9041199Abstract: A semiconductor device includes: a mount body; a semiconductor chip mounted on the mount body via projecting connecting terminals; and a filling resin filled between the mount body and the semiconductor chip to seal the connecting terminals, the filling resin being retained inside the semiconductor chip in such a way as not to run out of at least one side portion in four side portions defining an outer peripheral portion of the semiconductor chip.Type: GrantFiled: December 31, 2009Date of Patent: May 26, 2015Assignee: Sony CorporationInventors: Makoto Murai, Yoshimichi Harada
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Publication number: 20140183680Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: ApplicationFiled: March 6, 2014Publication date: July 3, 2014Applicant: Sony CorporationInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 8592303Abstract: There are provided with a wiring structure and a method for manufacturing the same wherein in a wiring structure of multi-layered wiring in which a metal wiring is formed on a substrate forming a semiconductor element thereby obtaining connection of the element, no damage to insulation property between the abutting wirings by occurrence of leakage current and no deterioration of insulation resistance property between the abutting wirings are achieved in case that fine metal wiring is formed in a porous insulation film. The insulation barrier layer 413 is formed between an interlayer insulation film and the metal wiring, in the metal wiring structure on the substrate forming the semiconductor element. The insulation barrier layer enables to reduce leakage current between the abutting wirings and to elevate the insulation credibility.Type: GrantFiled: March 1, 2010Date of Patent: November 26, 2013Assignees: Renesas Electronics Corporation, NEC CorporationInventors: Munehiro Tada, Yoshihiro Hayashi, Yoshimichi Harada, Fuminori Ito, Hiroto Ohtake, Tatsuya Usami
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Patent number: 8564101Abstract: A semiconductor apparatus having a through-hole interconnection in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate. A via hole is formed through the semiconductor substrate and the insulating layer. The through-hole interconnection has another insulating layer formed in the via hole and a conductive layer formed thereon. The insulating layer formed in the via hole is formed such as to substantially planarize an inner surface of the via hole.Type: GrantFiled: January 6, 2009Date of Patent: October 22, 2013Assignees: Sony Corporation, Fujikura Ltd.Inventors: Yoshimichi Harada, Masami Suzuki, Yoshihiro Nabe, Yuji Takaoka, Tatsuo Suemasu, Hideyuki Wada, Masanobu Saruta
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Publication number: 20120286387Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: ApplicationFiled: July 19, 2012Publication date: November 15, 2012Applicant: SONY CORPORATIONInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 8273657Abstract: A method for manufacturing a semiconductor apparatus having a through-hole interconnection in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate. A via hole is formed through the semiconductor substrate and the insulating layer. Another insulating layer is formed in the via hole, and a conductive layer of the through-hole interconnection is subsequently formed. The insulating layer formed in the via hole is formed such as to substantially planarize an inner surface of the via hole.Type: GrantFiled: February 15, 2011Date of Patent: September 25, 2012Assignees: Sony Corporation, Fujikura Ltd.Inventors: Yoshimichi Harada, Masami Suzuki, Yoshihiro Nabe, Yuji Takaoka, Tatsuo Suemasu, Hideyuki Wada, Masanobu Saruta
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Patent number: 8252628Abstract: A semiconductor device includes a semiconductor substrate having first and second surfaces opposite each other, the first surface being an active surface by provided with an electronic element thereon, a pad electrode formed to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening, formed to reach the pad electrode from a bottom surface of the first opening, having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.Type: GrantFiled: March 12, 2008Date of Patent: August 28, 2012Assignee: Sony CorporationInventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
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Patent number: 8222744Abstract: A semiconductor device includes: a mounted body in which a wiring pattern is formed on a first main surface; a semiconductor chip mounted on the surface of the mounted body on which the wiring pattern is formed; an underfill material which is filled between the mounted body and the semiconductor chip and forms a fillet on an outer peripheral part of the semiconductor chip; and an injection section which is disposed on the mounted body and on an outside of a side section, on which the fillet is formed to be longest, of four side sections defining a chip mount area on which the semiconductor chip is mounted, and guides the underfill material to between the mounted body and the semiconductor chip.Type: GrantFiled: January 15, 2010Date of Patent: July 17, 2012Assignee: Sony CorporationInventors: Yoshimichi Harada, Makoto Murai, Takayuki Tanaka, Takuya Nakamura
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Publication number: 20110175239Abstract: Disclosed herein is a semiconductor device, including: a mount body having a first principal surface on which a wiring pattern is formed; a semiconductor chip mounted above the principal surface of the mount body on which the wiring pattern is formed; an underfill material filled between the mount body and the semiconductor chip, thereby forming a fillet in an outer peripheral portion of the semiconductor chip; and an introduction portion formed outside a side portion, along which the fillet is formed so as to be longest, of four side portions which measure a chip mounting area, on the mount body, onto which the semiconductor chip is mounted, the introduction portion serving to introduce the underfill material between the mount body and the semiconductor chip.Type: ApplicationFiled: January 13, 2011Publication date: July 21, 2011Applicant: SONY CORPORATIONInventors: Yoshimichi Harada, Makoto Murai, Takayuki Tanaka, Kana Nagayoshi, Takuya Nakamura
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Patent number: 7968471Abstract: The present invention provides a process of producing a porous insulating film effective as an insulating film constituting a semiconductor device and a process of producing a porous insulating film having high adhesion to a semiconductor material, which is in contact with the upper and lower interfaces of the insulating film. Gas containing molecule vapor of at least one or more organic silica compounds, which have a cyclic silica skeleton in its molecule and have at least one or more unsaturated hydrocarbon groups bound with the cyclic silica skeleton is introduced into plasma to grow a porous insulating film on a semiconductor substrate.Type: GrantFiled: November 29, 2004Date of Patent: June 28, 2011Assignee: NEC CorporationInventors: Yoshimichi Harada, Yoshihiro Hayashi, Fuminori Itoh, Kenichiro Hijioka, Tsuneo Takeuchi