Abstract: A high frequency semiconductor amplifier according to the present disclosure includes: a transistor formed on a semiconductor substrate and including a gate electrode, a source electrode, and a drain electrode; a matching circuit for input-side fundamental wave matching of the transistor; a first inductor formed on the semiconductor substrate and having one end connected to the gate electrode of the transistor and the other end connected to the matching circuit; a capacitor formed on the semiconductor substrate and having one end being short-circuited; and a second inductor formed on the semiconductor substrate and having one end connected to the gate electrode of the transistor and the other end connected to the other end of the capacitor, wherein the second inductor resonates in series with the capacitor at second harmonic frequency, has a mutual inductance of subtractive polarity with the first inductor, and the first inductor and the second inductor form mutual inductive circuits for input-side second har

Abstract: A pass phase of a path including the first input phase delay circuit, the carrier amplifier and the second output phase delay circuit is the same as that of a path including the second input phase delay circuit, the peak amplifier and the second output phase delay circuit in an operating band. A parasitic capacitance on a drain side of the first transistor and the first output phase delay circuit constitute a 90-degree line viewed from the first transistor. A parasitic capacitance on a drain side of the second transistor and the second output phase delay circuit constitute a 0-degree line viewed from the second transistor. A value obtained by dividing, by frequency, susceptance of a circuit constituted with the second transistor and the second output phase delay circuit when viewed from the composite point when the peak amplifier is off has a positive slope with respect to the frequency.

Abstract: Provided are an input matching circuit, at least one amplifying transistor that receives a signal from the input matching circuit, a first dummy transistor that receives a signal from the input matching circuit, a second dummy transistor that receives a signal from the input matching circuit, and an output matching circuit that outputs an output of the amplifying transistor, the amplifying transistor being arranged between the first dummy transistor and the second dummy transistor, the amplifying transistor, the first dummy transistor, and the second dummy transistor being provided in a row along the input matching circuit.

Abstract: An amplifier (T1) amplifies an input signal. A harmonic matching circuit (3) is connected to an output end of the amplifier (T1) via a first wire (W1). The harmonic matching circuit (3) includes a first inductor (L1) connected to the first wire (W1), a first capacitor (C1) connected in series to the first inductor (L1), a second inductor (L2) connected in parallel with the first inductor (L1), and a second capacitor (C2) connected in series to the second inductor (L2). The first inductor (L1) and the second inductor (L2) form a subtractive-polarity coupler which presents mutual inductance having subtractive polarity.

Abstract: The present invention relates to a high-frequency power amplifier in which mainly an amplification GaN chip and a GaAs chip which has a pre-match circuit for the former formed thereon are connected by wires on an identical metal plate. The high-frequency power amplifier according to the present invention is provided with a coupler exhibiting a mutual inductance of a subtractive polarity on the GaAs chip, thereby making it possible to: cancel a mutual inductance between adjacent wires; reduce the spread of a second harmonic impedance with respect to a frequency when a signal source is viewed from a gate terminal of the GaN chip; and maintain a high efficiency of the power amplifier in a desired fundamental wave band.

Abstract: A high frequency semiconductor amplifier according to the present disclosure includes: a transistor formed on a semiconductor substrate and including a gate electrode, a source electrode, and a drain electrode; a matching circuit for input-side fundamental wave matching of the transistor; a first inductor formed on the semiconductor substrate and having one end connected to the gate electrode of the transistor and the other end connected to the matching circuit; a capacitor formed on the semiconductor substrate and having one end being short-circuited; and a second inductor formed on the semiconductor substrate and having one end connected to the gate electrode of the transistor and the other end connected to the other end of the capacitor, wherein the second inductor resonates in series with the capacitor at second harmonic frequency, has a mutual inductance of subtractive polarity with the first inductor, and the first inductor and the second inductor form mutual inductive circuits for input-side second har

Abstract: An amplifier includes a transistor chip including a plurality of transistor cells, a gate pad, and a drain pad, a matching substrate having a surface on which a metal pattern is formed, a terminal with a width larger than a width of the transistor chip and than a width of the matching substrate, a plurality of terminal wires connecting the terminal to the metal pattern, and a plurality of chip wires connecting the metal pattern to the transistor chip. Inter-wire distances of portions of the plurality of terminal wires connected to the metal pattern are larger than inter-wire distances between portions of the plurality of terminal wires connected to the terminal.

Abstract: Provided are an input matching circuit, at least one amplifying transistor that receives a signal from the input matching circuit, a first dummy transistor that receives a signal from the input matching circuit, a second dummy transistor that receives a signal from the input matching circuit, and an output matching circuit that outputs an output of the amplifying transistor, the amplifying transistor being arranged between the first dummy transistor and the second dummy transistor, the amplifying transistor, the first dummy transistor, and the second dummy transistor being provided in a row along the input matching circuit.

Abstract: The present invention includes a first semiconductor chip, a second semiconductor chip, a first inductor, a second inductor, a second capacitor, protective diodes, and a third inductor. A field effect transistor includes a gate terminal, a drain terminal, and a source terminal connected to a ground terminal. The second semiconductor chip includes an input terminal and an output terminal connected in a direct current manner, and includes a first capacitor connected to the input terminal and to the ground terminal. The first inductor is connected between the output terminal and the gate terminal. The second inductor includes a first terminal connected to the input terminal. The second capacitor is connected between a second terminal of the second inductor and the ground terminal. Protective diodes are connected in series in a forward direction, and each has a cathode, and an anode connected to the ground terminal. The third inductor is connected between the cathode and the second terminal.

Abstract: The present invention relates to a high-frequency power amplifier in which mainly an amplification GaN chip and a GaAs chip which has a pre-match circuit for the former formed thereon are connected by wires on an identical metal plate. The high-frequency power amplifier according to the present invention is provided with a coupler exhibiting a mutual inductance of a subtractive polarity on the GaAs chip, thereby making it possible to: cancel a mutual inductance between adjacent wires; reduce the spread of a second harmonic impedance with respect to a frequency when a signal source is viewed from a gate terminal of the GaN chip; and maintain a high efficiency of the power amplifier in a desired fundamental wave band.

Abstract: The present invention includes a first semiconductor chip, a second semiconductor chip, a first inductor, a second inductor, a second capacitor, protective diodes, and a third inductor. A field effect transistor includes a gate terminal, a drain terminal, and a source terminal connected to a ground terminal. The second semiconductor chip includes an input terminal and an output terminal connected in a direct current manner, and includes a first capacitor connected to the input terminal and to the ground terminal. The first inductor is connected between the output terminal and the gate terminal. The second inductor includes a first terminal connected to the input terminal. The second capacitor is connected between a second terminal of the second inductor and the ground terminal. Protective diodes are connected in series in a forward direction, and each has a cathode, and an anode connected to the ground terminal. The third inductor is connected between the cathode and the second terminal.

Abstract: An amplifier includes a transistor chip including a plurality of transistor cells, a gate pad, and a drain pad, a matching substrate having a surface on which a metal pattern is formed, a terminal with a width larger than a width of the transistor chip and than a width of the matching substrate, a plurality of terminal wires connecting the terminal to the metal pattern, and a plurality of chip wires connecting the metal pattern to the transistor chip. Inter-wire distances of portions of the plurality of terminal wires connected to the metal pattern are larger than inter-wire distances between portions of the plurality of terminal wires connected to the terminal.

Abstract: A semiconductor device includes: a depletion-type field-effect transistor including a gate terminal, a drain terminal and a source terminal; a group III-V heterojunction bipolar transistor including a base terminal, an emitter terminal electrically connected to the gate terminal and a collector terminal connected to same potential as that of the source terminal; a first resistor connected between the base terminal and the emitter terminal; and a second resistor connected between the base terminal and the collector terminal.

Abstract: A semiconductor device includes: a depletion-type field-effect transistor including a gate terminal, a drain terminal and a source terminal; a group III-V heterojunction bipolar transistor including a base terminal, an emitter terminal electrically connected to the gate terminal and a collector terminal connected to same potential as that of the source terminal; a first resistor connected between the base terminal and the emitter terminal; and a second resistor connected between the base terminal and the collector terminal.

Abstract: A semiconductor device includes a package, an input terminal fixed to the package, an input pre-matched substrate provided in the package, a semiconductor element provided in the package and formed on a substrate different from the input pre-matched substrate, a matching circuit including a circuit element formed on the input pre-matched substrate, a first wire for connecting the input terminal and the circuit element, and a second wire for connecting the circuit element and the semiconductor element, a first MIM capacitor formed as part of the circuit element, and a first stabilization circuit formed as part of the circuit element to reduce oscillation, wherein a lower electrode of the first MIM capacitor is connected to the package through a via provided in the input pre-matched substrate.

Abstract: An amplifier includes a package, a transistor chip having a gate pad and a drain pad formed elongately, the transistor chip being provided in the package, and a plurality of drain bonding wires connected to the drain pad, wherein the plurality of drain bonding wires include a first outer-most bonding wire connected to one of two end portions of the drain pad, a second outer-most bonding wire connected to the other of the two end portions of the drain pad, and an intermediate bonding wire interposed between the first outer-most bonding wire and the second outer-most bonding wire, each of the plurality of drain bonding wires is longer than 1 mm, and the first outer-most bonding wire and the second outer-most bonding wire have loop heights larger than a loop height that the intermediate bonding wire has.

Abstract: An amplifier includes a package, a transistor chip having a gate pad and a drain pad formed elongately, the transistor chip being provided in the package, and a plurality of drain bonding wires connected to the drain pad, wherein the plurality of drain bonding wires include a first outer-most bonding wire connected to one of two end portions of the drain pad, a second outer-most bonding wire connected to the other of the two end portions of the drain pad, and an intermediate bonding wire interposed between the first outer-most bonding wire and the second outer-most bonding wire, each of the plurality of drain bonding wires is longer than 1 mm, and the first outer-most bonding wire and the second outer-most bonding wire have loop heights larger than a loop height that the intermediate bonding wire has.

Abstract: A semiconductor device includes a package, an input terminal fixed to the package, an input pre-matched substrate provided in the package, a semiconductor element provided in the package and formed on a substrate different from the input pre-matched substrate, a matching circuit including a circuit element formed on the input pre-matched substrate, a first wire for connecting the input terminal and the circuit element, and a second wire for connecting the circuit element and the semiconductor element, a first MIM capacitor formed as part of the circuit element, and a first stabilization circuit formed as part of the circuit element to reduce oscillation, wherein a lower electrode of the first MIM capacitor is connected to the package through a via provided in the input pre-matched substrate.

Abstract: A semiconductor device includes a power amplifier for amplifying RF signals in multiple frequency bands, an output matching circuit connected to an output of the power amplifier, a first capacitor connected at a first end to an output of the output matching circuit, multiple output paths, a switch connected to a second end of the first capacitor and directing each of the RF signals to a respective one of the output paths in accordance with frequency band of the each of the RF signals, and multiple second capacitors. Each second capacitor is connected in series to a respective one of the output paths. The switch and either the first capacitor or the second capacitors, or both the first and second capacitors, are integrated as a single monolithic microwave integrated circuit.

Abstract: A first amplifier is connected between an input terminal and an output terminal. A first junction point is located between the input terminal and an input of the first amplifier. A second junction point is located between the output terminal and an output of the first amplifier. A second amplifier is connected in parallel with the first amplifier, between the first junction point and the second junction point. A third junction point is located between an output of the second amplifier and the second junction point. A first capacitor and a switch are connected in series between the third junction point and ground. The second junction point is the lowest impedance point along a power amplification path that includes the input terminal, the first amplifier, and the output terminal. The switch is turned off/on when the second/first amplifier is turned on.