Patents by Inventor Yoshinobu Sasaki

Yoshinobu Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020014929
    Abstract: A microwave/millimeter-wave integrated circuit realizes stable oscillation by reducing time-base variation in load impedance. This IC connects an oscillator to the input terminal of a lange coupler, and connects to the isolation port of the lange coupler a terminating resistor with resistance equal to the load impedance connected to the output terminals of the lange coupler. This stabilizes load impedance to the oscillator, and reduces variation in the oscillation frequency as a result of changes in load impedance.
    Type: Application
    Filed: September 20, 2001
    Publication date: February 7, 2002
    Inventors: Takuo Kashiwa, Yoshinobu Sasaki, Naoki Tanahashi
  • Patent number: 6300840
    Abstract: A microwave/millimeter-wave integrated circuit (IC) realizes stable oscillation by reducing time-based variation of a load impedance. This IC connects an oscillator to an input terminal of a Lange coupler and connects to the isolation port of the Lange coupler a terminating resistor having a resistance equal to the load impedance connected to the output terminals of the Lange coupler. This connection stabilizes load impedance to the oscillator, and reduces variation in the oscillation frequency as a result of changes in load impedance.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: October 9, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takuo Kashiwa, Yoshinobu Sasaki, Naoki Tanahashi
  • Patent number: 6275121
    Abstract: A microwave phase shifter includes bias regulating circuits generating a gate bias of an FET switch element by processing a control voltage generated by the power-source voltage of an external system and applied to the FET switch element in a transformation process. The off-level of the gate bias is set near the pinch-off voltage. As a result, even when the control voltage of the FET switch element which switches the phase shift amount is restricted due to the circumstance of the system power-source, the off-level of the FET element can be set at a potential near the pinch-off voltage and can suppress delay in the rise of the phase shifter output because the off-level exceeds the pinch-off voltage.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: August 14, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshinobu Sasaki, Yasuharu Nakajima, Takaya Maruyama
  • Patent number: 6104240
    Abstract: A microwave circuit having a coupler with two microstrip conductors on a front surface of a substrate, parallel to each other, and electromagnetically coupled to each other with a coupling coefficient wherein the substrate has a rear surface on which a grounding conductor is formed. A floating conductor is interposed between the microstrip conductors. A first terminal of a switching device is connected to one end of the floating conductor while a second terminal of the switching device is grounded. By selectively turning on and off the switching device, the coupling coefficient is changed.
    Type: Grant
    Filed: December 24, 1998
    Date of Patent: August 15, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Sinichi Fujimoto, Yoshinobu Sasaki
  • Patent number: 5905654
    Abstract: A method of designing the layout of milliwave and microwave integrated circuits using a computer aided design system includes displaying each of a plurality of kinds of lumped circuit elements and distributed constant transmission lines for an integrated circuit on a cathode ray tube display as respective closed drawing objects, each object having an area and dimension representing electrical data; connecting the drawing objects displayed on the cathode ray tube display by overlapping edges of them with each other to produce a virtual integrated circuit having the circuit construction of the integrated circuit; and performing logical operations on the overlapping drawing objects of the virtual integrated circuit according to a design rule defined in accordance with a production process for producing the integrated circuit to produce at least one mask pattern for manufacturing the integrated circuit.
    Type: Grant
    Filed: October 12, 1993
    Date of Patent: May 18, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Noriyuki Tanino, Yoshinobu Sasaki
  • Patent number: 5812033
    Abstract: A microwave integrated circuit includes a matching circuit for electromagnetic analysis in designing the circuit. The matching circuit is a T-junction circuit comprising distributed constant lines. Miniaturization of the microwave integrated circuit is realized while reducing the time required for electromagnetic analysis and improving design precision by using meandered distributed constant lines.
    Type: Grant
    Filed: December 16, 1996
    Date of Patent: September 22, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shin Chaki, Yoshinobu Sasaki, Yoshihiro Tsukahara
  • Patent number: 5675290
    Abstract: A microwave amplifier circuit includes an amplifier having a gate to which a microwave signal is input and an output terminal from which an amplified signal is output, and a gate bias resistor having a variable resistance connected between the gate of the amplifier and a gate bias terminal for controlling a voltage applied to the gate while maintaining a constant bias voltage at the gate. Even when variations occur in the threshold voltage of the amplifier because of process variations, the gain of the circuit can be held constant, without the bias voltage being adjusted, so that yield is improved.
    Type: Grant
    Filed: April 10, 1996
    Date of Patent: October 7, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshihiro Tsukahara, Yoshinobu Sasaki
  • Patent number: 5414387
    Abstract: A distributed amplifier includes an input side circuit including a plurality of distributed constant lines connected in series between an input terminal and ground and a plurality of source-grounded FETs for switching operation having drains connected to respective junctions of the distributed constant lines, an output side circuit including a plurality of distributed constant lines connected in series between an output terminal and ground, and a plurality of source-grounded amplifier FETs having gates connected to respective junctions of the distributed constant lines of the input side circuit via capacitors and drains connected to junctions of the distributed constant lines of the output side circuit.
    Type: Grant
    Filed: June 13, 1994
    Date of Patent: May 9, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuhiko Nakahara, Yoshinobu Sasaki
  • Patent number: 5363058
    Abstract: An amplifier for amplifying a high frequency signal includes an input impedance matching circuit; an output impedance matching circuit; an FET having a gate and a drain connected to the input impedance matching circuit and the output impedance matching circuit, respectively; and a gate voltage control circuit for controlling the gate voltage of the FET in response to the power of the high frequency signal. The gate voltage control circuit includes a diode having an anode connected to the gate, a capacitor connected between the cathode of the diode and ground, and a gate bias setting circuit connected to the junction of the diode and the capacitor. The gate bias setting circuit outputs a control voltage corresponding to the power of the high frequency signal. As a result, impedance matching by the output matching circuit is not disturbed and the linearity of the output power to the input power is maintained so that the amplifier operates highly efficiently.
    Type: Grant
    Filed: March 11, 1993
    Date of Patent: November 8, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoshinobu Sasaki
  • Patent number: 5039873
    Abstract: A microwave element includes an impedance control circuit for controlling the capacitance between the source and the drain of an FET in the off state including a series-connected diode and capacitor connected in parallel between the source and drain of the FET and a circuit for applying a variable bias voltage to the diode. A microwave switch including two FETs includes two impedance control circuits for controlling the capacitances of the FETs. A microwave switched line phase shifter includes two transmission lines of different electrical lengths and four FETs, two of the FETs being connected in series at each of the ends of the two transmission lines. Impedance control circuits for controlling the capacitances of each of the FETs are included.
    Type: Grant
    Filed: March 22, 1990
    Date of Patent: August 13, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoshinobu Sasaki