Patents by Inventor Yoshinori Ieda
Yoshinori Ieda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9437454Abstract: It is an object to reduce defective conduction in a wiring board or a semiconductor device whose integration degree is increased. It is another object to manufacture a highly reliable wiring board or semiconductor device with high yield. In a wiring board or a semiconductor device having a multilayer wiring structure, a conductive layer having a curved surface is used in connection between conductive layers used for the wirings. The top of a conductive layer in a lower layer exposed by removal of an insulating layer therearound has a curved surface, so that coverage of the conductive layer in the lower layer with a conductive layer in an upper layer stacked thereover can be favorable. A conductive layer is etched using a resist mask having a curved surface, so that a conductive layer having a curved surface is formed.Type: GrantFiled: June 16, 2011Date of Patent: September 6, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Motomu Kurata, Shinya Sasagawa, Fumika Taguchi, Yoshinori Ieda
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Patent number: 9437594Abstract: A nitride insulating film which prevents diffusion of hydrogen into an oxide semiconductor film in a transistor including an oxide semiconductor is provided. Further, a semiconductor device which has favorable electrical characteristics by using a transistor including a silicon semiconductor and a transistor including an oxide semiconductor is provided. Two nitride insulating films having different functions are provided between the transistor including a silicon semiconductor and the transistor including an oxide semiconductor. Specifically, a first nitride insulating film which contains hydrogen is provided over the transistor including a silicon semiconductor, and a second nitride insulating film which has a lower hydrogen content than the first nitride insulating film and functions as a barrier film against hydrogen is provided between the first nitride insulating film and the transistor including an oxide semiconductor.Type: GrantFiled: July 22, 2013Date of Patent: September 6, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Tetsuhiro Tanaka, Yoshinori Ieda, Toshiyuki Miyamoto, Masafumi Nomura, Takashi Hamochi, Kenichi Okazaki, Mitsuhiro Ichijo, Toshiya Endo
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Patent number: 9431435Abstract: To improve the electrical characteristics of a semiconductor device including an oxide semiconductor, and to provide a highly reliable semiconductor device with a small variation in electrical characteristics. The semiconductor device includes a first insulating film, a first barrier film over the first insulating film, a second insulating film over the first barrier film, and a first transistor including a first oxide semiconductor film over the second insulating film. The amount of hydrogen molecules released from the first insulating film at a given temperature higher than or equal to 400° C., which is measured by thermal desorption spectroscopy, is less than or equal to 130% of the amount of released hydrogen molecules at 300° C. The second insulating film includes a region containing oxygen at a higher proportion than oxygen in the stoichiometric composition.Type: GrantFiled: October 21, 2014Date of Patent: August 30, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshinori Ando, Hidekazu Miyairi, Naoto Yamade, Asako Higa, Miki Suzuki, Yoshinori Ieda, Yasutaka Suzuki, Kosei Nei, Shunpei Yamazaki
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Patent number: 9391157Abstract: A semiconductor device including an oxide semiconductor that is miniaturized and has favorable electrical characteristics is provided. The semiconductor device includes an oxide semiconductor film and a blocking film; a source electrode and a drain electrode electrically connected to the oxide semiconductor film; a gate insulating film in contact with the oxide semiconductor film, the source electrode, and the drain electrode; and a gate electrode in contact with the gate insulating film. The blocking film contains the same material as the oxide semiconductor film, is on the same surface as the oxide semiconductor film, and has a higher conductivity than the oxide semiconductor film.Type: GrantFiled: September 2, 2014Date of Patent: July 12, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yasutaka Suzuki, Yuki Hata, Yoshinori Ieda
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Publication number: 20150372123Abstract: A semiconductor device including a minute transistor with a short channel length is provided. A gate insulating layer is formed over a gate electrode layer; an oxide semiconductor layer is formed over the gate insulating layer; a first conductive layer and a second conductive layer are formed over the oxide semiconductor layer; a conductive film is formed over the first conductive layer and the second conductive layer; a resist mask is formed over the conductive film by performing electron beam exposure; and then a third conductive layer and a fourth conductive layer are formed over and in contact with the first conductive layer and the second conductive layer, respectively, by selectively etching the conductive film.Type: ApplicationFiled: August 27, 2015Publication date: December 24, 2015Inventors: Shunpei YAMAZAKI, Atsuo ISOBE, Yoshinori IEDA, Masaharu NAGAI
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Publication number: 20150340379Abstract: Provided is a semiconductor device which has low power consumption and can operate at high speed. The semiconductor device includes a memory element including a first transistor including crystalline silicon in a channel formation region, a capacitor for storing data of the memory element, and a second transistor which is a switching element for controlling supply, storage, and release of charge in the capacitor. The second transistor is provided over an insulating film covering the first transistor. The first and second transistors have a source electrode or a drain electrode in common.Type: ApplicationFiled: August 3, 2015Publication date: November 26, 2015Inventors: Yoshinori IEDA, Atsuo ISOBE, Yutaka SHIONOIRI, Tomoaki ATSUMI
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Patent number: 9142679Abstract: A semiconductor device including a minute transistor with a short channel length is provided. A gate insulating layer is formed over a gate electrode layer; an oxide semiconductor layer is formed over the gate insulating layer; a first conductive layer and a second conductive layer are formed over the oxide semiconductor layer; a conductive film is formed over the first conductive layer and the second conductive layer; a resist mask is formed over the conductive film by performing electron beam exposure; and then a third conductive layer and a fourth conductive layer are formed over and in contact with the first conductive layer and the second conductive layer, respectively, by selectively etching the conductive film.Type: GrantFiled: November 27, 2012Date of Patent: September 22, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Atsuo Isobe, Yoshinori Ieda, Masaharu Nagai
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Patent number: 9136280Abstract: A semiconductor device has a non-volatile memory cell including a write transistor which includes an oxide semiconductor and has small leakage current in an off state between a source and a drain, a read transistor including a semiconductor material different from that of the write transistor, and a capacitor. Data is written or rewritten to the memory cell by turning on the write transistor and applying a potential to a node where one of a source electrode and drain electrode of the write transistor, one electrode of the capacitor, and a gate electrode of the read transistor are electrically connected to one another, and then turning off the write transistor so that the predetermined amount of charge is held in the node.Type: GrantFiled: July 11, 2014Date of Patent: September 15, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kazuma Furutani, Yoshinori Ieda, Yuto Yakubo, Kiyoshi Kato, Shunpei Yamazaki
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Patent number: 9111795Abstract: Provided is a semiconductor device which has low power consumption and can operate at high speed. The semiconductor device includes a memory element including a first transistor including crystalline silicon in a channel formation region, a capacitor for storing data of the memory element, and a second transistor which is a switching element for controlling supply, storage, and release of charge in the capacitor. The second transistor is provided over an insulating film covering the first transistor. The first and second transistors have a source electrode or a drain electrode in common.Type: GrantFiled: April 11, 2012Date of Patent: August 18, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshinori Ieda, Atsuo Isobe, Yutaka Shionoiri, Tomoaki Atsumi
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Publication number: 20150108475Abstract: To improve the electrical characteristics of a semiconductor device including an oxide semiconductor, and to provide a highly reliable semiconductor device with a small variation in electrical characteristics. The semiconductor device includes a first insulating film, a first barrier film over the first insulating film, a second insulating film over the first barrier film, and a first transistor including a first oxide semiconductor film over the second insulating film. The amount of hydrogen molecules released from the first insulating film at a given temperature higher than or equal to 400° C., which is measured by thermal desorption spectroscopy, is less than or equal to 130% of the amount of released hydrogen molecules at 300° C. The second insulating film includes a region containing oxygen at a higher proportion than oxygen in the stoichiometric composition.Type: ApplicationFiled: October 21, 2014Publication date: April 23, 2015Inventors: Yoshinori Ando, Hidekazu Miyairi, Naoto Yamade, Asako Higa, Miki Suzuki, Yoshinori Ieda, Yasutaka Suzuki, Kosei Nei, Shunpei Yamazaki
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Publication number: 20150069383Abstract: A semiconductor device including an oxide semiconductor that is miniaturized and has favorable electrical characteristics is provided. The semiconductor device includes an oxide semiconductor film and a blocking film; a source electrode and a drain electrode electrically connected to the oxide semiconductor film; a gate insulating film in contact with the oxide semiconductor film, the source electrode, and the drain electrode; and a gate electrode in contact with the gate insulating film. The blocking film contains the same material as the oxide semiconductor film, is on the same surface as the oxide semiconductor film, and has a higher conductivity than the oxide semiconductor film.Type: ApplicationFiled: September 2, 2014Publication date: March 12, 2015Inventors: Yasutaka Suzuki, Yuki Hata, Yoshinori Ieda
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Publication number: 20150056750Abstract: A first insulating film in contact with an oxide semiconductor film and a second insulating film are stacked in this order over an electrode film of a transistor including the oxide semiconductor film, an etching mask is formed over the second insulating film, an opening portion exposing the electrode film is formed by etching a portion of the first insulating film and a portion of the second insulating film, the opening portion exposing the electrode film is exposed to argon plasma, the etching mask is removed, and a conductive film is formed in the opening portion exposing the electrode film. The first insulating film is an insulating film whose oxygen is partly released by heating. The second insulating film is less easily etched than the first insulating film and has a lower gas-permeability than the first insulating film.Type: ApplicationFiled: October 29, 2014Publication date: February 26, 2015Inventors: Shinya SASAGAWA, Hiroshi FUJIKI, Yoshinori IEDA
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Patent number: 8901554Abstract: A first insulating film in contact with an oxide semiconductor film and a second insulating film are stacked in this order over an electrode film of a transistor including the oxide semiconductor film, an etching mask is formed over the second insulating film, an opening portion exposing the electrode film is formed by etching a portion of the first insulating film and a portion of the second insulating film, the opening portion exposing the electrode film is exposed to argon plasma, the etching mask is removed, and a conductive film is formed in the opening portion exposing the electrode film. The first insulating film is an insulating film whose oxygen is partly released by heating. The second insulating film is less easily etched than the first insulating film and has a lower gas-permeability than the first insulating film.Type: GrantFiled: May 31, 2012Date of Patent: December 2, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinya Sasagawa, Hiroshi Fujiki, Yoshinori Ieda
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Publication number: 20140319518Abstract: A semiconductor device has a non-volatile memory cell including a write transistor which includes an oxide semiconductor and has small leakage current in an off state between a source and a drain, a read transistor including a semiconductor material different from that of the write transistor, and a capacitor. Data is written or rewritten to the memory cell by turning on the write transistor and applying a potential to a node where one of a source electrode and drain electrode of the write transistor, one electrode of the capacitor, and a gate electrode of the read transistor are electrically connected to one another, and then turning off the write transistor so that the predetermined amount of charge is held in the node.Type: ApplicationFiled: July 11, 2014Publication date: October 30, 2014Inventors: Kazuma Furutani, Yoshinori Ieda, Yuto Yakubo, Kiyoshi Kato, Shunpei Yamazaki
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Patent number: 8779433Abstract: It is an object to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limitation on the number of writings. A semiconductor device includes a second transistor and a capacitor provided over a first transistor. A source electrode of the second transistor which is in contact with a gate electrode of the first transistor is formed using a material having etching selectivity with respect to the gate electrode. By forming the source electrode of the second transistor using a material having etching selectivity with respect to the gate electrode of the first transistor, a margin in layout can be reduced, so that the degree of integration of the semiconductor device can be increased.Type: GrantFiled: May 25, 2011Date of Patent: July 15, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Atsuo Isobe, Yoshinori Ieda, Kiyoshi Kato, Yuto Yakubo, Yuki Hata
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Patent number: 8780629Abstract: A semiconductor device has a non-volatile memory cell including a write transistor which includes an oxide semiconductor and has small leakage current in an off state between a source and a drain, a read transistor including a semiconductor material different from that of the write transistor, and a capacitor. Data is written or rewritten to the memory cell by turning on the write transistor and applying a potential to a node where one of a source electrode and drain electrode of the write transistor, one electrode of the capacitor, and a gate electrode of the read transistor are electrically connected to one another, and then turning off the write transistor so that the predetermined amount of charge is held in the node.Type: GrantFiled: January 12, 2011Date of Patent: July 15, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kazuma Furutani, Yoshinori Ieda, Yuto Yakubo, Kiyoshi Kato, Shunpei Yamazaki
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Publication number: 20140027764Abstract: A nitride insulating film which prevents diffusion of hydrogen into an oxide semiconductor film in a transistor including an oxide semiconductor is provided. Further, a semiconductor device which has favorable electrical characteristics by using a transistor including a silicon semiconductor and a transistor including an oxide semiconductor is provided. Two nitride insulating films having different functions are provided between the transistor including a silicon semiconductor and the transistor including an oxide semiconductor. Specifically, a first nitride insulating film which contains hydrogen is provided over the transistor including a silicon semiconductor, and a second nitride insulating film which has a lower hydrogen content than the first nitride insulating film and functions as a barrier film against hydrogen is provided between the first nitride insulating film and the transistor including an oxide semiconductor.Type: ApplicationFiled: July 22, 2013Publication date: January 30, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei YAMAZAKI, Tetsuhiro TANAKA, Yoshinori IEDA, Toshiyuki MIYAMOTO, Masafumi NOMURA, Takashi HAMOCHI, Kenichi OKAZAKI, Mitsuhiro ICHIJO, Toshiya ENDO
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Patent number: 8569753Abstract: The semiconductor device is provided in which a plurality of memory cells each including a first transistor, a second transistor, and a capacitor is arranged in matrix and a wiring (also referred to as a bit line) for connecting one of the memory cells and another one of the memory cells and a source or drain region in the first transistor are electrically connected through a conductive layer and a source or drain electrode in the second transistor provided therebetween. With this structure, the number of wirings can be reduced in comparison with a structure in which the source or drain electrode in the first transistor and the source or drain electrode in the second transistor are connected to different wirings. Thus, the integration degree of a semiconductor device can be increased.Type: GrantFiled: May 27, 2011Date of Patent: October 29, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Atsuo Isobe, Yoshinori Ieda, Keitaro Imai, Kiyoshi Kato, Yuto Yakubo, Yuki Hata
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Patent number: 8441009Abstract: In a semiconductor device using a nonvolatile memory, high speed erasing operation and low power consumption are realized. In a nonvolatile memory in which a channel formation region, a tunnel insulating film, and a floating gate are stacked in this order, the channel formation region is formed using an oxide semiconductor layer. In addition, a metal wiring for erasing is provided in a lower side of the channel formation region so as to face the floating gate. With the above structure, when erasing operation is performed, charge accumulated in the floating gate is extracted to the metal wiring through the channel formation region. Consequently, high speed erasing operation and low power consumption of the semiconductor device can be realized.Type: GrantFiled: December 21, 2010Date of Patent: May 14, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Yoshinori Ieda
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Publication number: 20120319101Abstract: A first insulating film in contact with an oxide semiconductor film and a second insulating film are stacked in this order over an electrode film of a transistor including the oxide semiconductor film, an etching mask is formed over the second insulating film, an opening portion exposing the electrode film is formed by etching a portion of the first insulating film and a portion of the second insulating film, the opening portion exposing the electrode film is exposed to argon plasma, the etching mask is removed, and a conductive film is formed in the opening portion exposing the electrode film. The first insulating film is an insulating film whose oxygen is partly released by heating. The second insulating film is less easily etched than the first insulating film and has a lower gas-permeability than the first insulating film.Type: ApplicationFiled: May 31, 2012Publication date: December 20, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shinya SASAGAWA, Hiroshi FUJIKI, Yoshinori IEDA