Patents by Inventor Yoshinori Tsuchiya

Yoshinori Tsuchiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060163662
    Abstract: A semiconductor device includes a semiconductor substrate; a first gate insulation film formed on the semiconductor substrate; a second gate insulation film formed on the semiconductor substrate; a first gate electrode formed on the first gate insulation film and fully silicided; and a second gate electrode formed on the second gate insulation film and fully silicided, a gate length or a gate width of the second gate electrode being larger than that of the first gate electrode, and a thickness of the second gate electrode being smaller than that of the first gate electrode.
    Type: Application
    Filed: August 26, 2005
    Publication date: July 27, 2006
    Inventors: Atsuhiro Kinoshita, Yoshinori Tsuchiya, Junji Koga
  • Publication number: 20060038239
    Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate having isolation regions a p-type MIS transistor comprising a pair of source/drain regions formed in the semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and a gate electrode formed on the gate insulating film and having a first metal layer at least at the gate electrode/gate insulator interface, and an n-type MIS transistor comprising a pair of source/drain regions formed in the semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and a gate electrode formed on the gate insulating film and having a boride layer of the first metal at least at an interface thereof with the gate insulating film.
    Type: Application
    Filed: April 26, 2005
    Publication date: February 23, 2006
    Inventors: Yoshinori Tsuchiya, Akira Nishiyama
  • Publication number: 20060038229
    Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate having isolation regions, and a MIS transistor comprising a gate electrode formed above the semiconductor substrate with a gate insulating film interposed therebetween, and a pair of contact layers formed on the semiconductor substrate sandwiching the gate electrode, the contact layers having an interfacial layer at an interface between the semiconductor substrate and the contact layers, the interfacial layer comprising a metal silicide containing at least one selected from a group consisting of Er, Gd, Tb, Dy, Ho, Tm, Yb, Lu, and Pt.
    Type: Application
    Filed: April 28, 2005
    Publication date: February 23, 2006
    Inventors: Yoshinori Tsuchiya, Junji Koga
  • Publication number: 20050189652
    Abstract: A silicon substrate is prepared, and a titanium intermediate layer is formed on the silicon substrate. Then, a compound element-containing layer containing compound elements to compose an intended silicide film is formed on the titanium intermediate layer, to form a multilayered intermediate structure, which is thermally treated to form the intended silicide film made of silicon elements of the silicon substrate and the compound elements of the compound element-containing layer.
    Type: Application
    Filed: August 26, 2004
    Publication date: September 1, 2005
    Applicant: NATIONAL UNIVERSITY CORPORATION NAGOYA UNIVERSITY
    Inventors: Osamu Nakatsuka, Akira Sakai, Shigeaki Zaima, Yukio Yasuda, Kazuya Okubo, Yoshinori Tsuchiya
  • Publication number: 20050127451
    Abstract: A semiconductor device comprises n-type and p-type semiconductor devices formed on the substrate, the n-type device including an n-channel region formed on the substrate, n-type source and drain regions formed opposite to each other interposing the n-channel region therebetween, a first gate insulator formed on the n-channel region, and a first gate electrode formed on the first gate insulator and including a compound of a metal M and a first group-IV elements Si1?a Gea (0?a?1), the p-type device including a p-channel region formed on the substrate, p-type source and drain regions formed opposite to each other interposing the p-channel region therebetween, a second gate insulator formed on the p-channel region, and a second gate electrode formed on the second gate insulator, and including a compound of the metal M and a second group-IV element Si1?c Gec (0?c?1, a?c).
    Type: Application
    Filed: November 29, 2004
    Publication date: June 16, 2005
    Inventors: Yoshinori Tsuchiya, Toshifumi Irisawa, Atsuhiro Kinoshita, Junji Koga
  • Patent number: 6306893
    Abstract: An object of the invention is to develop galactose or mannose derivatives of docetaxel, etc. having improved solubility and physiological activity, to alleviate burden imposed on patients and to provide effective therapeutic drug for tumors. The present invention provides taxoid derivatives comprising any of paclitaxel, docetaxel and 10-deacetyl-baccatin III to which galactose or mannose is linked through a spacer, and methods for producing taxoid derivatives comprising reacting paclitaxel, docetaxel or 10-deacetyl-baccatin III with tetrabenzyl acetyloxygalactoside or tetrabenzyl acetyloxymannoside, subjecting the product to debenzylation reaction, and optionally to detriethylsilylation reaction.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: October 23, 2001
    Assignees: Ensuiko Sugar Refining Company, Ltd, Bio Research Corporation of Yokohama, Kaken Pharmaceutical Company, Ltd.
    Inventors: Tadakatsu Mandai, Hiroshi Okumoto, Koji Hara, Katsuhiko Mikuni, Kozo Hara, Yoshinori Tsuchiya, Kosho Nakamura, Teruhiko Umetsu