Patents by Inventor Yoshio Miki

Yoshio Miki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9389664
    Abstract: Total power consumption of information-processing devices and power supply/cooling facilities is reduced to realize energy saving operation of information-processing system. The information-processing system includes information-processing devices, power supply facilities, cooling facilities and an operations management device. The operations management device is connected to the devices and the facilities and includes layout information constituted of locations and operating information of the devices and locations and environmental information of the facilities. Also, the operations management device obtains the power consumption of the devices, the power supply loss of the power supply facilities and the cooling power of the cooling facilities by using the layout information, and then allocates the workloads to the devices so as to reduce the total sum of power consumption, supply loss and cooling power.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: July 12, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Kato, Tadakatsu Nakajima, Tatsuya Saito, Jun Okitsu, Yoko Shiga, Yoshio Miki
  • Publication number: 20150378414
    Abstract: Total power consumption of information-processing devices and power supply/cooling facilities is reduced to realize energy saving operation of information-processing system. The information-processing system includes information-processing devices, power supply facilities, cooling facilities and an operations management device. The operations management device is connected to the devices and the facilities and includes layout information constituted of locations and operating information of the devices and locations and environmental information of the facilities. Also, the operations management device obtains the power consumption of the devices, the power supply loss of the power supply facilities and the cooling power of the cooling facilities by using the layout information, and then allocates the workloads to the devices so as to reduce the total sum of power consumption, supply loss and cooling power.
    Type: Application
    Filed: September 2, 2015
    Publication date: December 31, 2015
    Inventors: Takeshi KATO, Tadakatsu NAKAJIMA, Tatsuya SAITO, Jun OKITSU, Yoko SHIGA, Yoshio MIKI
  • Patent number: 9128704
    Abstract: Total power consumption of information-processing devices and power supply/cooling facilities is reduced to realize energy saving operation of information-processing system. The information-processing system includes information-processing devices, power supply facilities, cooling facilities and an operations management device. The operations management device is connected to the devices and the facilities and includes layout information constituted of locations and operating information of the devices and locations and environmental information of the facilities. Also, the operations management device obtains the power consumption of the devices, the power supply loss of the power supply facilities and the cooling power of the cooling facilities by using the layout information, and then allocates the workloads to the devices so as to reduce the total sum of power consumption, supply loss and cooling power.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: September 8, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Kato, Tadakatsu Nakajima, Tatsuya Saito, Jun Okitsu, Yoko Shiga, Yoshio Miki
  • Publication number: 20150185223
    Abstract: The present invention is based, in part, on the discovery of isolated nucleic acid molecules encoding mutant RAC polypeptides, or fragments thereof, wherein the mutant RAC polypeptides comprise one or more substitutions of an amino acid in the wild-type RAC polypeptide that renders the mutant RAC polypeptides constitutively active and oncogenic. Isolated mutant RAC polypeptides encoded by such nucleic acid molecules, as well as vectors, host cells, methods of producing encoded polypeptides using such isolated nucleic acid molecules, as well as methods of using mutant RAC nucleic acids and polypeptides for identifying, assessing, prognosing, and treating cancer, are also provided.
    Type: Application
    Filed: July 26, 2013
    Publication date: July 2, 2015
    Inventors: Hiroyuki Mano, Masahito Kawazu, Kengo Takeuchi, Yoshio Miki, Toshihide Ueno
  • Patent number: 8635241
    Abstract: Provided is an information recommendation system capable of recommending an unexpected item which a user is interested in but cannot assume easily. A server gives one or more times of initial recommendations of recommending information by a means of a user profile and a behavior history, and narrows down second recommended items to recommend next by using not only information relating to items having responses but also information relating to items having no response together. In narrowing down, the items are arranged by means of an item arrangement program by using the results of the initial recommendations, and it is identified depending on similarity by means of a boundary calculation program where the boundary between user's interest and no interest is positioned in all the items.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: January 21, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Yasuhide Mori, Yoshio Miki, Masahiro Kato
  • Publication number: 20110314040
    Abstract: Provided is an information recommendation system capable of recommending an unexpected item which a user is interested in but cannot assume easily. A server gives one or more times of initial recommendations of recommending information by a means of a user profile and a behavior history, and narrows down second recommended items to recommend next by using not only information relating to items having responses but also information relating to items having no response together. In narrowing down, the items are arranged by means of an item arrangement program by using the results of the initial recommendations, and it is identified depending on similarity by means of a boundary calculation program where the boundary between user's interest and no interest is positioned in all the items.
    Type: Application
    Filed: February 18, 2009
    Publication date: December 22, 2011
    Inventors: Yasuhide Mori, Yoshio Miki, Masahiro Kato
  • Patent number: 7617087
    Abstract: A construction of the present invention includes a procedure of setting in advance a storing area in a converted instruction storing area table for recording a corresponding relation between a program before conversion and a storing address of a converted program at an initialization processing portion of an emulation program. In setting the storing area, address information on a memory on a portion whose execution frequency is high upon an emulation operation is acquired, and an address that brings about cache conflict on an instruction cache with the portion whose execution frequency is high is excepted and set as an area to store therein a converted instruction.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: November 10, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Akihiro Takamura, Yoshio Miki
  • Publication number: 20090259345
    Abstract: Total power consumption of information-processing devices and power supply/cooling facilities is reduced to realize energy saving operation of information-processing system. The information-processing system includes information-processing devices, power supply facilities, cooling facilities and an operations management device. The operations management device is connected to the devices and the facilities and includes layout information constituted of locations and operating information of the devices and locations and environmental information of the facilities. Also, the operations management device obtains the power consumption of the devices, the power supply loss of the power supply facilities and the cooling power of the cooling facilities by using the layout information, and then allocates the workloads to the devices so as to reduce the total sum of power consumption, supply loss and cooling power.
    Type: Application
    Filed: January 12, 2009
    Publication date: October 15, 2009
    Inventors: Takeshi Kato, Tadakatsu Nakajima, Tatsuya Saito, Jun Okitsu, Yoko Shiga, Yoshio Miki
  • Publication number: 20070238098
    Abstract: A method is disclosed for predicting the risk of the occurrence of granulocytopenia caused by paclitaxel therapy in a subject. The method of the present invention comprises identifying a genetic polymorphism in a gene isolated from the subject for five SNPs in CYP2C8 gene (IMS-JST111898 (SEQ ID NO: 1), IMS-JST105874 (SEQ ID NO: 2), IMS-JST082397 (SEQ ID NO: 3), IMS-JST071852 (SEQ ID NO: 4) and IMS-JST071853 (SEQ ID NO: 5)) and for five SNPs in BUB1b gene (IMS-JST074538 (SEQ ID NO: 6), IMS-JST079837 (SEQ ID NO: 7), IMS-JST044164 (SEQ ID NO: 8), IMS-JST 063023 (SEQ ID NO: 9) and IMS-JST042569 (SEQ ID NO: 10)). A kit comprising a reagent used in the method of the present invention is also disclosed.
    Type: Application
    Filed: November 5, 2004
    Publication date: October 11, 2007
    Inventors: Yoshio Miki, Masaaki Matsuura, Minoru Isomura, Satoshi Miyata, Masataka Yoshimoto, Tetsuo Noda
  • Patent number: 7127717
    Abstract: A hierarchical server system efficiently balances the processing load thereon and for shortening the processing time therein is provided, such as a web server system. A system controller, a load balancing device, and a shared memory are provided in a multi-layer server system made of a plurality of servers. When processing implemented with a first layer server is temporarily stopped in order to acquire information needed for processing from a second layer server, process information needed to resume the processing is recorded in the shared memory. When the necessary information is sent back to the first layer server, the system controller inquires about work statuses of all first layer servers to select another first layer server to resume the processing based upon the inquiry results. The then selected first layer server then resumes the processing using the information that was sent back and the process information in the shared memory.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: October 24, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuya Kawashimo, Yoshio Miki, Hiroaki Fujii, Akihiro Takamura
  • Publication number: 20050160407
    Abstract: For reducing instruction cache misses in emulation by a dynamic conversion method, it is judged whether or not instruction cache conflict with a portion of an emulation program, whose execution frequency is high, occurs in an emulation operation, and only addresses not bringing about cache conflict are set as converted instruction storing areas. Thereby, instruction cache misses in a dynamic conversion type emulator are reduced, and the emulation speed is improved.
    Type: Application
    Filed: September 3, 2004
    Publication date: July 21, 2005
    Inventors: Akihiro Takamura, Yoshio Miki
  • Patent number: 6832298
    Abstract: A main logical unit and a standby logical unit are defined by a process controller in a shared main memory multiprocessor, and an information storage space accessible from both logical units is provided. The main logical unit stores address information onto that information storage space by indicating a memory area it controls as the main memory area. When failover or cloning becomes necessary, the standby logical unit searches the information on the applicable address. Then from the applicable information, it also searches information on the main memory area controlled by the main logical unit to establish in itself and forms a processing environment and state identical to the main logical unit such that the standby logical unit takes over all or a portion of the processing of the main logical unit. This enables the construction of a server system of high operability to overcome failures and poor response times by failover and cloning, etc.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: December 14, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Hiroaki Fujii, Yoshio Miki, Tatsuya Kawashimo, Akihiro Takamura
  • Publication number: 20040237088
    Abstract: A JOB distribution control method for a plurality of Computer Service Centers connected via a network represented by the Grid is provided. When a JOB request occurs in a first Computer Service Center, a current average JOB request interval of the first Computer Service Center is calculated. The necessary number of servers for achieving a predetermined JOB response time is calculated from a predetermined standard JOB request interval, a predetermined standard JOB execution time of servers, and the calculated current average JOB request interval. Only when the number of the servers in the first Computer Service Center is over the calculated necessary number, the JOB request is transmitted to a remote second Computer Service Center.
    Type: Application
    Filed: August 22, 2003
    Publication date: November 25, 2004
    Inventors: Yoshio Miki, Kazuhiko Mizuno
  • Publication number: 20040236742
    Abstract: In a clustering apparatus comprising an input unit (1) supplied with a dataset including a plurality of samples, a data processing unit (4) for processing the samples to classify each sample into a class, and an output unit (3) for producing a processing result representative of classification, a parameter memory (51) in a memory unit (5) memorizes a target parameter obtained from past experiment. A parameter estimating section (24) of the data processing unit estimates a clustering parameter by the use of the target parameter memorized in the parameter memory. An unidentifiable sample detecting section (25) of the data processing unit detects a sample as an unidentifiable sample if posterior probabilities calculated for the sample by a probability density function produced by the clustering parameter estimated by the parameter estimating section are smaller than a predetermined value.
    Type: Application
    Filed: March 5, 2004
    Publication date: November 25, 2004
    Inventors: Maki Ogura, Masataka Andoh, Akira Saitoh, Yusaku Wada, Minoru Isomura, Masaru Ushijima, Satoshi Miyata, Masaaki Matsuura, Yoshio Miki, Shinto Eguchi, Hironori Fujisawa, Toshio Furuta
  • Patent number: 6810474
    Abstract: In a conventional information processor that performs speculative execution of a following instruction having a data dependency, since an arithmetic and logical unit is used in performing the speculative execution and the same ALU is used again when the prediction is wrong, the frequency of use of the ALU increases. To prevent this, a history ALU for outputting a past execution result of an instruction, as it is, as an execution result of the instruction and an instruction issue circuit for issuing an instruction whose operand is the same as a past value to the history ALU are provided with an intention of omitting the actual speculative execution. A Guard cache provided in the history cache stores addresses of instructions that give low prediction accuracy, whereby any instruction whose address has been registered in the Guard cache is prevented from being registered again in the history cache.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: October 26, 2004
    Assignee: Hitachi, Ltd.
    Inventor: Yoshio Miki
  • Publication number: 20040167996
    Abstract: The subject of the present invention is to make an I/O device of a server computer available from a client computer. A hypervisor that stands between an OS and hardware carries out virtualization of the I/O device.
    Type: Application
    Filed: July 30, 2003
    Publication date: August 26, 2004
    Inventors: Akihiro Takamura, Yoshio Miki
  • Publication number: 20040015888
    Abstract: An interpretation flow, a translation and optimization flow, and an original instruction prefetch flow are defined independently of one another. A processor is realized as a chip multiprocessor or realized so that one instruction execution control unit can process a plurality of processing flows simultaneously. The plurality of processing flows is processed in parallel with one another. Furthermore, within the translation and optimization flow, translated instructions are arranged to define a plurality of processing flows. Within the interpretation flow, when each instruction is interpreted, if a translated instruction corresponding to the instruction processed within the translation and optimization flow is present, the translated instruction is executed. According to the present invention, an overhead including translation and optimization that are performed in order to execute instructions oriented to an incompatible processor is minimized.
    Type: Application
    Filed: August 29, 2001
    Publication date: January 22, 2004
    Inventors: Hiroaki Fujii, Yoshikazu Tanaka, Yoshio Miki
  • Patent number: 6640298
    Abstract: A branch prediction apparatus to minimize branch penalties in pipeline or concurrent processing of a sequence of instructions correctly predicts a pattern in which “branch taken” and “branch not taken” alternately appear. The apparatus includes a branch prediction table to keep one history bit and a 2-bit counter for each branch instruction, a prediction generator to output a value of the history bit when the counter has a value of 0 or 2 and to output a value obtained by reversing the history bit when the counter has a value of 1 or 3, and a counter controller which compares a result of branch with a value of the history bit. The counter controller sets 0 to the counter value when the result matches the value and adds one to the counter value when the result does not match the value and the counter value is other than 3.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: October 28, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Yonetaro Totsuka, Yoshio Miki
  • Publication number: 20030154288
    Abstract: In a server-client system, data transmitted by an application of a client computer is stored in a client computer. Whether an application of a server computer terminates normally is reported to the client computer. When the application does not terminate normally, the stored data is retransmitted to another server computer.
    Type: Application
    Filed: July 18, 2002
    Publication date: August 14, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Akihiro Takamura, Yoshio Miki, Hiroaki Fujii, Tatsuya Kawashimo
  • Publication number: 20030120724
    Abstract: A hierarchical server system for efficiently balancing the processing load thereon and for shortening the processing time therein is provided, such as a web server system. A system controller and a shared memory means are provided in a multi-layer server system made of a plurality of servers. When processing implemented with a first layer server is temporarily stopped in order to acquire information needed for processing form a second layer server, process information needed to resume the processing is recorded in the shared memory means. When the necessary information is sent back to the first layer server, the system controller inquires about work status of all first layer servers to select another first layer server to resume the processing based upon the inquiry results. The then selected first layer server then resumes the processing using the information that was sent back and the process information in the shared memory means.
    Type: Application
    Filed: August 13, 2002
    Publication date: June 26, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Tatsuya Kawashimo, Yoshio Miki, Hiroaki Fujii, Akihiro Takamura