Patents by Inventor Yoshio Miki
Yoshio Miki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030079093Abstract: A main logical unit and a standby logical unit are defined by a process controller in a shared main memory multiprocessor, and an information storage space accessible from both logical units is provided. The main logical unit stores address information onto that information storage space by indicating a memory area it controls as the main memory area. When failover or cloning becomes necessary, the standby logical unit searches the information on the applicable address. Then from the applicable information, it also searches information on the main memory area controlled by the main logical unit to establish in itself and forms a processing environment and state identical to the main logical unit such that the standby logical unit takes over all or a portion of the processing of the main logical unit. This enables the construction of a server system of high operability to overcome failures and poor response times by failover and cloning, etc.Type: ApplicationFiled: August 28, 2002Publication date: April 24, 2003Inventors: Hiroaki Fujii, Yoshio Miki, Tatsuya Kawashimo, Akihiro Takamura
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Patent number: 6259383Abstract: In the transmission of a logic signal, there is a reduced maximum value and a reduced average value of the number of bits varied by transforming an input level representation original logic signal having n bits into a transition representation logic signal of m groups with only a maximum of k bits varied, wherein k and m are integer numbers, n is greater than k and each value of k and m is greater than 1. The transformed logic signal of m groups is transmitted. The transmitted logic signal of m groups is then transformed into the original logic signal having n bits. A maximum number of bits varied is k, which can be below n/2 as a maximum, which is less than an average bit variation of the input original signal.Type: GrantFiled: March 15, 1999Date of Patent: July 10, 2001Assignee: Hitachi, Ltd.Inventor: Yoshio Miki
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Patent number: 6162897Abstract: The present invention relates generally to the field of human genetics. Specifically, the present invention relates to methods and materials used to isolate and detect a human breast and ovarian cancer predisposing gene (BRCA1), some mutant alleles of which cause susceptibility to cancer, in particular breast and ovarian cancer. More specifically, the invention relates to germline mutations in the BRCA1 gene and their use in the diagnosis of predisposition to breast and ovarian cancer. The present invention further relates to somatic mutations in the BRCA1 gene in human breast and ovarian cancer and their use in the diagnosis and prognosis of human breast and ovarian cancer. Additionally, the invention relates to somatic mutations in the BRCA1 gene in other human cancers and their use in the diagnosis and prognosis of human cancers. The invention also relates to the therapy of human cancers which have a mutation in the BRCA1 gene, including gene therapy, protein replacement therapy and protein mimetics.Type: GrantFiled: May 2, 1997Date of Patent: December 19, 2000Assignees: Myriad Genetics, Inc., University of Utah Research Foundation, The United States of America as represented by the Department of Health and Human ServicesInventors: Mark H. Skolnick, David E. Goldgar, Yoshio Miki, Jeff Swenson, Alexander Kamb, Keith D. Harshman, Donna M. Shattuck-Eidens, Sean V. Tavtigian, Roger W. Wiseman, P. Andrew Futreal
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Patent number: 6064234Abstract: A logic circuit for use as a selector having multiple inputs and high operation speed. The logic circuit includes a first FET having a first electrode connected to a first power supply, a second electrode connected to an output terminal and a third electrode connected to an intermediate control node, and a plurality of logic blocks parallelly connected between the second power supply and the output terminal. Each logic block includes second and third FETs being of a conductivity type opposite to that of the first FET and connected in series between the output terminal and a second power supply. Each logic block also includes a fourth FET being of the same conductivity type as the second and third FETs and having a third electrode connected to the third electrode of the second FET, a first electrode connected to the third electrode of the third FET and a second electrode connected to the intermediate control node.Type: GrantFiled: August 14, 1998Date of Patent: May 16, 2000Assignee: Hitachi, Ltd.Inventors: Noboru Masuda, Yoshio Miki, Shun Kawabe
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Patent number: 6052776Abstract: A method of effecting a branch operation without the need of instruction fetching is carried out according to the taken/untaken branch with respect to a program containing plural branch instructions, and the method is performed by an apparatus information processing. By detecting a branch instruction stored in an instruction buffer, determining its branch distance and branch condition, and if the branch distance is less than a predetermined positive distance, by then providing that branch condition as an execution condition for the instruction located within said predetermined distance to store in an instruction register, a series of instructions succeeding that branch instruction can be processed into a conditional instruction in the apparatus. The instructions may be continuously executed without refetching instructions, in both cases that a branch condition is taken and untaken. Also, the penalty of miss-prediction of a branch will be minimized.Type: GrantFiled: October 16, 1997Date of Patent: April 18, 2000Assignee: Hitachi, Ltd.Inventors: Yoshio Miki, Kentaro Shimada, Makoto Hanawa
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Patent number: 5881078Abstract: Soft errors generated at an active time are reduced by adding a small-scale circuit to a high performance LSI, such as a processor without reducing the performance of the circuit. The processor has individual logic circuits each having a plurality of stages of logic gates for outputting true signals and complement signals for the individual logic gates. A latch circuit latches the true and complement signals of the logic circuits separately and a compare circuit detects for an error by comparing the true and complement output signals of the logic circuits to determine if they are at the same logical signal level or not, just upstream of the latch in which the individual true and complement output signals of the final logic circuit stages are individually latched. When the compare circuit detects an error because the true and complement output signals are at the same logical signal level, a recovery process is executed.Type: GrantFiled: December 12, 1997Date of Patent: March 9, 1999Assignee: Hitachi, Ltd.Inventors: Makoto Hanawa, Yoshio Miki, Tatsuya Kawashimo
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Patent number: 5761076Abstract: The sum of capacitance is determined by an LSI load characteristic extraction program 217, as for the capacitance of a plurality of wiring patterns constituting different segments of a wiring, between the wiring and a plurality of other wiring patterns adjacent to the wiring, and the resistance of each wiring pattern also is determined. On the basis of the resistance and capacitance, a load characteristic value 222 comprised of a plurality of predetermined lower order coefficients of series expansion of complex admittance at the driving point of that wiring is calculated. A delay calculation program 223 calculates delay time and power dissipation as the driving characteristic of logic gates which drive this wiring, according to the coefficients and a device characteristic library 212.Type: GrantFiled: March 6, 1997Date of Patent: June 2, 1998Assignee: Hitachi, Ltd.Inventor: Yoshio Miki
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Patent number: 5753441Abstract: The present invention relates generally to the field of human genetics. Specifically, the present invention relates to methods and materials used to isolate and detect a human breast and ovarian cancer predisposing gene (BRCA1), some mutant alleles of which cause susceptibility to cancer, in particular breast and ovarian cancer. More specifically, the invention relates to germline mutations in the BRCA1 gene and their use in the diagnosis of predisposition to breast and ovarian cancer. The present invention further relates to somatic mutations in the BRCA1 gene in human breast and ovarian cancer and their use in the diagnosis and prognosis of human breast and ovarian cancer. Additionally, the invention relates to somatic mutations in the BRCA1 gene in other human cancers and their use in the diagnosis and prognosis of human cancers. The invention also relates to the therapy of human cancers which have a mutation in the BRCA1 gene, including gene therapy, protein replacement therapy and protein mimetics.Type: GrantFiled: January 5, 1996Date of Patent: May 19, 1998Assignees: Myriad Genetics, Inc., University of Utah Research Foundation, The United States of America as represented by the Department of Health and Human ServicesInventors: Mark H. Skolnick, David E. Goldgar, Yoshio Miki, Jeff Swenson, Alexander Kamb, Keith D. Harshman, Donna M. Shattuck-Eidens, Sean V. Tavtigian, Roger W. Wiseman, P. Andrew Futreal
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Patent number: 5747282Abstract: The present invention relates generally to the field of human genetics. Specifically, the present invention relates to methods and materials used to isolate and detect a human breast and ovarian cancer predisposing gene (BRCA1), some mutant alleles of which cause susceptibility to cancer, in particular breast and ovarian cancer. More specifically, the invention relates to germline mutations in the BRCA1 gene and their use in the diagnosis of predisposition to breast and ovarian cancer. The present invention further relates to somatic mutations in the BRCA1 gene in human breast and ovarian cancer and their use in the diagnosis and prognosis of human breast and ovarian cancer. Additionally, the invention relates to somatic mutations in the BRCA1 gene in other human cancers and their use in the diagnosis and prognosis of human cancers. The invention also relates to the therapy of human cancers which have a mutation in the BRCA1 gene, including gene therapy, protein replacement therapy and protein mimetics.Type: GrantFiled: June 7, 1995Date of Patent: May 5, 1998Assignees: Myraid Genetics, Inc., University of Utah Research Foundation, The United States of America as represented by the Secretary of Health and Human ServicesInventors: Mark H. Skolnick, David E. Goldgar, Yoshio Miki, Jeff Swenson, Alexander Kamb, Keith D. Harshman, Donna M. Shattuck-Eidens, Sean V. Tavtigian, Roger W. Wiseman, P. Andrew Futreal
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Patent number: 5710001Abstract: The present invention relates generally to the field of human genetics. Specifically, the present invention relates to methods and materials used to isolate and detect a human breast and ovarian cancer predisposing gene (BRCA1), some mutant alleles of which cause susceptibility to cancer, in particular breast and ovarian cancer. More specifically, the invention relates to germline mutations in the BRCA1 gene and their use in the diagnosis of predisposition to breast and ovarian cancer. The present invention further relates to somatic mutations in the BRCA1 gene in human breast and ovarian cancer and their use in the diagnosis and prognosis of human breast and ovarian cancer. Additionally, the invention relates to somatic mutations in the BRCA1 gene in other human cancers and their use in the diagnosis and prognosis of human cancers. The invention also relates to the therapy of human cancers which have a mutation in the BRCA1 gene, including gene therapy, protein replacement therapy and protein mimetics.Type: GrantFiled: June 7, 1995Date of Patent: January 20, 1998Assignees: Myriad Genetics, Inc., University of Utah Research Foundation, The United States of America as represented by the Secretary of Health and Human Services, Technology Transfer OfficeInventors: Mark H. Skolnick, David E. Goldgar, Yoshio Miki, Jeff Swenson, Alexander Kamb, Keith D. Harshman, Donna M. Shattuck-Eidens, Sean V. Tavtigian, Roger W. Wiseman, P. Andrew Futreal
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Patent number: 5245550Abstract: A wiring route is determined between terminals on an integrated circuit on the basis of information concerning the terminals and areas of the integrated circuit through which a wire can be routed. A mesh memory holds information of mesh points of a wiring area partitioned in a mesh-like pattern. A wavefront memory holds information concerning mesh points constituting the leads of searching point arrays. An expansion point extracting unit selects a source point from the mesh points for a succeeding search from the leading mesh points on the basis of costs. Addresses and costs for mesh points neighboring the source point are calculated. A searching point register holds information concerning the mesh points obtained through the calculation. A determination is made of whether or not the mesh points placed in the searching point register can be searched, and if so they are written to the mesh memory. Duplicate information stored in the searching point register is eliminated.Type: GrantFiled: January 15, 1992Date of Patent: September 14, 1993Assignee: Hitachi, Ltd.Inventors: Yoshio Miki, Kei Suzuki, Yoshio Takamine
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Patent number: 4699938Abstract: A pressure-sensitive adhesive composition comprising as a base polymer a mixed block copolymer comprising a polymer block of a monovinyl-substituted aromatic compound and a polymer block of a conjugated diene compound. The pressure-sensitive adhesive composition is useful to seal, for example, corrugated board or carton.Type: GrantFiled: April 4, 1986Date of Patent: October 13, 1987Assignees: Nitto Electric Industrial Co., Ltd., Japan Synthetic Rubber Co., Ltd.Inventors: Yoshihiro Minamizaki, Yoshio Miki, Takayuki Yamamoto, Akira Iio, Toshinori Sakagami
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Patent number: 4487897Abstract: A process for polymerizing acrylic monomers is disclosed. The process involves providing a reactor which is generally in the shape of a screw type reactor having temperature control means thereon. The reactor is continually charged with a supply of acrylic monomers having a viscosity of 10 poises or less at ordinary temperature. The acrylic monomers are continually moved through the reactor by turning of the screw within the reactor in order to cause the acrylic monomers to continually contact renewed surfaces within the reactor. The temperature in the reactor is controlled within two or more zones within the reactor in order to increase the viscosity of the acrylic monomers in the reactor by rapid polymerization within an initial area and then allow polymerization to proceed to one or more additional areas in the reactor to a prescribed rate of conversion. Polymerized product is continuously removed from the reactor.Type: GrantFiled: February 18, 1983Date of Patent: December 11, 1984Assignee: Nitto Electric Industrial Co., Ltd.Inventors: Naoki Matsuoka, Hiroshi Matsumoto, Yutaka Hori, Yoshio Miki, Kenji Sano, Ichiro Ijichi
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Patent number: 4137362Abstract: A pressure sensitive adhesive tape comprising a backing and a pressure sensitive adhesive layer, wherein the backing is produced by stretching a long sheet composed of polypropylene as a main component in the substantially transverse direction, the backing having the properties that the shock edge tearing resistance is below 200g, the elongation at break is above 200% in the lengthwise direction, the tensile strength is above 170 kg/cm.sup.2 in the lengthwise direction and above 800kg/cm.sup.2 in the transverse direction and the impact strength is above 15kg.cm/mm.sup.2 in the lengthwise direction and above 40kg.cm/mm.sup.2 in the transverse direction, and the backing having a thickness of about 10 to 300 microns.Type: GrantFiled: February 10, 1977Date of Patent: January 30, 1979Assignee: Nitto Electric Industrial Co., Ltd.Inventors: Yoshio Miki, Hideo Nishizawa, Yukio Suzuki