Patents by Inventor Yoshitaka Egawa

Yoshitaka Egawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8462237
    Abstract: The solid-state image pickup device includes a sensor unit and a focus adjustment circuit, the focus adjustment circuit including a contour extraction circuit which extracts contour signals from wavelength signals W, B, G, and R, a contour signal selection circuit which receives a control signal and the plurality of contour signals extracted by the contour extraction circuit, and selects and outputs a contour signal having a desired wavelength band in accordance with the control signal, and a plurality of addition circuits which add the wavelength signals before the contour signals are extracted by the contour extraction circuit to a contour signal output from a contour signal output circuit.
    Type: Grant
    Filed: November 11, 2009
    Date of Patent: June 11, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Egawa
  • Patent number: 8456540
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel unit, a flicker detecting unit, a flicker-level estimating unit, and a flicker correcting unit. The flicker detecting unit detects, based on a magnitude relation of a signal amount in each of lines formed in the pixel unit, presence or absence of a flicker. The flicker-level estimating unit estimates a flicker level in each of the lines of the next frame. The flicker correcting unit corrects, for each of the lines, a flicker that occurs in a signal of an image picked up by the pixel unit.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: June 4, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Egawa
  • Patent number: 8436927
    Abstract: According to one embodiment, in a pixel array unit, pixels that accumulate photoelectrically converted charges are arranged in a matrix shape. A vertical signal line transmits a signal read out from the pixels in the vertical direction. An acceleration circuit shifts the potential of the vertical signal line in advance before a signal is read out from the pixels. The acceleration control circuit controls timing for shifting the potential of the vertical signal line in advance. The timing control circuit generates a control signal for controlling the acceleration control circuit.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: May 7, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Egawa
  • Patent number: 8432277
    Abstract: An alarm device includes: a detection device which detects an occurrence of an abnormal condition within a monitoring area; a transmission device which transmits an alarm signal when the detection device detects the abnormal condition; and an output device which, after the transmission device has transmitted the alarm signal, outputs an alarm after a lapse of a predetermined time after the transmission.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: April 30, 2013
    Assignee: Hochiki Corporation
    Inventors: Yoshitaka Egawa, Isao Asano, Hiroshi Shima
  • Publication number: 20130009775
    Abstract: An alarm device including: a reception circuit section; a transmission circuit section; a sensor section which detects abnormal conditions; an alert section; an alarm registration section which, when a registration send mode is in effect to form a linked group, sends a registration event signal containing the transmission source code, and when set to a registration receive mode, registers the transmission source codes contained in event signals received from the other alarm devices in a memory; an abnormal condition monitoring section; and a transmission power switch control section which, when the registration send mode is initiated by the alarm registration section, reduces the transmission power of the transmission circuit section beyond that of normal operation.
    Type: Application
    Filed: July 11, 2012
    Publication date: January 10, 2013
    Applicant: HOCHIKI CORPORATION
    Inventor: Yoshitaka Egawa
  • Publication number: 20130001399
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel array unit that includes pixels configured to accumulate photo-electric converted charges and disposed in a matrix, and a vertical drive circuit that collectively drives the pixels for each line in an accumulating period of each pixel, thereby discharging charges which are accumulated at a predetermined or higher level in the pixels.
    Type: Application
    Filed: March 15, 2012
    Publication date: January 3, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka EGAWA
  • Patent number: 8325256
    Abstract: According to one embodiment, a solid-state imaging device includes, a pixel section, a read pulse amplitude control unit which controls exposure time for which a photo diode carries out the photoelectric conversion and dividing the signal charge accumulated in the photo diode into fractions so that the fractions are read from the photo diode, a plurality of line memories to which the plurality of read signals are saved. And the device further includes an addition unit which synthesizes the plurality of read signals into one signal, the addition unit includes first determination unit which reads the signal saved to the predetermined line memory and comparing a signal level of the read signal with a predetermined level to determine whether or not to add a signal read from a different line memory to the compared signal.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: December 4, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Egawa
  • Publication number: 20120218099
    Abstract: The relay method for an alarm system of the present invention includes: a third process in which a reception intensity of the acknowledgement signal is measured when the source alarm device receives the acknowledgement signal, and in which, if there are one or more destination alarm devices that have not transmitted the acknowledgement signal among all of the destination alarm devices registered in advance, a destination alarm device that has the lowest reception intensity of the acknowledgement signal is assigned as a relay destination alarm device; and a fourth process in which an abnormality signal is relay-transmitted from the source alarm device, through the relay destination alarm device, to the destination alarm devices that are interconnected with the relay destination alarm device, and then, from the destination alarm device that has received the abnormality signal, a signal indicating that a sender thereof is the destination alarm device is outputted, and also an acknowledgement signal is transmitte
    Type: Application
    Filed: November 1, 2010
    Publication date: August 30, 2012
    Applicant: Hochiki Corporation
    Inventors: Yoshitaka Egawa, Hiroshi Shima
  • Patent number: 8253835
    Abstract: Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: August 28, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshitaka Egawa, Shinji Ohsawa
  • Publication number: 20120199723
    Abstract: According to one embodiment, a solid-state imaging device includes: a vertical signal line through which a pixel signal read from the pixel is vertically transmitted; a level-shift circuit that shifts a potential at the vertical signal line; a level-shift control circuit that controls an amount of shifted potential at the vertical signal line; a timing control circuit that generates a control signal controlling the level-shift control circuit; and a pixel signal output control unit that controls an output of the pixel signal based on a change in potential at the vertical signal line when the potential at the vertical signal line shifted by the level-shift circuit is used as a reference.
    Type: Application
    Filed: January 19, 2012
    Publication date: August 9, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka EGAWA
  • Patent number: 8228407
    Abstract: A pixel section outputs R, G and B signals which are obtained by photoelectrically converting light incident on R, G and B pixels. An adding section determines a prescribed area in which a certain pixel is set as a central pixel, and adds the R, G and B signals from the central pixel and peripheral pixels arranged on the periphery of the central pixel in the prescribed area in order to produce an addition signal. A ratio calculating section calculates an average value of each of the R, G and B signals, and a ratio coefficient of the average value of each of the R, G and B signals to a total value of the average values. An RGB generating section generates a new R signal, G signal and B signal by using the addition signal and the ratio coefficients calculated by the ratio calculating section.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: July 24, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Egawa
  • Patent number: 8228402
    Abstract: An imaging area includes an effective pixel section and an optical black section. Pixel signals read out from the imaging area, onto a plurality of vertical signal lines, are converted by an AD conversion circuit. The converted pixel signals are sequentially input to a signal processing circuit for computing processing. The circuit is provided with a horizontal-stripe noise suppression circuit for averaging of output signals, on a plurality of lines, which are readout from an OB section at an end in the horizontal direction in the imaging area, and for adding and subtracting of the averaged result to effective-pixel signals.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: July 24, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Egawa
  • Patent number: 8212899
    Abstract: There is provided an imaging apparatus which uses a defect correction circuit to perform predetermined signal processing with respect to image signals output from an imaging section in which a plurality of pixels each formed of a photoelectric transducer with a color filter provided thereon are two-dimensionally arranged. The defect correction circuit includes a pattern extraction circuit which extracts image pattern information based on a signal of an adjacent pixel that is adjacent to a judgment target pixel and signals of peripheral pixels that are close to the adjacent pixel and have the same color as the adjacent pixel in the image signals, and a substitution circuit which substitutes a signal of the judgment target pixel by signals of peripheral pixels that are close to the judgment target pixel and have the same color as the judgment target pixel.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: July 3, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Egawa
  • Publication number: 20120120286
    Abstract: According to one embodiment, a solid-state imaging apparatus includes: a pixel unit in which pixels are arranged in a matrix form; an electronic shutter scanning circuit controlling an accumulation time of the pixels for each line of the pixel unit; a flicker correction circuit correcting flicker generated in a signal imaged in the pixel unit for each line based on a signal of the pixels of each of the lines in which the accumulation times are different from each other.
    Type: Application
    Filed: September 21, 2011
    Publication date: May 17, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yoshitaka EGAWA
  • Publication number: 20120062776
    Abstract: According to one embodiment, in a pixel array unit, pixels that accumulate photoelectrically converted charges are arranged in a matrix shape. A vertical signal line transmits a signal read out from the pixels in the vertical direction. An acceleration circuit shifts the potential of the vertical signal line in advance before a signal is read out from the pixels. The acceleration control circuit controls timing for shifting the potential of the vertical signal line in advance. The timing control circuit generates a control signal for controlling the acceleration control circuit.
    Type: Application
    Filed: September 7, 2011
    Publication date: March 15, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yoshitaka EGAWA
  • Publication number: 20120008028
    Abstract: According to one embodiment, a pixel outputs a photoelectrically converted signal. A reference ramp generating circuit generates a first ramp wave and a second ramp wave having a step width smaller than that of the first ramp wave. A column ADC circuit performs switching between the first ramp wave and the second ramp wave on the basis of the signal level of the signal from the pixel, compares the ramp wave with the signal level, and detects a signal component of the pixel by CDS.
    Type: Application
    Filed: May 25, 2011
    Publication date: January 12, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka EGAWA
  • Publication number: 20120006974
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel outputting a photoelectrically converted signal, an ADC circuit disposed in an edge portion of a pixel area to convert an analog signal of the pixel into a digital signal on the basis of a result of comparison between a signal level output from the pixel and a ramp wave which is a reference, and a multi-ramp-wave generating circuit generating a plurality of ramp waves with different amplitudes and combining the plurality of ramp waves to obtain the ramp wave.
    Type: Application
    Filed: July 5, 2011
    Publication date: January 12, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yoshitaka EGAWA
  • Patent number: 8094209
    Abstract: An image signal processing apparatus includes a sensing section which includes R, G, and B pixels and produces R, G, and B color signals, a first adding section which adds, while weighting pixels, a color signal of a center pixel of a pixel arrangement and color signals of the peripheral pixels to produce a first addition signal, a contour signal generating section which generates a contour signal from the color signals before the addition, a second adding section which adds the contour signal to the first addition signal to produce a second addition signal, a ratio coefficient calculation section which calculates a ratio coefficient of an average value of the R, G, and B color signals to a sum-up value of the average values, and an RGB signal generating section which generates new R, G, and B signals using the ratio coefficients and the first or second addition signal.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: January 10, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Egawa
  • Publication number: 20110304757
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel array unit where pixels are disposed in a matrix and a column amplifying circuit that is disposed at an end of the pixel array unit and amplifies a unit signal of a unit pixel read from each pixel with at least first and second amplification factors, and outputs a plurality of amplified signals.
    Type: Application
    Filed: May 13, 2011
    Publication date: December 15, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka EGAWA
  • Publication number: 20110273601
    Abstract: According to one embodiment, a pixel includes a first amplifier transistor for amplifying a photoelectrically converted signal, a vertical signal line transmits the signal read from the pixel in a vertical direction, and a second amplifier transistor forms a differential pair with the first amplifier transistor and amplifies the signal read by the vertical signal line through the first amplifier transistor.
    Type: Application
    Filed: May 6, 2011
    Publication date: November 10, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yoshitaka EGAWA