Patents by Inventor Yoshitaka Nakamura

Yoshitaka Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240302288
    Abstract: An inspection device 50 for a filter inspects the filter, which is provided to a flavor inhalation article. The filter is provided with a mouthpiece end, a solid material, and a communication path that communicates with the solid material and opens to the mouthpiece end. The inspection device is provided with: an illumination for irradiating an inspection light onto the mouthpiece end in an irradiation direction that extends along the axial direction X; a camera for photographing the peripheral surface of the filter in a photographing direction that extends along the radial direction Y of the filter; an image processing unit for processing an image photographed by the camera and detecting a shadow of the solid material; and, an assessment unit for assessing the presence or absence and the quality of the solid material 12 on the basis of the shadow detected by the image processing unit.
    Type: Application
    Filed: May 17, 2024
    Publication date: September 12, 2024
    Applicant: Japan Tobacco Inc.
    Inventors: Shota KOBAYASHI, Satoshi NAKAMURA, Masahiro IMUTA, Yoshitaka MATSUMOTO, Akari ODAHARA
  • Publication number: 20240301236
    Abstract: An electrophotographic roller comprising a substrate comprising a conductive outer surface and a resin layer on the outer surface of the substrate, wherein the resin layer comprises a polyurethane having a polycarbonate structure, an impedance at a frequency of 1.0×100 to 1.0×101 Hz is 1.00×106? or more when a specific AC voltage is applied to the outer surface of the electrophotographic roller while a frequency is changed between specific range, and when a corona discharger having a grid part is moved along an axial direction of the electrophotographic roller at a speed of 400 mm/sec, a maximum value of an electric potential of the outer surface is less than 20.0 V when measured at 0.06 seconds after a passage of the grid part.
    Type: Application
    Filed: February 26, 2024
    Publication date: September 12, 2024
    Inventors: ATSUSHI NOGUCHI, MINORU NAKAMURA, YOSHITAKA SUZUMURA, SOUYA YAMANE
  • Publication number: 20240295255
    Abstract: A telescopic device includes an expandable tubular structure and an inner-side guide member disposed inside the tubular structure. The tubular structure includes an outer belt and an inner belt. The outer belt and the inner belt each have a plurality of first protrusions and holes arranged in a row in the longitudinal direction. The inner-side guide member has a first spiral groove extending along the plurality of first protrusions. When the inner-side guide member rotates in one direction, the outer belt and the inner belt are sent out, so that they are spirally wound while being engaged with each other, and the tubular structure extends. The first spiral groove has a body and an end portion extending from the body toward the root of the inner-side guide member. The distance between the end portion of the first spiral groove and the main part of the first spiral groove is small.
    Type: Application
    Filed: January 5, 2024
    Publication date: September 5, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yoshitaka HADA, Shiyogo NAKAMURA, Yoshihiro OKUDA, Takatoshi MORIMITSU
  • Publication number: 20240295405
    Abstract: An information processing device and an information processing method determine a vehicle to be allocated to a user based on a vehicle allocation request from an information terminal operated by a user, calculate an accuracy of a position of the information terminal based on a position data indicating the position of an information terminal, extract a waiting point that is a candidate for a point where the user and the vehicle meet, based on the position data, and transmit the waiting point to the information terminal. Here, a number of waiting points extracted when the accuracy is low is greater than a number of waiting points extracted when the accuracy is high.
    Type: Application
    Filed: March 17, 2021
    Publication date: September 5, 2024
    Applicants: Nissan Motor Co., Ltd., RENAULT S.A.S.
    Inventors: Yoshitaka Takagi, Masahide Nakamura
  • Publication number: 20240282856
    Abstract: Some embodiments include an integrated assembly having an access device between a storage element and a conductive structure. The access device has channel material which includes semiconductor material. The channel material has a first end and an opposing second end, and has a side extending from the first end to the second end. The first end is adjacent the conductive structure, and the second end is adjacent the storage element. Conductive gate material is adjacent the side of the channel material. A first domed metal-containing cap is over the conductive structure and under the channel material and/or a second domed metal-containing cap is over the channel material and under the storage element. Some embodiments include methods of forming integrated assemblies.
    Type: Application
    Filed: April 26, 2024
    Publication date: August 22, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Yoshitaka Nakamura, Yi Fang Lee, Jerome A. Imonigie, Scott E. Sills, Aaron Michael Lowe
  • Patent number: 12061236
    Abstract: This power conversion device has: a current measurement unit for measuring phase current; a current vector calculation unit for calculating a current vector by performing 3-phase to 2-phase conversion on the phase current; an amount-to-be-analyzed calculation unit for calculating, on the basis of the current vector, an amount to be analyzed; and a feature amount waveform extraction unit for extracting a waveform in a specific frequency range on the basis of the amount to be analyzed.
    Type: Grant
    Filed: November 28, 2019
    Date of Patent: August 13, 2024
    Assignee: Hitachi Industrial Equipment Systems Co., Ltd.
    Inventors: Kohji Maki, Yoshitaka Iwaji, Hironori Ohashi, Atsuhiko Nakamura
  • Patent number: 12049538
    Abstract: An epoxy resin includes an epoxy compound having a mesogenic structure, a cured product of the epoxy resin having a flexural modulus of 3.0 GPa or more at 23° C., a fracture toughness of 1.0 MPa·m1/2 or more, and a glass transition temperature of 150° C. or higher.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: July 30, 2024
    Assignee: SHOWA DENKO MATERIALS CO., LTD.
    Inventors: Naoki Maruyama, Tomoko Higashiuchi, Kazumasa Fukuda, Hideyuki Katagi, Yuki Nakamura, Yoshitaka Takezawa
  • Patent number: 12015080
    Abstract: Some embodiments include an integrated assembly having an access device between a storage element and a conductive structure. The access device has channel material which includes semiconductor material. The channel material has a first end and an opposing second end, and has a side extending from the first end to the second end. The first end is adjacent the conductive structure, and the second end is adjacent the storage element. Conductive gate material is adjacent the side of the channel material. A first domed metal-containing cap is over the conductive structure and under the channel material and/or a second domed metal-containing cap is over the channel material and under the storage element. Some embodiments include methods of forming integrated assemblies.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: June 18, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Yoshitaka Nakamura, Yi Fang Lee, Jerome A. Imonigie, Scott E. Sills, Aaron Michael Lowe
  • Publication number: 20240194416
    Abstract: An electrolytic capacitor includes an anode body that includes a porous body and a dielectric layer covering the porous body, and a solid electrolyte layer that covers the dielectric layer. The porous body has a first region located near an outer surface of the porous body, and a second region other than the first region. The first region is a region in which a distance from the outer surface of the porous body is shorter than 0.5D, where D is a shortest distance between the outer surface of the porous body and a center of the porous body. A filling proportion R2 of the solid electrolyte layer in the second region is less than a filling proportion R1 of the solid electrolyte layer in the first region. A ratio R2/R1 of the filling proportion R2 to the filling proportion R1 is less than or equal to 1/10.
    Type: Application
    Filed: April 25, 2022
    Publication date: June 13, 2024
    Inventors: JUNKO ONOZAKI, YUKI UEDA, YOSHIHISA NAGASAKI, YOSHITAKA NAKAMURA
  • Patent number: 11998360
    Abstract: A wearable device attached to a subject includes an accelerometer that measures acceleration information, and a biological sensor that measures biological signal information of the subject. From the measured acceleration information and biological signal information, first feature data corresponding to a first predetermined period and second feature data corresponding to a second predetermined period are extracted. By machine learning based on the first feature data, a dynamic/static activity identification model, a dynamic-activity identification model, and a static-activity identification model, for the subject, are generated. By combination of results of determination based on each of the identification models, a posture and an activity of the subject are identified and correspondence information, which associates the identified posture and activity with the biological signal information of the subject, is generated.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: June 4, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Keitaro Horikawa, Yoshitaka Nakamura, Masato Sawada, Akihiro Yamanaka, Shingo Tsukada, Toshiya Yamada
  • Publication number: 20240098969
    Abstract: Systems, methods and apparatus are provided for an array of vertically stacked memory cells having horizontally oriented access devices and storage nodes formed in tiers. And, more particularly, to multiple, alternating silicon germanium (SiGe) and single crystalline silicon (Si) in different thicknesses to form tiers in which to form the horizontal access devices in vertical three-dimensional (3D) memory. The horizontally oriented access devices can have a first source/drain regions and a second source drain regions separated by single crystalline silicon (Si) channel regions. The single crystalline silicon (Si) channel regions can include a dielectric material to provide support structure to the single crystalline channel regions when forming the horizontal access devices in vertical three-dimensional (3D) memory. Horizontally oriented access lines can connect to gate structures opposing the channel regions. Vertical digit lines coupled to the first source/drain regions.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 21, 2024
    Inventors: David K. Hwang, Yoshitaka Nakamura, Scott E. Sills, Si-Woo Lee, Yuanzhi Ma, Glen H. Walters
  • Publication number: 20240098970
    Abstract: Systems, methods and apparatus are provided for an array of vertically stacked memory cells having horizontally oriented access devices and storage nodes. The horizontally oriented access devices having a first source/drain regions and a second source drain regions separated by silicon (Si) channel regions. A digit line having a global digit line (GDL) contact is formed in a trench adjacent to the first source/drain regions. In one example, the digit line is electrically isolated from a neighboring digit line at the bottom of the trench. In another example, the digit line is formed continuously along a bottom surface of trench to form shared digit lines between horizontal access devices, in two separate arrays, on opposing second vertical surfaces. The memory cells have horizontally oriented storage nodes coupled to the second source/drain regions and vertical digit lines coupled to the first source/drain regions.
    Type: Application
    Filed: September 16, 2022
    Publication date: March 21, 2024
    Inventors: Scott E. Sills, Si-Woo Lee, David K. Hwang, Yoshitaka Nakamura, Yuanzhi Ma, Glen H. Walters
  • Patent number: 11932263
    Abstract: A travel sickness estimation system includes an estimation unit and an output unit. The estimation unit is configured to perform estimation processing of estimating, based on person information indicating conditions of a person who is on board a moving vehicle, whether or not the person is in circumstances that would cause travel sickness for him or her. The output unit is configured to output a result of the estimation processing performed by the estimation unit.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yuta Moriura, Yoshitaka Nakamura, Yasufumi Kawai, Hiroyuki Handa, Yohei Morishita, Toru Okino, Hiroyuki Hagino, Toru Sakuragawa, Satoshi Morishita
  • Publication number: 20240074141
    Abstract: Methods and devices for a lateral three-dimensional memory device, are described herein. One method includes forming a thin film transistor including a first thermal process having a first range of temperatures, forming a capacitor bottom electrode of a capacitor structure including a second thermal process having a second range of temperature, wherein a maximum temperature in the second range of temperatures is less than a maximum temperature in the first range of temperatures, forming a CMOS structure including a third thermal process having a third range of temperatures, wherein a maximum temperature in the third range of temperatures is less than a maximum temperature in the second range of temperatures, and forming at least one other part of the capacitor structure.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Inventors: Yoshitaka Nakamura, Yuanzhi Ma, Scott E. Sills, Si-Woo Lee, David K. Hwang
  • Patent number: 11848360
    Abstract: Some embodiments include an integrated assembly containing a first structure which includes one or more transition metals, and containing a second structure over the first structure. The second structure has a first region directly against the first structure and has a second region spaced from the first structure by a gap region. The second structure includes semiconductor material having at least one element selected from Group 13 of the periodic table in combination with at least one element selected from Groups 15 and 16 of the periodic table. An ionic compound is within the gap region. Some embodiments include a method of forming an integrated assembly.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: December 19, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Yoshitaka Nakamura, Devesh Dadhich Shreeram, Yi Fang Lee, Scott E. Sills, Jerome A. Imonigie, Kaustubh Shrimali
  • Publication number: 20230400261
    Abstract: A Ni—Ti-based alloy contains a Ni atom, a Ti atom, and a Si atom. The Ni—Ti-based alloy has a heat-absorbing/generating property.
    Type: Application
    Filed: November 8, 2021
    Publication date: December 14, 2023
    Inventors: Yoshitaka NAKAMURA, Kotaro ONO, Tatsuya NAKAMURA, Kentaro SHII
  • Publication number: 20230397390
    Abstract: Systems, methods and apparatus are provided for an array of vertically stacked memory cells having horizontally oriented access devices and storage nodes formed in tiers. And, more particularly, to multiple, alternating epitaxially grown silicon germanium (SiGe) and single crystalline silicon (Si) in different thicknesses to form tiers in which to form the horizontal access devices in vertical three dimensional (3D) memory. The horizontally oriented access devices can have a first source/drain regions and a second source drain regions separated by epitaxially grown, single crystalline silicon (Si) channel regions. Horizontally oriented access lines can connect to gate all around (GAA) structures opposing the channel regions. Vertical digit lines coupled to the first source/drain regions.
    Type: Application
    Filed: August 15, 2022
    Publication date: December 7, 2023
    Inventors: David K. Hwang, John F. Kaeding, Matthew S. Thorum, Yuanzhi Ma, Scott E. Sills, Si-Woo Lee, Yoshitaka Nakamura, Glen H. Walters
  • Publication number: 20230397391
    Abstract: Systems, methods and apparatus are provided for an array of vertically stacked memory cells having horizontally oriented access devices and storage nodes. The horizontally oriented access devices having a first source/drain regions and a second source drain regions separated by epitaxially grown, single crystalline silicon (Si) channel regions. A support structure is provided to the epitaxially grown, single crystalline Si. Horizontally oriented access lines connect to gates opposing the channel regions formed fully around every surface of the channel region as gate all around (GAA) structures separated from the channel regions by gate dielectrics. The memory cells have horizontally oriented storage nodes coupled to the second source/drain regions and vertical digit lines coupled to the first source/drain regions.
    Type: Application
    Filed: August 15, 2022
    Publication date: December 7, 2023
    Inventors: Si-Woo Lee, Scott E. Sills, David K. Hwang, Yoshitaka Nakamura, Yuanzhi Ma, Glen H. Walters
  • Patent number: 11703647
    Abstract: An optical fiber securing structure includes: an optical fiber including a coating, and a coating-removed section in which a partial section of the coating is removed from the optical fiber; a reinforcement member including main surfaces and a groove formed from one of the main surfaces toward an inside of the reinforcement member, where the groove has a pair of side walls and a bottom wall; and a resin member that secures the coating-removed section to the pair of side walls and the bottom wall. A bottom part of the groove that includes the bottom wall has a widthwise cross-sectional shape where the bottom wall constitutes a trapezoidal shape such that a distance between the pair of side walls becomes greater in a direction away from the bottom wall.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: July 18, 2023
    Assignee: Fujikura Ltd.
    Inventors: Ryokichi Matsumoto, Yoshitaka Nakamura, Naoyuki Sugiyama, Hiroto Nakazato, Yasushi Oikawa, Akari Takahashi
  • Publication number: 20230010884
    Abstract: A heat transfer device includes a first member and a first and second heat transfer element. In the first heat transfer element, a first contact area that is a contact area between the first heat transfer element and the first member varies. In the second heat transfer element, a second contact area that is a contact area between the second heat transfer element and the first member varies. The first contact area is greater when magnitude of a first external force applied to the first member is smaller than a first threshold than when the magnitude of the first external force is equal to or greater than the first threshold. The second contact area is smaller when the magnitude of the first external force is smaller than the first threshold than when the magnitude of the first external force is equal to or greater than the first threshold.
    Type: Application
    Filed: October 29, 2020
    Publication date: January 12, 2023
    Inventors: Kentaro SHII, Yoshitaka NAKAMURA, Tatsuya NAKAMURA, Yusuke OGIHARA