Patents by Inventor Yoshitaka Nakamura

Yoshitaka Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050230712
    Abstract: A method includes the steps of: implanting boron into a surface region of a silicon substrate to form a p+ diffused region; implanting indium into the surface of the p+ diffused region, to form an indium-implanted layer; forming a contact metal layer on the indium-implanted layer; and reacting silicon in the silicon substrate including the indium-implanted layer with metal in the contact metal layer to form a titanium silicide layer.
    Type: Application
    Filed: April 6, 2005
    Publication date: October 20, 2005
    Inventors: Shigetomi Michimata, Ryo Nagai, Satoru Yamada, Yoshitaka Nakamura, Ryoichi Nakamura
  • Publication number: 20050231787
    Abstract: A micro-oscillation element includes a frame, a movable functional part, a driving mechanism, a beam extending from the functional part to the driving mechanism, and a torsion connector for connecting the frame and the beam to each other. The connector defines a rotational axis about which the functional part rotates. The rotational axis crosses the longitudinal direction of the beam. The beam is shorter than the functional part in the longitudinal direction of the rotational axis.
    Type: Application
    Filed: August 26, 2004
    Publication date: October 20, 2005
    Applicants: FUJITSU LIMITED, FUJITSU MEDIA DEVICES LIMITED
    Inventors: Osamu Tsuboi, Norinao Kouma, Hisao Okuda, Hiromitsu Soneda, Satoshi Ueda, Ippei Sawaki, Yoshitaka Nakamura
  • Publication number: 20050217378
    Abstract: An inertial sensor comprising a sensing portion having a weight hung by beams extending from a frame, the weight being a movable portion. The beams include distortion portions partially arranged therein, and the distortion portions are arranged to avoid edges on which stresses applied to the beams are concentrated. Roots of the beams are not formed at right angle in connecting to the weights or the frame. The roots of the beams have wider angles. It is thus possible to dissipate areas on which stresses are concentrated and improve the impact resistance without sacrificing the sensor sensitivity. Both high sensor sensitivity and the impact resistance are obtainable in accordance with the present invention.
    Type: Application
    Filed: March 15, 2005
    Publication date: October 6, 2005
    Inventors: Hiroshi Ishikawa, Yoshitaka Nakamura, Hiroshi Tokunaga, Kenji Nagata
  • Publication number: 20050217373
    Abstract: An inertial sensor includes a sensing portion having a weight supported by beams, the weight being a movable portion, and a weight stopper that limits a movable range of the weight, the weight stopper being arranged in a vicinity of the weight with a given clearance and being a part of a substrate for the inertial sensor processed with MEMS techniques.
    Type: Application
    Filed: March 29, 2005
    Publication date: October 6, 2005
    Inventors: Hiroshi Ishikawa, Yoshitaka Nakamura, Hiroshi Tokunaga, Kenji Nagata
  • Patent number: 6944080
    Abstract: A dynamic RAM comprising a plurality of word lines respectively connected to address select terminals of a plurality of dynamic memory cells, a plurality of complementary bit line pairs respectively connected to input/output terminals of the plurality of dynamic memory cells and placed in directions opposite to one another, and a sense amplifier array which is supplied with an operating voltage according to an operation timing signal and comprises a plurality of latch circuits for respectively amplifying the differences in voltage between the complementary bit line pairs. In the dynamic RAM, common electrodes provided in opposing relationship to storage nodes corresponding to connecting points between address select MOSFETs and information storage capacitors of the plurality of dynamic memory cells, on both sides with the sense amplifier array as the center are connected to one another while circuit connections in the sense amplifier array are being ensured by wiring using the common electrodes.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: September 13, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Tomonori Sekiguchi, Kazuhiko Kajigaya, Katsutaka Kimura, Riichiro Takemura, Tsugio Takahashi, Yoshitaka Nakamura
  • Patent number: 6927439
    Abstract: A semiconductor device equipped with information storage capacitor comprising a first capacitor electrode, an oxide film, a second capacitor electrode and insulating films containing silicon as a main constituting element, wherein at least one of first and second capacitor electrodes contains as a main constituting element at least one element selected from rhodium, ruthenium, iridium, osmium and platinum, and as an adding element at least one element selected from palladium, nickel, cobalt and titanium, is excellent in adhesiveness between the capacitor electrodes and the insulating films.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: August 9, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Moriya, Tomio Iwasaki, Hiroyuki Ohta, Shinpei Iijima, Isamu Asano, Yuzuru Ohji, Yoshitaka Nakamura
  • Patent number: 6922568
    Abstract: In a communication system which has a base station, a mobile station and an object device controllable by the mobile station, the mobile station monitors status of the object device to detect whether or not the object device is ready to receive a data signal sequence sent through the mobile station. Such a data signal sequence may be either a voice data signal or an image data signal. The mobile station can transmit, towards the base station, a response determined by the status of the object device. A reception state of the object device may be switched from one to another to selectively receive the voice and the image data signals.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: July 26, 2005
    Assignee: NEC Corporation
    Inventor: Yoshitaka Nakamura
  • Publication number: 20050118762
    Abstract: After an upper electrode protective film is formed such that it is in a firm contact with ruthenium film of the upper electrode without damaging the ruthenium film, the upper electrode is etched, thereby, a MIM capacitor is obtained in which leak current is not increased due to oxidation of the ruthenium film of the upper electrode.
    Type: Application
    Filed: November 30, 2004
    Publication date: June 2, 2005
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Yoshitaka Nakamura, Tsuyoshi Kawagoe, Hiroshi Sakuma, Isamu Asano, Keiji Kuroki, Hidekazu Goto, Shinpei Iijima
  • Patent number: 6894423
    Abstract: A piezoelectric electroacoustic transducer is miniaturized and has a reduced frequency, and even when a diaphragm has a warp or winding, the resonance frequency is be stabilized. The piezoelectric electroacoustic transducer includes a substantially rectangular piezoelectric diaphragm flexurally vibrating in a thickness direction in response to the application of an alternating signal between electrodes and a casing for accommodating the piezoelectric diaphragm, wherein the casing is provided with supporting members for supporting four corners of the piezoelectric diaphragm.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: May 17, 2005
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tetsuo Takeshima, Yoshitaka Nakamura, Kiyotaka Tajima
  • Patent number: 6881649
    Abstract: A plurality of micromirror chips are collectively made from a common substrate. Each of the micromirror chips is formed with a micromirror unit including a frame, a mirror-forming portion separate from the frame via spaces, and torsion bars connecting the mirror-forming portion to the frame. The common substrate is subjected to etching to provide the spaces and make division grooves for dividing the common substrate into the individual micromirror chips. The etching for the spaces and the etching for the division grooves are performed in parallel with each other.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: April 19, 2005
    Assignees: Fujitsu Limited, Fujitsu Media Devices Limited
    Inventors: Norinao Kouma, Yoshihiro Mizuno, Hisao Okuda, Ippei Sawaki, Osamu Tsuboi, Yoshitaka Nakamura
  • Publication number: 20050046504
    Abstract: A micro-oscillation element includes an oscillation section and a frame. The oscillation section is provided with a mirror surface and is connected to the frame via trapezoidal first and second springs. The oscillation section is located between the first spring and the second spring. Each of the first spring and the second spring is deformable along with the oscillation of the oscillation section.
    Type: Application
    Filed: March 4, 2004
    Publication date: March 3, 2005
    Applicants: FUJITSU LIMITED, FUJITSU MEDIA DEVICES LIMITED
    Inventors: Mi Xiaoyu, Satoshi Ueda, Hisao Okuda, Osamu Tsuboi, Hiromitsu Soneda, Norinao Kouma, Ippei Sawaki, Yoshitaka Nakamura
  • Publication number: 20050040452
    Abstract: The semiconductor device is formed according to the following steps. A TiN film 71 and a W film 72 are deposited on a silicon oxide film 64 including the inside of a via-hole 66 by the CVD method and thereafter, the W film 72 and TiN film 71 on the silicon oxide film 64 are etched back to leave only the inside of the via-hole 66 and form a plug 73. Then, a TiN film 74, Al-alloy film 75, and Ti film 76 are deposited on the silicon oxide film 64 including the surface of the plug 73 by the sputtering method and thereafter, the Ti film 76, Al-alloy film 75, and TiN film 74 are patterned to form second-layer wirings 77 and 78.
    Type: Application
    Filed: October 7, 2004
    Publication date: February 24, 2005
    Inventors: Yoshitaka Nakamura, Tsuyoshi Tamaru, Naoki Fukuda, Hidekazu Goto, Isamu Asano, Hideo Aoki, Keizo Kawakita, Satoru Yamada, Katsuhiko Tanaka, Hiroshi Sakuma, Masayoshi Hirasawa
  • Publication number: 20050035682
    Abstract: A micro-oscillation element includes a movable main section, a first frame and a second frame, and a first connecting section that connects the movable main section and the first frame and defines a first axis of rotation for a first rotational operation of the movable main section with respect to the first frame. The element further includes a second connecting section that connects the first frame and the second frame and defines a second axis of rotation for a second rotational operation of the first frame and the movable main section with respect to the second frame. A first drive mechanism is provided for generating a driving force for the first rotational operation. A second drive mechanism is provided for generating a driving force for the second rotational operation. The first axis of rotation and the second axis of rotation are not orthogonal.
    Type: Application
    Filed: March 3, 2004
    Publication date: February 17, 2005
    Applicants: FUJITSU LIMITED, FUJITSU MEDIA DEVICES LIMITED
    Inventors: Osamu Tsuboi, Norinao Kouma, Hisao Okuda, Hiromitsu Soneda, Mi Xiaoyu, Satoshi Ueda, Ippei Sawaki, Yoshitaka Nakamura
  • Publication number: 20050037531
    Abstract: A method for manufacturing a micro-structural unit is provided. By the method, micro-machining is performed on a material substrate including first through third conductive layers and two insulating layers, one of which is interposed between the first and the second conductive layers, and the other between the second and the third conductive layers. The method includes several etching steps performed on the layers of the material substrate that are different in thickness.
    Type: Application
    Filed: March 4, 2004
    Publication date: February 17, 2005
    Applicants: FUJITSU LIMITED, FUJITSU MEDIA DEVICES LIMITED
    Inventors: Norinao Kouma, Osamu Tsuboi, Hisao Okuda, Hiromitsu Soneda, Mi Xiaoyu, Satoshi Ueda, Ippei Sawaki, Yoshitaka Nakamura
  • Patent number: 6856695
    Abstract: A portable information terminal device comprising: an enclosure of the portable information terminal device, an imaging element provided within the enclosure, a first lens provided within the enclosure for the imaging element, a second lens, which focal length is shorter than that of the first lens, provided within the enclosure for the imaging element, a lens selection means, provided within the enclosure, for selecting one of the first lens and the second lens so that a focal point of a selected lens is at the imaging element, and a transparent plate for pressing a tip of a finger of a user of the portable information terminal device, wherein the imaging element captures a fingerprint of the tip of the finger on the transparent plate by the second lens selected by the lens selection means.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: February 15, 2005
    Assignee: NEC Corporation
    Inventors: Yoshitaka Nakamura, Naoki Hikishima
  • Publication number: 20050030783
    Abstract: Disclosed herein is a dynamic RAM comprising a plurality of word lines respectively connected to address select terminals of a plurality of dynamic memory cells, a plurality of complementary bit line pairs respectively connected to input/output terminals of the plurality of dynamic memory cells and placed in directions opposite to one another, and a sense amplifier array which is supplied with an operating voltage according to an operation timing signal and comprises a plurality of latch circuits for respectively amplifying the differences in voltage between the complementary bit line pairs.
    Type: Application
    Filed: September 13, 2004
    Publication date: February 10, 2005
    Inventors: Tomonori Sekiguchi, Kazuhiko Kajigaya, Katsutaka Kimura, Riichiro Takemura, Tsugio Takahashi, Yoshitaka Nakamura
  • Patent number: 6853081
    Abstract: The semiconductor device is formed according to the following steps. A TiN film 71 and a W film 72 are deposited on a silicon oxide film 64 including the inside of a via-hole 66 by the CVD method and thereafter, the W film 72 and TiN film 71 on the silicon oxide film 64 are etched back to leave only the inside of the via-hole 66 and form a plug 73. Then, a TiN film 74, Al-alloy film 75, and Ti film 76 are deposited on the silicon oxide film 64 including the surface of the plug 73 by the sputtering method and thereafter, the Ti film 76, Al-alloy film 75, and TiN film 74 are patterned to form second-layer wirings 77 and 78.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: February 8, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Yoshitaka Nakamura, Tsuyoshi Tamaru, Naoki Fukuda, Hidekazu Goto, Isamu Asano, Hideo Aoki, Keizo Kawakita, Satoru Yamada, Katsuhiko Tanaka, Hiroshi Sakuma, Masayoshi Hirasawa
  • Publication number: 20050024811
    Abstract: A semiconductor device equipped with information storage capacitor comprising a first capacitor electrode, an oxide film, a second capacitor electrode and insulating films containing silicon as a main constituting element, wherein at least one of first and second capacitor electrodes contains as a main constituting element at least one element selected from rhodium, ruthenium, iridium, osmium and platinum, and as an adding element at least one element selected from palladium, nickel, cobalt and titanium, is excellent in adhesiveness between the capacitor electrodes and the insulating films.
    Type: Application
    Filed: August 23, 2004
    Publication date: February 3, 2005
    Inventors: Hiroshi Moriya, Tomio Iwasaki, Hiroyuki Ohta, Shinpei Iijima, Isamu Asano, Yuzuru Ohji, Yoshitaka Nakamura
  • Publication number: 20040251417
    Abstract: A side tube includes a tube head, a funnel-shaped connection neck, and a tube main body, which are arranged along a tube axis and which are integrated together into the side tube. The size of a cross section of the tube head perpendicular to the tube axis is larger than the size of a cross section of the tube main body perpendicular to the tube axis. The radius of curvature of rounded corners of the tube head is smaller than the radius of curvature of rounded corners of the tube main body. The length of the tube head along the tube axis is shorter than the length of the tube main body along the tube axis. One surface of a faceplate is connected to the tube head. A photocathode is formed on the surface of the faceplate in its area located inside the tube head.
    Type: Application
    Filed: February 4, 2004
    Publication date: December 16, 2004
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Teruhiko Yamaguchi, Suenori Kimura, Minoru Suzuki, Yoshitaka Nakamura
  • Publication number: 20040248362
    Abstract: A semiconductor device includes memory cells each having an MISFET for memory selection formed on one major surface of a semiconductor substrate and a capacitive element comprised of a lower electrode electrically connected at a bottom portion to one of a source and drain of the MISFET for memory selection via a first metal layer and an upper electrode formed on the lower electrode via a capacitive insulating film. The lower electrode has a thickness of 30 nm or greater at the bottom portion thereof. Sputtering with a high ionization ratio and high directivity, such as PCM, is adapted to the formation of the lower electrode to make only the bottom portion of a capacitor thicker.
    Type: Application
    Filed: February 13, 2004
    Publication date: December 9, 2004
    Applicants: ELPIDA MEMORY, INC., Hitachi ULSI Systems, Co., Ltd., HITACHI LTD.
    Inventors: Yoshitaka Nakamura, Hidekazu Goto, Isamu Asano, Mitsuhiro Horikawa, Keiji Kuroki, Hiroshi Sakuma, Kenichi Koyanagi, Tsuyoshi Kawagoe