Patents by Inventor Yoshito Sakurai
Yoshito Sakurai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7058062Abstract: A packet switching system including at least one switching node or local unit each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch based on a logic channel on a packet circuit, a self-routing switch for performing switching based on the output port information, and a control unit for terminating a control packet and performing the call processing function. A switching node or tandem unit is provided including at least one self-routing switch for interconnecting the local units. A device is provided for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating-side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device.Type: GrantFiled: January 9, 2002Date of Patent: June 6, 2006Assignee: Hitachi, Ltd.Inventors: Shirou Tanabe, Taihei Suzuki, Shinobu Gohara, Yoshito Sakurai, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 7046630Abstract: This invention provides a network management equipment and a packet switching equipment which eliminate a connection setup delay time, reduce a delay and a delay variation involved in data transfer, and effectively perform connectionless data flow processing in a large data network. The network is divided into a connection-oriented core network and a plurality of connectionless access networks connected to the core network where a plurality of connections (called permanent virtual route (PVR)) are set up among a plurality of edge nodes. The network management equipment selects one route from a plurality of PVRs for connectionless data flow received from one of the access networks and transfers data along the PVR.Type: GrantFiled: November 1, 2002Date of Patent: May 16, 2006Assignee: Hitachi, Ltd.Inventors: Hajime Abe, Kazuho Miki, Noboru Endo, Akihiko Takase, Yoshito Sakurai
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Patent number: 6728242Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.Type: GrantFiled: February 28, 2003Date of Patent: April 27, 2004Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Kenichi Ohtsuki, Shinobu Gohara, Makoto Mori, Akira Horiki, Takao Kato, Hiroshi Kuwahara
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Patent number: 6639920Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetrmined period and time slots contained in each frame to carry blocks.Type: GrantFiled: March 22, 2002Date of Patent: October 28, 2003Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 6618372Abstract: In a packet switching system-made up of a single or a plurality of switching nodes or local units each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch on the basis of a logic channel on a packet circuit, a self-routing switch for performing switching on the basis of the output port information, and a control unit for terminating a control packet and performing the call processing function, and a switching node or tandem unit including a single or a plurality of self-routing switches for interconnecting the local units, there are provided a device for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating, side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device, operable in the originating-side local unit for information transfer, for insertingType: GrantFiled: June 28, 1999Date of Patent: September 9, 2003Assignee: Hitachi, Ltd.Inventors: Shirou Tanabe, Taihei Suzuki, Shinobu Gohara, Yoshito Sakurai, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Publication number: 20030123440Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.Type: ApplicationFiled: February 28, 2003Publication date: July 3, 2003Inventors: Yoshito Sakurai, Kenichi Ohtsuki, Shinobu Gohara, Makoto Mori, Akira Horiki, Takao Kato, Hiroshi Kuwahara
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Publication number: 20030091049Abstract: This invention provides a network management equipment and a packet switching equipment which eliminate a connection setup delay time, reduce a delay and a delay variation involved in data transfer, and effectively perform connectionless data flow processing in a large data network. The network is divided into a connection-oriented core network and a plurality of connectionless access networks connected to the core network where a plurality of connections (called permanent virtual route (PVR)) are set up among a plurality of edge nodes. The network management equipment selects one route from a plurality of PVRs for connectionless data flow received from one of the access networks and transfers data along the PVR.Type: ApplicationFiled: November 1, 2002Publication date: May 15, 2003Inventors: Hajime Abe, Kazuho Miki, Noboru Endo, Akihiko Takase, Yoshito Sakurai
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Patent number: 6546011Abstract: An ATM switching system including a switch unit having a plurality of input ports and output ports, and a multiplexer for multiplexing cell trains from at least two output ports into a single cell train and outputting the cell train to and output port. A demultiplexer can be provided in place of the multiplexer. The switch unit includes a buffer memory for storing cells from the input ports while forming a queue chain for each output port, a demultiplexer for distributing the cells from the buffer memory to output ports, and a buffer memory control circuit for controlling write and read operations of the buffer memory. The buffer memory control circuit has a control table for outputting an identifier of an output port the cells read from the buffer memory are to be output. Cells are read from the chain designated by the identifier.Type: GrantFiled: March 13, 2001Date of Patent: April 8, 2003Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Kenichi Ohtsuki, Shinobu Gohara, Makoto Mori, Akira Horiki, Takao Kato, Hiroshi Kuwahara
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Patent number: 6512745Abstract: This invention provides a network management equipment and a packet switching equipment which eliminate a connection setup delay time, reduce a delay and a delay variation involved in data transfer, and effectively perform connectionless data flow processing in a large data network. The network is divided into a connection-oriented core network and a plurality of connectionless access networks connected to the core network where a plurality of connections (called permanent virtual route (PVR)) are set up among a plurality of edge nodes. The network management equipment selects one route from a plurality of PVRs for connectionless data flow received from one of the access networks and transfers data along the PVR.Type: GrantFiled: October 1, 1999Date of Patent: January 28, 2003Assignee: Hitachi, Ltd.Inventors: Hajime Abe, Kazuho Miki, Noboru Endo, Akihiko Takase, Yoshito Sakurai
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Publication number: 20020126649Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetrmined period and time slots contained in each frame to carry blocks.Type: ApplicationFiled: March 22, 2002Publication date: September 12, 2002Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 6445703Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.Type: GrantFiled: November 29, 2000Date of Patent: September 3, 2002Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Kenichi Ohtsuki, Shinobu Gohara, Makoto Mori, Akira Horiki, Takao Kato, Hiroshi Kuwahara
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Publication number: 20020057696Abstract: A packet switching system including at least one switching node or local unit each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch based on a logic channel on a packet circuit, a self-routing switch for performing switching based on the output port information, and a control unit for terminating a control packet and performing the call processing function. A switching node or tandem unit is provided including at least one self-routing switch for interconnecting the local units. A device is provided for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating-side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device.Type: ApplicationFiled: January 9, 2002Publication date: May 16, 2002Inventors: Shirou Tanabe, Taihei Suzuki, Shinobu Gohara, Yoshito Sakurai, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 6389025Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetrmined period and time slots contained in each frame to carry blocks.Type: GrantFiled: June 5, 2001Date of Patent: May 14, 2002Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 6335934Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetermined period and time slots contained in each frame to carry blocks.Type: GrantFiled: August 13, 1999Date of Patent: January 1, 2002Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 6314096Abstract: In a packet switching system made up of a single or a plurality of switching nodes or local units each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch on the basis of a logic channel on a packet circuit, a self-routing switch for performing switching on the basis of the output port information, land a control unit for terminating a control packet and performing the call processing function, and a switching node or tandem unit including a single or a plurality of self-routing switches for interconnecting the local units, there are provided a device for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating-side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device, operable in the originating side local unit for information transfer, for insertingType: GrantFiled: December 20, 1999Date of Patent: November 6, 2001Assignee: Hitachi, Ltd.Inventors: Shirou Tanabe, Taihei Suzuki, Shinobu Gohara, Yoshito Sakurai, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 6304570Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetrmined period and time slots contained in each frame to carry blocks.Type: GrantFiled: August 13, 1999Date of Patent: October 16, 2001Assignee: Hitachi, Ltd.Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Publication number: 20010028652Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.Type: ApplicationFiled: June 8, 2001Publication date: October 11, 2001Inventors: Yoshito Sakurai, Kenichi Ohtsuki, Shinobu Gohara, Makoto Mori, Akira Horiki, Takao Kato, Hiroshi Kuwahara
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Publication number: 20010028658Abstract: A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetrmined period and time slots contained in each frame to carry blocks.Type: ApplicationFiled: June 5, 2001Publication date: October 11, 2001Inventors: Yoshito Sakurai, Shinobu Gohara, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: RE39903Abstract: A communication method for providing information in an intelligent network includes a step of entering by a user a connection number of the user terminal, a connection number of an information provider terminal and a time to receive the information providing service into a user database provided in a transmission layer, a step of reading the data registered in the user database into a service control database provided in the intelligent layer, a step of referring to the service control database to automatically connect the user terminal and the information provider terminal when a service start time is reached and automatically disconnect the connection therebetween when a service end time is reached.Type: GrantFiled: July 25, 2000Date of Patent: October 30, 2007Assignee: Hitachi, Ltd.Inventors: Yukiko Tonomura, Yoshito Sakurai, Yumiko Nishi
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Patent number: RE41472Abstract: A communication method for providing information in an intelligent network includes a step of entering by a user a connection number of the user terminal, a connection number of an information provider terminal and a time to receive the information providing service into a user database provided in a transmission layer, a step of reading the data registered in the user database into a service control database provided in the intelligent layer, a step of referring to the service control database to automatically connect the user terminal and the information provider terminal when a service start time is reached and automatically disconnect the connection therebetween when a service end time is reached.Type: GrantFiled: May 18, 2006Date of Patent: August 3, 2010Assignee: Hitachi, Ltd.Inventors: Yukiko Tonomura, Yoshito Sakurai, Yumiko Nishi