Patents by Inventor Yoshiya Hagimoto
Yoshiya Hagimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210111204Abstract: The present technology relates to a semiconductor device, a solid-state imaging device, and electronic equipment, which are able to suppress increase of resistivity to a high level at a connection portion between an ESV and a wiring layer and to improve reliability of an electric connection using an ESV. The semiconductor device according to a first aspect of the present technology has a plurality of semiconductor substrates layered, and includes: a through electrode penetrating a silicon layer of the semiconductor substrates; a wiring layer formed inside the semiconductor substrates; and a through electrode reception part connected to the wiring layer, in which the through electrode has a width smaller than the through electrode reception part, and the through electrode is electrically connected to the wiring layer via the through electrode reception part. The present technology is applicable, for example, to a CMOS image sensor.Type: ApplicationFiled: March 16, 2018Publication date: April 15, 2021Inventor: YOSHIYA HAGIMOTO
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Patent number: 10804313Abstract: The present technology relates to a semiconductor device and a solid-state imaging device of which crack resistance can be improved in a simpler way. The semiconductor device has an upper substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and a second substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and is joined to the upper substrate. In addition, a pad for wire bonding or probing is formed in the upper substrate, and pads for protecting corner or side parts of the pad for wire bonding or probing are radially laminated and provided in each of the wiring layers between the pad and the Si substrate of the lower substrate. The present technology can be applied to a solid-state imaging device.Type: GrantFiled: June 6, 2018Date of Patent: October 13, 2020Assignee: Sony CorporationInventors: Yoshihisa Kagawa, Nobutoshi Fujii, Masanaga Fukasawa, Tokihisa Kaneguchi, Yoshiya Hagimoto, Kenichi Aoyagi, Ikue Mitsuhashi
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Patent number: 10753551Abstract: An electronic component mounting substrate 10A is configured of an electronic component 20, and a mounting substrate 10 mounting the electronic component 20 thereon, in which concave parts 24 are formed on a mounting surface 23 of the electronic component 20 opposite to the mounting substrate 10, a connection part 39 is exposed at the bottom of the concave part 24, and electronic component attachment parts 12 provided on the mounting substrate 10 are soldered to the connection parts 39 provided in the electronic component 20.Type: GrantFiled: January 27, 2016Date of Patent: August 25, 2020Assignee: Sony Semiconductor Solutions CorporationInventors: Toshiaki Hasegawa, Kenichi Aoyagi, Yoshiya Hagimoto, Nobutoshi Fujii
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Patent number: 10707258Abstract: A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.Type: GrantFiled: May 23, 2018Date of Patent: July 7, 2020Assignee: Sony CorporationInventors: Nobutoshi Fujii, Yoshiya Hagimoto, Kenichi Aoyagi, Yoshihisa Kagawa
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Patent number: 10699968Abstract: A semiconductor manufacturing apparatus includes: a treatment chamber treating a treated film of a wafer using a desired chemical fluid; a film thickness measurement unit measuring an initial film thickness of the treated film before treatment and a final film thickness of the treated film after treatment; and a main body controlling unit calculating a treatment speed of the chemical fluid from the initial film thickness, the final film thickness, and a chemical fluid treatment time taken from the initial film thickness to the final film thickness to calculate a chemical fluid treatment time for a wafer to be treated next from the calculated treatment speed.Type: GrantFiled: February 29, 2012Date of Patent: June 30, 2020Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yukari Takeya, Hayato Iwamoto, Yoshiya Hagimoto, Eizo Motooka
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Publication number: 20200083262Abstract: The present technology relates to a solid-state image sensing device and an electronic device for reducing noises. The solid-state image sensing device includes: a photoelectric conversion unit; a charge holding unit for holding charges transferred from the photoelectric conversion unit; a first transfer transistor for transferring charges from the photoelectric conversion unit to the charge holding unit; and a light blocking part including a first light blocking part and a second light blocking part, in which the first light blocking part is arranged between a second surface opposite to a first surface as a light receiving surface of the photoelectric conversion unit and the charge holding unit, and covers the second surface, and is formed with a first opening, and the second light blocking part surrounds the side surface of the photoelectric conversion unit. The present technology is applicable to solid-state image sensing devices of backside irradiation type, for example.Type: ApplicationFiled: November 14, 2019Publication date: March 12, 2020Inventors: HIROSHI TAYANAKA, KENTARO AKIYAMA, YORITO SAKANO, TAKASHI OINOUE, YOSHIYA HAGIMOTO, YUSUKE MATSUMURA, NAOYUKI SATO, YUKI MIYANAMI, YOICHI UEDA, RYOSUKE MATSUMOTO
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Publication number: 20200049959Abstract: The present technology relates to, for example, a lens attached substrate including a substrate which has a through-hole formed therein and a light shielding film formed on a side wall of the through-hole and a lens resin portion which is formed inside the through-hole of the substrate. The present technology can be applied to, for example, a lens attached substrate, a layered lens structure, a camera module, a manufacturing apparatus, a manufacturing method, an electronic device, a computer, a program, a storage medium, a system, and the like.Type: ApplicationFiled: July 10, 2019Publication date: February 13, 2020Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yusuke MORIYA, Masanori IWASAKI, Takashi OINOUE, Yoshiya HAGIMOTO, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
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Publication number: 20200020733Abstract: [Object] To enable reliability to be further improved in a semiconductor device. [Solution] Provided is a semiconductor device including a plurality of substrates that is stacked, each of the substrates including a semiconductor substrate and a multi-layered wiring layer stacked on the semiconductor substrate, the semiconductor substrate having a circuit with a predetermined function formed thereon. Bonding surfaces between at least two substrates among the plurality of substrates have an electrode junction structure in which electrodes formed on the respective bonding surfaces are joined in direct contact with each other, the electrode junction structure being a structure for electrical connection between the two substrates.Type: ApplicationFiled: February 15, 2018Publication date: January 16, 2020Inventors: NOBUTOSHI FUJII, YOSHIYA HAGIMOTO
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Patent number: 10515988Abstract: The present technology relates to a solid-state image sensing device and an electronic device capable of reducing noises. The solid-state image sensing device includes a photoelectric conversion unit, a charge holding unit for holding charges transferred from the photoelectric conversion unit, a first transfer transistor for transferring charges from the photoelectric conversion unit to the charge holding unit, and a light blocking part including a first light blocking part and a second light blocking part. The first light blocking part is arranged between a second surface opposite to a first surface as a light receiving surface of the photoelectric conversion unit and the charge holding unit, and covers the second surface, and is formed with a first opening, and the second light blocking part surrounds the side surface of the photoelectric conversion unit. The present technology is applicable to solid-state image sensing devices of backside irradiation type.Type: GrantFiled: February 12, 2016Date of Patent: December 24, 2019Assignee: SONY CORPORATIONInventors: Hiroshi Tayanaka, Kentaro Akiyama, Yorito Sakano, Takashi Oinoue, Yoshiya Hagimoto, Yusuke Matsumura, Naoyuki Sato, Yuki Miyanami, Yoichi Ueda, Ryosuke Matsumoto
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Publication number: 20190386056Abstract: A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.Type: ApplicationFiled: August 28, 2019Publication date: December 19, 2019Applicant: Sony CorporationInventors: Nobutoshi Fujii, Yoshiya Hagimoto, Kenichi Aoyagi, Yoshihisa Kagawa
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Patent number: 10485293Abstract: There is provided a semiconductor device, including a semiconductor substrate, an interlayer insulating layer formed on the semiconductor substrate, a bonding electrode formed on a surface of the interlayer insulating layer, and a metal film which covers an entire surface of a bonding surface including the interlayer insulating layer and the bonding electrode.Type: GrantFiled: June 27, 2017Date of Patent: November 26, 2019Assignee: Sony CorporationInventors: Yoshiya Hagimoto, Nobutoshi Fujii, Kenichi Aoyagi
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Patent number: 10431621Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.Type: GrantFiled: May 30, 2018Date of Patent: October 1, 2019Assignee: Sony CorporationInventors: Yoshihisa Kagawa, Kenichi Aoyagi, Yoshiya Hagimoto, Nobutoshi Fujii
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Publication number: 20190273109Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.Type: ApplicationFiled: May 13, 2019Publication date: September 5, 2019Applicant: Sony CorporationInventors: Yoshihisa Kagawa, Kenichi Aoyagi, Yoshiya Hagimoto, Nobutoshi Fujii
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Patent number: 10379323Abstract: The present technology relates to, for example, a lens attached substrate including a substrate which has a through-hole formed therein and a light shielding film formed on a side wall of the through-hole and a lens resin portion which is formed inside the through-hole of the substrate. The present technology can be applied to, for example, a lens attached substrate, a layered lens structure, a camera module, a manufacturing apparatus, a manufacturing method, an electronic device, a computer, a program, a storage medium, a system, and the like.Type: GrantFiled: July 15, 2016Date of Patent: August 13, 2019Assignee: Sony Semiconductor Solutions CorporationInventors: Yusuke Moriya, Masanori Iwasaki, Takashi Oinoue, Yoshiya Hagimoto, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Nobutoshi Fujii, Hiroshi Tazawa, Toshiaki Shiraiwa, Minoru Ishida
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Patent number: 10134795Abstract: A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.Type: GrantFiled: May 30, 2017Date of Patent: November 20, 2018Assignee: Sony CorporationInventors: Nobutoshi Fujii, Yoshiya Hagimoto, Kenichi Aoyagi, Yoshihisa Kagawa
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Publication number: 20180286911Abstract: The present technology relates to a semiconductor device and a solid-state imaging device of which crack resistance can be improved in a simpler way. The semiconductor device has an upper substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and a second substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and is joined to the upper substrate. In addition, a pad for wire bonding or probing is formed in the upper substrate, and pads for protecting corner or side parts of the pad for wire bonding or probing are radially laminated and provided in each of the wiring layers between the pad and the Si substrate of the lower substrate. The present technology can be applied to a solid-state imaging device.Type: ApplicationFiled: June 6, 2018Publication date: October 4, 2018Applicant: Sony CorporationInventors: Yoshihisa KAGAWA, Nobutoshi FUJII, Masanaga FUKASAWA, Tokihisa KANEGUCHI, Yoshiya HAGIMOTO, Kenichi AOYAGI, Ikue MITSUHASHI
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Publication number: 20180277585Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.Type: ApplicationFiled: May 30, 2018Publication date: September 27, 2018Inventors: Yoshihisa Kagawa, Kenichi Aoyagi, Yoshiya Hagimoto, Nobutoshi Fujii
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Publication number: 20180269248Abstract: A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.Type: ApplicationFiled: May 23, 2018Publication date: September 20, 2018Applicant: Sony CorporationInventors: Nobutoshi Fujii, Yoshiya Hagimoto, Kenichi Aoyagi, Yoshihisa Kagawa
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Publication number: 20180259749Abstract: The present technology relates to, for example, a lens attached substrate including a substrate which has a through-hole formed therein and a light shielding film formed on a side wall of the through-hole and a lens resin portion which is formed inside the through-hole of the substrate. The present technology can be applied to, for example, a lens attached substrate, a layered lens structure, a camera module, a manufacturing apparatus, a manufacturing method, an electronic device, a computer, a program, a storage medium, a system, and the like.Type: ApplicationFiled: July 15, 2016Publication date: September 13, 2018Applicant: Sony Semiconductor Solutions CorporationInventors: Yusuke MORIYA, Masanori IWASAKI, Takashi OINOUE, Yoshiya HAGIMOTO, Hiroyasu MATSUGAI, Hiroyuki ITOU, Suguru SAITO, Keiji OHSHIMA, Nobutoshi FUJII, Hiroshi TAZAWA, Toshiaki SHIRAIWA, Minoru ISHIDA
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Patent number: 10038024Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.Type: GrantFiled: August 4, 2016Date of Patent: July 31, 2018Assignee: Sony CorporationInventors: Yoshihisa Kagawa, Kenichi Aoyagi, Yoshiya Hagimoto, Nobutoshi Fujii