Patents by Inventor Yoshiyuki Kawakami
Yoshiyuki Kawakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5917678Abstract: A head slider supporting a read/write head for recording and reproducing information is disposed above a disk, i.e., an information recording medium. The head slider has on its surface facing the disk at least two transversely elongate dynamic pressure generating parts formed with their longer sides extended substantially perpendicularly to the rotating direction of the disk and arranged one behind the other in the rotating direction. The front dynamic pressure generating part is provided with a land of a length in the rotating direction of the disk greater than 10% and smaller than 50%. The land protrudes toward the disk and has a shoulder.Type: GrantFiled: September 27, 1996Date of Patent: June 29, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Jun Ito, Yoshiyuki Kawakami
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Patent number: 5877091Abstract: A constraint graph is generated by representing plural nets by using vertices and correlation in the horizontal and vertical directions among the nets by using edges. Then, clustering is conducted so that each of the vertices of the constraint graph is assigned to any one of plural layers in view of a channel height and so as to minimize the number of stacked vias. Next, routing topology is obtained on the basis of obtained clusters of the respective layers and the constraint graph, and routing patterns satisfying a design rule are obtained on the basis of the routing topology. In the clustering, the number of the stacked vias is minimized while retaining the minimum channel height in view of the final routing patterns. Accordingly, the routing patterns satisfying a desired design rule can realize a high density, resulting in a compact semiconductor integrated circuit.Type: GrantFiled: May 15, 1996Date of Patent: March 2, 1999Assignee: Matsushita Electric Industrial Co. Ltd,Inventor: Yoshiyuki Kawakami
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Patent number: 5774371Abstract: Functional blocks and block external wiring are roughly laid out in a semiconductor integrated circuit. The positions of cells in the functional blocks, block internal wiring and the block external wiring are determined through calculation of delay time as a sum of block external delay time and block internal delay time, so that clock skew of each cell is within a limited range and the delay time is within a desired range. Wiring patterns are formed in accordance with the determined wiring. In determining the positions of the cells in the functional blocks and the block internal wiring, a template corresponding to a clock tree is formed, and the cells and the wires are laid out based on the clock tree structure on the template. Since the delay time can be adjusted, the respective cells of the respective functional blocks in one semiconductor integrated circuit or respective cells of respective semiconductor integrated circuits in one system can be synchronized one another.Type: GrantFiled: August 1, 1995Date of Patent: June 30, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Yoshiyuki Kawakami
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Patent number: 5729469Abstract: The present invention discloses an improved wiring method. Grids are defined at a grid-routing step in such a way that a part of predetermined design criteria are met. Wiring routes are decided on the basis of these grids so that they follow the design criteria and plural functional blocks are connected together. When some nets are left in such a manner that they are assigned no wiring routes, their wiring routes are decided at a non grid-routing step following the design criteria, in defiance of the grids but in accordance with the design criteria. If there are still some nets without wiring routes, their wiring routes are decided at a non grid-routing step ignoring the design criteria. Then, some of the already-defined wiring routes are shoved so as to meet each of the design criteria, and individual wiring patters are generated with respect to all of the decided wiring routes in such a manner that the criteria are met.Type: GrantFiled: December 7, 1993Date of Patent: March 17, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Yoshiyuki Kawakami
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Patent number: 5600509Abstract: In a storage apparatus such as a small-sized hard disk apparatus to be built in the body of an information processing apparatus, the body of the storage apparatus comprises a metallic casing and a top cover member. The top cover member is provided with a seal member for sealing a gap between the casing 1 and the top cover member. The body of the storage apparatus is covered with a shield cover member. A metallic shield member is attached to the inside surface of the shield cover member. The shield cover member ensures electrical insulation of the body of the storage apparatus from the structural parts of the information processing apparatus excluding the storage apparatus. The metallic shield member ensures electromagnetic shield effects of, in particular, the seal member in the body of the storage apparatus.Type: GrantFiled: April 26, 1993Date of Patent: February 4, 1997Assignee: Kabushiki Kaisha ToshibaInventor: Yoshiyuki Kawakami
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Patent number: 5506374Abstract: In a storage apparatus such as a small-sized hard disk apparatus to be built in the body of an information processing apparatus, the body of the storage apparatus comprises a metallic casing and a top cover member. The top cover member is provided with a seal member for sealing a gap between the casing and the top cover member. The body of the storage apparatus is covered with a shield cover member. A metallic shield member is attached to the inside surface of the shield cover member. The shield cover member ensures electrical insulation of the body of the storage apparatus from the structural parts of the information processing apparatus excluding the storage apparatus. The metallic shield member ensures electromagnetic shield effects of, in particular, the seal member in the body of the storage apparatus.Type: GrantFiled: August 18, 1994Date of Patent: April 9, 1996Assignee: Kabushiki Kaisha ToshibaInventor: Yoshiyuki Kawakami
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Patent number: 5363260Abstract: A magnetic disk apparatus includes a base on which a spindle motor for rotating a magnetic disk and a carriage supporting a magnetic head are mounted. A voice coil motor for rotating the carriage is mounted on the base. The voice coil motor includes a bottom yoke, a top yoke facing the bottom yoke with a gap, a magnet fixed to the top yoke to face the bottom yoke, and a coil fixed to the carriage. The base is formed integrally with the bottom yoke by insert molding. The bottom yoke is partially buried in the base and its upper surface is exposed to the outside the base. The bottom yoke has tapped holes, and the top yoke with the magnet is fixed to the bottom yoke by screwing screws into the tapped holes via through holes bored in the top yoke.Type: GrantFiled: July 1, 1993Date of Patent: November 8, 1994Assignee: Kabushiki Kaisha ToshibaInventor: Yoshiyuki Kawakami
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Patent number: 5272645Abstract: A plurality of wires are effectively laid in a channel having a plurality of wiring layers and sandwiched between two rows of terminals. In order to complete channel routing, horizontal segments of the wires are initially generated. The horizontal segments are then allocated on at least one imaginary segment generated on each layer contained in the channel. The imaginary segment is in parallel with the rows of terminals in the channel. The horizontal segments are bent for reduction of the channel height based on design rules for each layer. Finally, vertical segments of the wires are generated.Type: GrantFiled: May 22, 1991Date of Patent: December 21, 1993Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshiyuki Kawakami, Masahiko Toyonaga
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Patent number: 5241455Abstract: To minimize the area of an L-shaped channel wiring region between VLSI circuit blocks, a trunk 1 is formed in the direction along L-shaped sides A and B in the wiring region interposed between the L-shaped sides A and B of circuit blocks CB1 and CB2 having terminals on their sides. The trunk 1 is converted into a polygonal line so as to occupy two tracks. The polygonal line is obtained by combining a line segment in the direction along the L-shaped sides A and B with a line segment parallel to the middle angle direction D of an L-shaped angle.Type: GrantFiled: December 23, 1991Date of Patent: August 31, 1993Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masahiro Fukui, Yoshiyuki Kawakami
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Patent number: 5062054Abstract: A printed circuit layout system using two or more of the following sub-systems: a pattern processing subsystem, a pattern design rule check subsystem, and a pattern connectivity verification characterizes any circuit pattern by a set of rectangles, each rectangle identified by a potential number and a layer, number and coordinates, and identifies terminals by potential number, layer number, and terminal names. The system eliminates the need to perform pattern OR processing and electrical connectivity search, as required by conventional schemes. The reforming and checking processes for the layout patterns are executed by a simple high speed method, making use of the features of the layout data. The system includes efficient methods for notch elimination, design rule checking, and connectivity checking.Type: GrantFiled: March 10, 1989Date of Patent: October 29, 1991Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshiyuki Kawakami, Masahiro Fukui, Ichiro Shigemoto, Chie Iwasaki
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Patent number: 4832515Abstract: A printing head includes a core section and a housing section coupled thereto. The core section has a core having a plurality of pole portions around which coils are wound. The core is arranged in the case and coupled therewith by means of an insulating resin filling a gap between the core and the case. A stopper is located in the case. The housing section includes a plurality of armatures and printing wires extending from the corresponding armatures. Each armature has an intermediate portion abutting the core, one end portion facing the stopper, and the other end facing the corresponding pole portion, and is rockable around the intermediate portion. The armature is urged by an urging member to an initial position where the one end portion abuts the stopper. When selected coils are energized, the other end portions of the corresponding armatures are attracted to the pole portions, so that the armatures are rocked to a printing position where the one end portion is spaced from the stopper.Type: GrantFiled: July 23, 1987Date of Patent: May 23, 1989Assignee: Kabushiki Kaisha ToshibaInventor: Yoshiyuki Kawakami
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Patent number: 4500463Abstract: Polyprenyl carboxylic acid derivatives having the general formula (I): ##STR1## in which n is an integer of from 2 to 4, R.sub.1 represents the hydrogen atom or a protecting group for the carboxylic acid group, and R.sub.2 represents a hydroxymethyl, formyl or carboxyl group, are disclosed. A process for the preparation of the polyprenyl carboxylic acid derivative involving microbiological oxidation using a strain belonging to the genus Nocardia is disclosed. The compounds have anti-ulcer activity and hypotensive activity. The compounds also are useful as intermediates for preparing polyprenyl carboxylic acids of the formula ##STR2## and esters thereof, wherein l is an integer of from 4 to 11. The polyprenyl carboxylic acids and esters thereof have hypotensive activity and anti-ulcer activity.Type: GrantFiled: May 1, 1981Date of Patent: February 19, 1985Assignees: Eisai Co., Ltd., Agency of Industrial Science & TechnologyInventors: Akio Sato, Kenji Nakajima, Yoshimasa Takahara, Shizumasa Kijima, Yuichi Inai, Yoshiyuki Kohara, Yoshiyuki Kawakami, Tomio Tsurugi
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Patent number: 4474881Abstract: A process is disclosed for the preparation of a compound having the general formula: ##STR1## wherein n is an integer of from 2 to 4, R.sub.1 is an ester-forming moiety effective as a protecting group for a carboxyl group, and R.sub.2 is hydroxymethyl, formyl or carboxyl. The compounds (I) are useful as intermediates for the preparation of polyprenyl compounds having hypotensive and anti-ulcer activity. The process of the invention includes cultivating a microorganism selected from a strain of the genus Nocardia called BPM 1613, FERM-P No. 1609, Corynebacterium equi IAM 1038, Candida lipolytica IFO 0746, and Mycobacterium smegmatis IFO 3083, in a nutritive culture medium, in the presence of a compound having the general formula: ##STR2## wherein R.sub.3 is an ester-forming moiety effective as a protecting group for a carboxyl group, whereby the microorganism utilizes the compound (II) as a carbon source and oxidizes the compound (II), thereby converting the compound (II) into the compound (I).Type: GrantFiled: June 28, 1982Date of Patent: October 2, 1984Assignees: Eisai Co., Ltd., Agency of Industrial Science and TechnologyInventors: Akio Sato, Kenji Nakajima, Yoshimasa Takahara, Shizumasa Kijima, Yuichi Inai, Yoshiyuki Kohara, Yoshiyuki Kawakami, Tomio Tsurugi
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Patent number: 4293690Abstract: Compounds of the formula ##STR1## wherein R is phenyl which may be substituted; or their acid addition salts, are produced in good yield by reacting a compound of the formula ##STR2## wherein R.sup.1, R.sup.2 and R.sup.3, independently of one another, are hydroxyl which may be protected, which is prepared in 2 or 3 steps from 5-amino-1-.beta.-D-ribofuranosylimidazole-4-carboxamide, with a compound of the formula ##STR3## wherein R has the same meaning as defined above and X is amino which may be substituted or lower alkylthio, and, if necessary subjecting the resulting compound to a treatment for removal of protective groups on its hydroxyls.Type: GrantFiled: March 28, 1980Date of Patent: October 6, 1981Assignee: Takeda Chemical Industries, Ltd.Inventors: Yoichi Sawa, Yoshiyuki Kawakami, Ryuji Marumoto