Patents by Inventor Yoshiyuki Kurokawa

Yoshiyuki Kurokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250098317
    Abstract: A display device that is suitable for increasing its size is provided.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 20, 2025
    Inventors: Shunpei YAMAZAKI, Kei TAKAHASHI, Yoshiyuki KUROKAWA
  • Publication number: 20250088766
    Abstract: A semiconductor device that has low power consumption and is capable of performing a product-sum operation is provided. The semiconductor device includes first and second cells, a first circuit, and first to third wirings. Each of the first and second cells includes a capacitor, and a first terminal of each of the capacitors is electrically connected to the third wiring. Each of the first and second cells has a function of feeding a current based on a potential held at a second terminal of the capacitor, to a corresponding one of the first and second wirings. The first circuit is electrically connected to the first and second wirings and stores currents I1 and I2 flowing through the first and second wirings. When the potential of the third wiring changes and accordingly the amount of current of the first wiring changes from I1 to I3 and the amount of current of the second wiring changes from I2 to I4, the first circuit generates a current with an amount I1?I2?I3+I4.
    Type: Application
    Filed: October 9, 2024
    Publication date: March 13, 2025
    Inventors: Yoshiyuki KUROKAWA, Munehiro KOZUMA, Takeshi AOKI, Takuro KANEMURA
  • Publication number: 20250087146
    Abstract: A correction method of a display apparatus is provided. A method for evaluating display quality of a display apparatus is provided. The display apparatus includes a display panel, a correction circuit, and a memory. First, first imaging data including all pixels in the display apparatus is acquired in a state where an image with a first grayscale is displayed on the display apparatus. Then, second imaging data including all the pixels in the display apparatus is acquired in a state where an image with a second grayscale is displayed on the display apparatus. Next, correction data is generated based on the first imaging data and the second imaging data. After that, the correction data is output to the memory of the display apparatus. The correction circuit has a function of correcting image data based on the correction data stored in the memory to generate corrected image data and outputting the corrected image data to the display panel.
    Type: Application
    Filed: June 29, 2022
    Publication date: March 13, 2025
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Tatsuya ONUKI, Shunsuke SATO, Yoshiyuki KUROKAWA, Yosuke TSUKAMOTO, Shigeru ONOYA
  • Publication number: 20250078895
    Abstract: An operation method of a semiconductor device that performs data writing and correction processing is provided. The operation method is for a semiconductor device including a control circuit, a first circuit, a second circuit, a wiring, a cell, and a converter circuit. In the operation method, first, the control circuit transmits, to the first circuit, a first signal corresponding to the value of first data. Next, the first circuit outputs, to the wiring, a first current with an amount corresponding to the first signal. Moreover, the cell retains a first potential corresponding to the amount of first current. Then, the cell makes a second current corresponding to the first potential flow from the wiring, and the converter circuit outputs a second signal corresponding to the amount of second current. Next, the second circuit obtains a difference value between a value corresponding to the second signal and the value of the first data. If the difference value is 0, the operation is terminated.
    Type: Application
    Filed: January 25, 2023
    Publication date: March 6, 2025
    Inventors: Hidefumi RIKIMARU, Yoshiyuki KUROKAWA, Satoru OHSHITA
  • Patent number: 12243885
    Abstract: A highly sensitive imaging device that can perform imaging even under a low illuminance condition is provided. One electrode of a photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of a first transistor and one of a source electrode and a drain electrode of a third transistor. The other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor. The other electrode of the photoelectric conversion element is electrically connected to a first wiring. A gate electrode of the first transistor is electrically connected to a second wiring. When a potential supplied to the first wiring is HVDD, the highest value of a potential supplied to the second wiring is lower than HVDD.
    Type: Grant
    Filed: November 13, 2023
    Date of Patent: March 4, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiyuki Kurokawa
  • Patent number: 12243583
    Abstract: A semiconductor device capable of convolutional processing with low power consumption is provided. In the semiconductor device, a first circuit includes a first holding portion and a first transistor, and a second circuit includes a second holding portion and a second transistor. The first and second circuits are electrically connected to first and second input wirings and first and second wirings. The first holding portion has a function of holding a first current flowing through the first transistor, and the second holding portion has a function of holding a second current flowing through the second transistor. The first and second currents are determined by a filter value used for convolutional processing.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: March 4, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshiyuki Kurokawa
  • Patent number: 12245485
    Abstract: A high-resolution display apparatus having a function of sensing light is provided. The display apparatus includes a display portion in which a first arrangement pattern and a second arrangement pattern are repeatedly arranged in this order in a first direction. In the first arrangement pattern, a first subpixel, a second subpixel, and a third subpixel are repeatedly arranged in this order in a second direction. In the second arrangement pattern, a fourth subpixel and a fifth subpixel are repeatedly arranged in this order in the second direction. The first to fourth subpixels each include a light-emitting device. The fifth subpixel includes a light-receiving device.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: March 4, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Kouhei Toyotaka, Satoru Ohshita, Daisuke Kubota
  • Publication number: 20250063836
    Abstract: An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.
    Type: Application
    Filed: November 6, 2024
    Publication date: February 20, 2025
    Inventors: Takeshi AOKI, Yoshiyuki KUROKAWA, Takayuki IKEDA, Hikaru TAMURA
  • Publication number: 20250054523
    Abstract: A semiconductor device with a small circuit area and low power consumption is provided. The semiconductor device includes first to fourth cells, a current mirror circuit, and first to fourth wirings, and the first to fourth cells each include a first transistor, a second transistor, and a capacitor. In each of the first to fourth cells, a first terminal of the first transistor is electrically connected to a first terminal of the capacitor and a gate of the second transistor. The first wiring is electrically connected to first terminals of the second transistors in the first cell and the second cell, the second wiring is electrically connected to first terminals of the second transistors in the third cell and the fourth cell, the third wiring is electrically connected to second terminals of the capacitors in the first cell and the third cell, and the fourth wiring is electrically connected to second terminals of the capacitors in the second cell and the fourth cell.
    Type: Application
    Filed: October 31, 2024
    Publication date: February 13, 2025
    Inventors: Takeshi AOKI, Yoshiyuki KUROKAWA, Munehiro KOZUMA, Takuro KANEMURA, Tatsunori INOUE
  • Patent number: 12219861
    Abstract: A novel display apparatus is provided. The display apparatus includes a first layer including a plurality of pixel circuits, a second layer provided over the first layer, a plurality of optical lenses provided over the second layer, a display region, and a plurality of light-receiving regions. The display region includes a first pixel circuit provided in the first layer and a light-emitting device provided in the second layer. The light-receiving region includes a second pixel circuit provided in the first layer and a light-receiving device provided in the second layer. The plurality of light-receiving regions are provided around the display region. The optical lens is provided at a position overlapping with the light-receiving region.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: February 4, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromichi Godo, Hisao Ikeda, Yoshiyuki Kurokawa
  • Publication number: 20250029648
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a register. The register includes a flip-flop and a plurality of data retention circuits. The flip-flop includes a first transistor in which a semiconductor layer including a channel formation region is silicon, an input terminal of the flip-flop is electrically connected to each of output terminals of the data retention circuits, and an output terminal of the flip-flop is electrically connected to each of input terminals of the data retention circuits. The data retention circuits include a second transistor in which a semiconductor layer including a channel formation region is an oxide semiconductor, and when the second transistor is in a non-conduction state, the data retention circuits have a function of retaining a potential corresponding to data corresponding to a plurality of tasks.
    Type: Application
    Filed: December 5, 2022
    Publication date: January 23, 2025
    Inventors: Yoshiyuki KUROKAWA, Masashi FUJITA, Kazuaki OHSHIMA
  • Publication number: 20250028379
    Abstract: A novel semiconductor is provided. The semiconductor includes a first component, a second component, and an instruction portion. The first component includes a first memory circuit having a function of storing first setting information in a state where power is supplied, and a second memory circuit having a function of storing the first setting information in a state where power is not supplied. The second component includes a third memory circuit having a function of storing second setting information in a state where power is supplied, and a fourth memory circuit having a function of storing the second setting information in a state where power is not supplied. The instruction portion has a function of controlling whether power is supplied to each of the first component and the second component. Each of the second memory circuit and the fourth memory circuit includes a transistor including a metal oxide in a semiconductor layer where a channel is formed.
    Type: Application
    Filed: December 8, 2022
    Publication date: January 23, 2025
    Inventors: Yoshiyuki KUROKAWA, Masashi FUJITA, Kazuaki OHSHIMA
  • Patent number: 12205625
    Abstract: A semiconductor device with low power consumption is provided. The semiconductor device includes a first transistor, a second transistor, and a capacitor. The first transistor includes a first gate and a first back gate, and the second transistor includes a second gate and a second back gate. A gate insulating layer for the first back gate has ferroelectricity. The first transistor has a function of, when being in an off state, retaining a first potential corresponding to first data. The second transistor has a function of making an output current flow between a source and a drain of the second transistor.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: January 21, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromichi Godo, Yoshiyuki Kurokawa, Kazuki Tsuda, Satoru Ohshita
  • Patent number: 12205965
    Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: January 21, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa, Shintaro Harada, Hidetomo Kobayashi, Roh Yamamoto, Kiyotaka Kimura, Takashi Nakagawa, Yusuke Negoro
  • Publication number: 20250022233
    Abstract: Augmented reality display apparatus includes: display part; image analysis part that detects shooting target object feature amount digitizing feature point of shooting target object included in image data; and control part, wherein control part transmits post download instruction information including shooting position information relating to shooting position of image data and shooting target object feature amount to a server apparatus; and causes display part to overlay post data at relative position to shooting target object feature amount in image data displayed on the display part based on information relating to post data associated with shooting position information and shooting target object feature amount transmitted from the server apparatus. Relative position to shooting target object feature amount is position based on post position information included in information relating to post data (FIG. 13).
    Type: Application
    Filed: November 22, 2022
    Publication date: January 16, 2025
    Applicant: NEC Corporation
    Inventors: Shin NORIEDA, Yoshiyuki TANAKA, Shogc AKASAKI, Maki KUROKAWA, Kazuki EGUCHI, Koji SHINOZAKI, Yuji NAKAJIMA
  • Patent number: 12197646
    Abstract: An electronic device that enables smooth communication is provided. The electronic device includes a display portion including a first camera; a second camera; and an image processing portion. The second camera is positioned in a region not overlapping with the display portion. The first camera has a function of generating a first image of a subject, and the second camera has a function of generating a second image of the subject. The image processing portion includes a generator that performs learning using training data. The training data includes an image including a person's face. The image processing portion has a function of making the first image clear when the first image is input to the generator and a function of tracking the gaze of the subject on the basis of the second image.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: January 14, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromichi Godo, Yoshiyuki Kurokawa, Seiko Inoue, Kazuaki Ohshima, Shunpei Yamazaki
  • Patent number: 12200950
    Abstract: An electronic device having an eye tracking function is provided. The electronic device includes a display device and an optical system. The display device includes a first light-emitting element, a second light-emitting element, a sensor portion, and a driver circuit portion. The sensor portion includes a light-receiving element. The first light-emitting element has a function of emitting infrared light or visible light. The second light-emitting element has a function of emitting light of a color different from that of light emitted from the first light-emitting element. When the first light-emitting element emits infrared light, the light-receiving element has a function of detecting the infrared light that is emitted from the first light-emitting element and reflected by an eyeball of a user.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: January 14, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromichi Godo, Yoshiyuki Kurokawa, Kouhei Toyotaka, Kazuki Tsuda, Satoru Ohshita, Hidefumi Rikimaru
  • Publication number: 20250010809
    Abstract: An occupant protection device which can protect an occupant without delay is provided. An image taken by an imaging device is analyzed to judge whether there is an object approaching the subject car. In the case where a collision between the object and the subject car is judged to be inevitable, an airbag device is activated before the collision, whereby the occupant can be protected without delay. By using selenium for a light-receiving element of the imaging device, an accurate image can be obtained even under low illuminance. Imaging in a global shutter system leads to an accurate image with little distortion. This enables more accurate image analysis.
    Type: Application
    Filed: September 24, 2024
    Publication date: January 9, 2025
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Yoshiyuki KUROKAWA
  • Patent number: 12190079
    Abstract: A semiconductor device having a novel structure is provided. The semiconductor device includes a plurality of operation circuits that can switch different kinds of operation processing; a plurality of switch circuits that can switch a connection state between the operation circuits; and a controller. The operation circuit includes a first memory that stores data corresponding to a weight parameter used in the plurality of kinds of operation processing. The operation circuit executes a product-sum operation by switching weight data in accordance with a context. The switch circuit includes a second memory that stores data for switching a plurality of connection states in response to switching of a second context signal. The controller generates a second context signal on the basis of a first context signal. The amount of data stored in the second memory can be smaller than the amount of data stored in the first memory in the operation circuit.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: January 7, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Kozuma, Takeshi Aoki, Seiichi Yoneda, Yoshiyuki Kurokawa
  • Patent number: 12183287
    Abstract: A semiconductor device including a display pixel circuit and an imaging pixel circuit is provided. The semiconductor device includes first and second circuits; the first circuit includes a light-emitting device; and the second circuit includes a light-receiving device, first to fifth transistors, and a first capacitor. The light-receiving device includes first and second terminals, and the light-emitting device includes third and fourth terminals. A first terminal of the first transistor is electrically connected to a first terminal of the second transistor, and a gate of the second transistor is electrically connected to a first terminal of the third transistor and a first terminal of the first capacitor. A second terminal of the first capacitor is electrically connected to a first terminal of the fourth transistor and a first terminal of the fifth transistor.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: December 31, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuto Yakubo, Kouhei Toyotaka, Seiko Inoue, Yoshiyuki Kurokawa