Patents by Inventor Yoshiyuki Kurokawa
Yoshiyuki Kurokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230387147Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Takayuki IKEDA, Yoshiyuki KUROKAWA, Shintaro HARADA, Hidetomo KOBAYASHI, Roh YAMAMOTO, Kiyotaka KIMURA, Takashi NAKAGAWA, Yusuke NEGORO
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Publication number: 20230386544Abstract: A semiconductor device with low power consumption is provided. The semiconductor device includes a first transistor, a second transistor, and a capacitor. The first transistor includes a first gate and a first back gate, and the second transistor includes a second gate and a second back gate. A gate insulating layer for the first back gate has ferroelectricity. The first transistor has a function of, when being in an off state, retaining a first potential corresponding to first data. The second transistor has a function of making an output current flow between a source and a drain of the second transistor.Type: ApplicationFiled: September 7, 2021Publication date: November 30, 2023Inventors: Hiromichi GODO, Yoshiyuki KUROKAWA, Kazuki TSUDA, Satoru OHSHITA
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Patent number: 11823600Abstract: A display system and vehicle that have novel structures are provided. The display system includes a display panel, a correction circuit, and a memory circuit. The display panel is flexible. The display panel includes a display region and a non-display region. The memory circuit has a function of storing first data about the display region and second data about the non-display region. The non-display region has a region which overlaps with the display region when the display panel is bent. The correction circuit has a function of generating image data to be written to pixels in the display region on the basis of the first data and the second data.Type: GrantFiled: November 10, 2022Date of Patent: November 21, 2023Inventors: Shunpei Yamazaki, Yoshiyuki Kurokawa
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Publication number: 20230369329Abstract: A semiconductor device with low power consumption is provided. The semiconductor device includes a first layer and a second layer. The first layer includes a first cell and a first to a third circuit, and the second layer includes a second cell and a fourth and a fifth circuit. The first, second, and fourth circuits each have a function of converting digital data into analog current. The first cell calculates a product of a value from the first current and a value from the second circuit and inputs a calculation result into a third circuit as current. The third circuit generates analog current from the input current. The second cell calculates a product of a value from the third circuit and a value from the fourth circuit and inputs a calculation result into the fifth circuit as current. The fifth circuit generates analog current from the input current.Type: ApplicationFiled: May 3, 2023Publication date: November 16, 2023Inventors: Yoshiyuki KUROKAWA, Satoru OHSHITA, Hidefumi RIKIMARU
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Patent number: 11815689Abstract: A downsized electronic device with an eye tracking function is provided. The electronic device with an eye tracking function includes a display device, an infrared light source, and an optical system. The display device includes a display element and a light-receiving element; the infrared light source has a function of emitting infrared light; the light-receiving element has a function of detecting the infrared light reflected by an eyeball; and the optical system includes a first optical element positioned on an optical path through which an image from the display element enters the eyeball and a second optical element positioned on an optical path through which the reflected infrared light enters the light-receiving element. The light-receiving element is integrated with the display device and thus, the electronic device can have a reduced size.Type: GrantFiled: April 7, 2022Date of Patent: November 14, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hisao Ikeda, Yoshiyuki Kurokawa, Hiromichi Godo
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Publication number: 20230352502Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.Type: ApplicationFiled: July 13, 2023Publication date: November 2, 2023Inventors: Yoshiyuki KUROKAWA, Takayuki IKEDA, Hikaru TAMURA, Munehiro KOZUMA, Masataka IKEDA, Takeshi AOKI
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Publication number: 20230353163Abstract: A novel semiconductor device is provided. An analog signal is converted into a digital signal using a comparison portion comparing two current values, a control portion, and a current output digital-analog conversion portion. The control portion has a function of generating a sign bit showing a magnitude relation between the two current values, a function of converting a difference between the two current values into a digital signal by successive approximation, and a function of outputting the sign bit and the digital signal.Type: ApplicationFiled: July 26, 2021Publication date: November 2, 2023Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takuro KANEMURA, Yoshiyuki KUROKAWA, Hiromichi GODO, Kazuki TSUDA, Satoru OHSHITA, Hidefumi RIKIMARU
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Patent number: 11794679Abstract: An occupant protection device which can protect an occupant without delay is provided. An image taken by an imaging device is analyzed to judge whether there is an object approaching the subject car. In the case where a collision between the object and the subject car is judged to be inevitable, an airbag device is activated before the collision, whereby the occupant can be protected without delay. By using selenium for a light-receiving element of the imaging device, an accurate image can be obtained even under low illuminance. Imaging in a global shutter system leads to an accurate image with little distortion. This enables more accurate image analysis.Type: GrantFiled: June 3, 2021Date of Patent: October 24, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Takayuki Ikeda, Yoshiyuki Kurokawa
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Publication number: 20230326491Abstract: A semiconductor device with a small circuit area and low power consumption is provided. The semiconductor device includes first to fourth cells, a current mirror circuit, and first to fourth wirings, and the first to fourth cells each include a first transistor, a second transistor, and a capacitor. In each of the first to fourth cells, a first terminal of the first transistor is electrically connected to a first terminal of the capacitor and a gate of the second transistor. The first wiring is electrically connected to first terminals of the second transistors in the first cell and the second cell, the second wiring is electrically connected to first terminals of the second transistors in the third cell and the fourth cell, the third wiring is electrically connected to second terminals of the capacitors in the first cell and the third cell, and the fourth wiring is electrically connected to second terminals of the capacitors in the second cell and the fourth cell.Type: ApplicationFiled: May 6, 2021Publication date: October 12, 2023Inventors: Takeshi AOKI, Yoshiyuki KUROKAWA, Munehiro KOZUMA, Takuro KANEMURA, Tatsunori INOUE
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Publication number: 20230317176Abstract: A semiconductor device having a novel structure is provided. The semiconductor device includes memory layers and a driver circuit layer. The memory layers are stacked over the driver circuit layer and each include a memory cell array including a plurality of memory cells. Writing or reading of data to or from one of the memory cells is controlled with a write word line, a read word line, a write bit line, and a read bit line. The driver circuit layer includes a driver circuit portion configured to drive the write word line, the read word line, the write bit line, and the read bit line; and an arithmetic circuit portion. The driver circuit portion includes a plurality of driver circuits configured to control data writing or reading on the memory cell array basis. The arithmetic circuit portion is a circuit configured to perform arithmetic processing using the data retained in the memory cell array provided in each of the memory layers and read through the driver circuit portion.Type: ApplicationFiled: March 23, 2023Publication date: October 5, 2023Inventors: Yoshiyuki KUROKAWA, Satoru OHSHITA, Hidefumi RIKIMARU
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Patent number: 11776586Abstract: A semiconductor device capable of product-sum operation with low power consumption is provided. The semiconductor device includes first and second circuits; the first circuit includes a first holding portion and a first transistor, and the second circuit includes a second holding portion and a second transistor. The first and second circuits are each electrically connected to first and second input wirings and first and second wirings. The first holding portion has a function of holding a first current flowing through the first transistor, and the second holding portion has a function of holding a second current flowing through the second transistor. The first and second currents are determined in accordance with first data. When a potential corresponding to second data is input to the first and second input wirings, the first circuit outputs a current to one of the first wiring and the second wiring and the second circuit outputs a current to the other of the first wiring and the second wiring.Type: GrantFiled: February 3, 2020Date of Patent: October 3, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hajime Kimura, Yoshiyuki Kurokawa
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Patent number: 11776645Abstract: An electronic device applicable to an artificial neuron network. The electronic device includes a first circuit, a second circuit, and first to sixth wirings. The first circuit includes a first transistor, a second transistor, and a capacitor. The second circuit includes a third transistor. A gate of the third transistor is electrically connected to the third wiring. The capacitor capacitively couples the third wiring and the gate of the second transistor. The first circuit is capable of storing a weight as an analog value. The first transistor is typically an oxide semiconductor transistor.Type: GrantFiled: May 7, 2021Date of Patent: October 3, 2023Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa
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Patent number: 11755286Abstract: A semiconductor device capable of performing product-sum operation is provided. The semiconductor device includes a first memory cell, a second memory cell, and an offset circuit. The semiconductor device retains first analog data and reference analog data in the first memory cell and the second memory cell, respectively. A potential corresponding to second analog data is applied to each of them as a selection signal, whereby current depending on the sum of products of the first analog data and the second analog data is obtained. The offset circuit includes a constant current circuit comprising a transistor and a capacitor. A first terminal of the transistor is electrically connected to a first gate of the transistor and a first terminal of the capacitor. A second gate of the transistor is electrically connected to a second terminal of the capacitor.Type: GrantFiled: June 28, 2021Date of Patent: September 12, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shintaro Harada, Yoshiyuki Kurokawa, Takeshi Aoki
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Publication number: 20230284429Abstract: Provided is a semiconductor device having a novel structure. A first transistor, a second transistor, a third transistor, and a capacitor are included. The first transistor has a function of retaining a first potential corresponding to first data supplied to a gate of the third transistor through the first transistor when being in an off state. The capacitor has a function of changing the first potential retained in the gate of the third transistor into a second potential in accordance with a change in potential corresponding to second data supplied to one electrode of the capacitor. The second transistor has a function of setting a potential of one of a source and a drain of the third transistor to a potential corresponding to a potential of a gate of the second transistor. The third transistor has a function of supplying output current corresponding to a potential of the gate of the third transistor to the other of the source and the drain of the third transistor.Type: ApplicationFiled: July 19, 2021Publication date: September 7, 2023Inventors: Hiromichi GODO, Kazuki TSUDA, Yoshiyuki KUROKAWA, Satoru OHSHITA, Takuro KANEMURA, Hidefumi RIKIMARU
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Publication number: 20230274779Abstract: A semiconductor device that restores degraded data is provided. The semiconductor device includes a first circuit, a storage portion, and an arithmetic portion. The first circuit includes a current source and a first switch. The storage portion includes a first transistor and a first capacitor. The arithmetic portion includes a second transistor. A first terminal of the first transistor is electrically connected to a control terminal of the first switch, a first terminal of the first switch is electrically connected to an output terminal of the current source, and a second terminal of the first switch is electrically connected to a first terminal of the second transistor. When data retained in the arithmetic portion is restored, the first transistor is turned on, and the data retained in the storage portion is supplied to the control terminal of the first switch through the first transistor.Type: ApplicationFiled: July 5, 2021Publication date: August 31, 2023Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Takayuki IKEDA, Yoshiyuki KUROKAWA
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Publication number: 20230273637Abstract: A control circuit of a secondary battery with a novel structure is provided. The control circuit of a secondary battery includes a first transistor, a first voltage generation circuit generating a first voltage, and a second voltage generation circuit generating a second voltage. The first voltage generation circuit includes a second transistor and a first capacitor. The second voltage generation circuit includes a third transistor and a second capacitor. The difference between the first voltage and the second voltage is set in accordance with the threshold voltage of the first transistor. When the first transistor includes a back gate, a voltage retention circuit having a function of retaining the voltage of the back gate is included. The voltage retention circuit includes a fourth transistor and a third capacitor. The third capacitor includes a ferroelectric layer between a pair of electrodes.Type: ApplicationFiled: August 25, 2021Publication date: August 31, 2023Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiyuki KUROKAWA, Kazuki TSUDA, Hiromichi GODO, Satoru OHSHITA, Takuro KANEMURA, Hidefumi RIKIMARU, Takayuki IKEDA, Yuto YAKUBO, Shunpei YAMAZAKI
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Patent number: 11728354Abstract: An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.Type: GrantFiled: August 23, 2022Date of Patent: August 15, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takeshi Aoki, Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura
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Patent number: 11728355Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.Type: GrantFiled: August 17, 2021Date of Patent: August 15, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa, Shintaro Harada, Hidetomo Kobayashi, Roh Yamamoto, Kiyotaka Kimura, Takashi Nakagawa, Yusuke Negoro
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Publication number: 20230253034Abstract: A semiconductor device capable of convolutional processing with low power consumption is provided. In the semiconductor device, a first circuit includes a first holding portion and a first transistor, and a second circuit includes a second holding portion and a second transistor. The first and second circuits are electrically connected to first and second input wirings and first and second wirings. The first holding portion has a function of holding a first current flowing through the first transistor, and the second holding portion has a function of holding a second current flowing through the second transistor. The first and second currents are determined by a filter value used for convolutional processing.Type: ApplicationFiled: July 6, 2021Publication date: August 10, 2023Inventors: Hajime KIMURA, Yoshiyuki KUROKAWA
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Patent number: 11721703Abstract: A display device that is suitable for increasing its size is provided.Type: GrantFiled: May 18, 2021Date of Patent: August 8, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kei Takahashi, Yoshiyuki Kurokawa