Abstract: A semiconductor device with a small circuit area that consumes low power is provided. The semiconductor device includes a shift register, a sample-and-hold circuit, a first buffer circuit, and a second buffer circuit. The sample-and-hold circuit includes a first input terminal, a second input terminal, and an output terminal. An output terminal of the first buffer circuit is electrically connected to the first input terminal. The shift register is electrically connected to the second input terminal. An input terminal of the second buffer circuit is electrically connected to the output terminal of the sample-and-hold circuit. In the semiconductor device, the potential of an input analog signal is retained in the sample-and-hold circuit and the analog signal is output from an output terminal of the second buffer circuit.

Abstract: A semiconductor device obtains highly accurate image data regardless of the intensity of incident light. The semiconductor device includes a first photo sensor provided in a pixel, a second photo sensor provided around the pixel, and a controller for setting the drive condition of the first photo sensor in accordance with the intensity of outside light obtained by the second photo sensor. An image is taken after the sensitivity of the first photo sensor is changed in accordance with the drive condition set by the controller. Thus, in the semiconductor device, an image can be taken using the first photo sensor whose sensitivity is optimized in accordance with the intensity of incident light.

Abstract: To generate an analog current without restriction by a power supply voltage. A semiconductor device includes a first node, a second node, a first- to an n-th-stage power storage element (n is an integer greater than or equal to 2), and a first- to an n-th-stage switch. The capacities of the first- to the n-th-stage power storage element are different from one another. The first- to the n-th-stage power storage element are electrically connected in parallel between the first node and the second node. A first terminal of a k-th stage power storage element (k is an integer greater than or equal to 1 and less than or equal to n) is electrically connected to the first input node via a k-th stage switch. The on/off states of the first- to the n-th-stage switch are controlled by a first to an n-th signal.

Abstract: Skew of a multi-context PLD in context switch is reduced to achieve low power consumption. The frequency of a clock signal is switched in context switch operation in accordance with circuit operation to secure time required for context switch. By returning the frequency of the clock signal to the original frequency after executing the context switch, the PLD can maintain high-speed processing and perform the context switch accurately and safely. The time required for the context switch mainly depends on a hardware structure (circuit layout including a parasitic component). Thus, the reliability in the context switch can be improved when time that is equal to or longer than the longest time required for circuit change is secured.

Abstract: To provide a solid-state image sensing device or a semiconductor display device, which can easily obtain the positional data of an object without contact. Included are a plurality of first photosensors on which light with a first incident angle is incident from a first incident direction and a plurality of second photosensors on which light with a second incident angle is incident from a second incident direction. The first incident angle of light incident on one of the plurality of first photosensors is larger than that of light incident on one of the other first photosensors. The second incident angle of light incident on one of the plurality of second photosensors is larger than that of light incident on one of the other second photosensors.

Abstract: A novel semiconductor device or display device is provided. A semiconductor substrate is used as a substrate of a display portion and a transistor in the display portion is formed using the semiconductor substrate. In this way, variation in the characteristics of the transistors among pixels is reduced and pixel density can be increased. Moreover, transistors used for a driver circuit, a signal generation circuit, and a level shifter are formed using the semiconductor substrate. As a result, these circuits can be formed directly on the substrate of the display portion, whereby bonding of a chip and the substrate is unnecessary. Furthermore, these circuits can be easily connected to each other, so that signal delay or an increase in power consumption due to complicated wirings can be prevented.

Abstract: A semiconductor device capable of generating a signal (e.g., a potential signal or a current signal) suitable for usage environment or a purpose. The semiconductor device includes a first memory circuit, a first circuit, and a second memory circuit. The first circuit converts a digital signal input from the first memory circuit into an analog signal. The first memory circuit includes an input node, an output node, a transistor, and a capacitor. The capacitor is electrically connected to the output node. The transistor can control a conduction state between the input node and the output node. An analog signal is input to the input node from the first circuit. The transistor includes an oxide semiconductor layer where a channel formation region is formed.

Abstract: Provided is a semiconductor device in which leakage current due to miniaturization of a semiconductor element is reduced and delay at a time of context switch of a multi-context PLD is reduced. A first transistor and a second transistor included in a charge retention circuit functioning as a configuration memory each include an oxide semiconductor in a semiconductor layer serving as a channel formation region. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor. One of a source and a drain of the second transistor is connected to a switch for context switch. In the switch used for context switch, electrostatic capacitance on an input side to which the one of the source and the drain of the second transistor is connected is larger than electrostatic capacitance on an output side.

Abstract: A semiconductor device with improved operating speed is provided. A semiconductor device including a memory circuit has a function of storing a start-up routine in the memory circuit and executing the start-up routine, a function of operating the memory circuit as a buffer memory device after executing the start-up routine, and a function of loading the start-up routine into the memory circuit from outside before the semiconductor device is powered off.

Abstract: A decoder with reduced power consumption is provided. The decoder includes a first circuit and a second circuit for holding data. The second circuit includes a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor include an oxide semiconductor in a channel formation region. The third transistor includes silicon in a channel formation region. A gate of the second transistor is electrically connected to one of a source and a drain of the first transistor and a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor. The decoder is configured to provide or stop power supply to the semiconductor device depending on a packet ID of a header portion of the data and to perform data storing or restoring of data between the first circuit and the second circuit.

Abstract: Provided is a device capable of generating a new test pattern after the design stage with the area of a circuit that is not in use during normal operation reduced. The device includes a first circuit and a second circuit. The second circuit includes a plurality of third circuits, a plurality of fourth circuits, and a fifth circuit and has a function of generating a signal for testing operation of the first circuit and operating as part of the first circuit. The fourth circuits have a function of storing first data and second data. The fifth circuit has a function of writing the first data to the fourth circuits, writing the second data to the fourth circuits, and reading the second data from the fourth circuits. The first data is used to control the conduction between the third circuits. The second data is used for processing in the first circuit.

Abstract: An object is to achieve low-power consumption by reducing the off-state current of a transistor in a photosensor. A semiconductor device including a photosensor having a photodiode, a first transistor, and a second transistor; and a read control circuit including a read control transistor, in which the photodiode has a function of supplying charge based on incident light to a gate of the first transistor; the first transistor has a function of storing charge supplied to its gate and converting the charge stored into an output signal; the second transistor has a function of controlling reading of the output signal; the read control transistor functions as a resistor converting the output signal into a voltage signal; and semiconductor layers of the first transistor, the second transistor, and the read control transistor are formed using an oxide semiconductor.

Abstract: A semiconductor device that suppresses operation delay due to stop and restart of the supply of a power supply potential is provided. A potential corresponding to data held while power supply potential is continuously supplied is backed up in a node connected to a capacitor while the supply of the power supply potential is stopped. Then, by utilizing change in resistance of a channel in a transistor whose gate is the node, the data is restored with restart of the supply of the power supply potential. Note that by supplying a high potential to the node before the data back up, high-speed and accurate data back up is possible.

Abstract: The circuit scale of a semiconductor device that can perform arithmetic processing of analog data is reduced. In the semiconductor device, a memory cell is configured to generate a first current corresponding to first analog data and to generate a second current corresponding to the first analog data and second analog data. A reference memory cell is configured to generate a reference current corresponding to reference data. A first circuit is configured to generate and hold a third current corresponding to the difference between the first current and the reference current when the first current is lower than the reference current. A second circuit is configured to generate and hold a fourth current corresponding to the difference between the first current and the reference current when the first current is higher than the reference current. One of the first circuit and the second circuit is configured to generate a fifth current corresponding to third analog data.

Abstract: An imaging device capable of obtaining image data with a small amount of X-ray irradiation is provided. The imaging device obtains an image using X-rays and includes a scintillator and a plurality of pixel circuits arranged in a matrix and overlapping with the scintillator. The use of a transistor with an extremely small off-state current in the pixel circuits enables leakage of electrical charges from a charge accumulation portion to be reduced as much as possible, and an accumulation operation to be performed substantially at the same time in all of the pixel circuits. The accumulation operation is synchronized with X-ray irradiation, so that the amount of X-ray irradiation can be reduced.

Abstract: To reduce power consumption. Included are a selection signal output circuit, a reset signal output circuit, and a plurality of photodetector circuits. After the selection signal output circuit outputs part of the selection signals, output of the other selection signals from the selection signal output circuit is stopped. After the reset signal output circuit outputs part of the reset signals, output of the other reset signals from the reset signal output circuit is stopped.

Abstract: Data corrupted by a soft error is recovered. A storage device includes a first memory cell, a second memory cell, a sense circuit electrically connected to the first memory cell through a first sense line and to the second memory cell through a second sense line, a digital-analog converter circuit electrically connected to the first memory cell and the second memory cell through a bit line, and an analog-digital converter circuit. The digital-analog converter circuit has a function of applying voltages as first signals to the first memory cell and the second memory cell. Even when a soft error occurs in the first memory cell or the second memory cell, the storage device has a function of recovering data corrupted by the soft error because the sense circuit selects and outputs a higher one of the voltages applied to the first memory cell and the second memory cell.

Abstract: A method for transmitting image data to a display device at high speed is provided. Image data to be transmitted is input to a phase modulation portion, and is mixed with a high-frequency carrier wave. The carrier wave is modulated with a technique of phase-shift keying, and output to a transmission line determined in consideration of the transmission characteristics of the high-frequency wave. A phase regulating portion of the phase modulation portion has a function of adjusting the amount of change in phase with the use of an electric signal. A phase demodulation portion beyond the transmission line demodulates the modulated carrier wave and extracts the image data. The multi-bit image data can be transmitted by the technique of the phase-shift keying. The high-speed transmission enables serial conversion of the original image data and decreases the number of transmission lines.

Abstract: An imaging device which does not include a color filter and does not need arithmetic processing using an external processing circuit is provided. A first circuit includes a first photoelectric conversion element, a first transistor, and a second transistor; a second circuit includes a second photoelectric conversion element, a third transistor, and a fourth transistor; a third circuit includes a fifth transistor, a sixth transistor, a seventh transistor, and a second capacitor; the spectroscopic element is provided over the first photoelectric conversion element or the second photoelectric conversion element; and the first circuit and the second circuit is connected to the third circuit through a first capacitor.

Abstract: A decoder with reduced power consumption is provided. The decoder includes a first circuit and a second circuit for holding data. The second circuit includes a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor include an oxide semiconductor in a channel formation region. The third transistor includes silicon in a channel formation region. A gate of the second transistor is electrically connected to one of a source and a drain of the first transistor and a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor. The decoder is configured to provide or stop power supply to the semiconductor device depending on a packet ID of a header portion of the data and to perform data storing or restoring of data between the first circuit and the second circuit.