Abstract: A copper alloy wiring film of a flat panel display of the present invention and a sputtering target for forming the same have a composition including Mg: 0.1 to 5 atom %; either one or both of Mn and Al: 0.1 to 11 atom % in total; and Cu and inevitable impurities as the balance, and if necessary, may be further including P: 0.001 to 0.1 atom %.

Abstract: A copper alloy sheet for terminal and connector materials contains 4.5 mass % to 12.0 mass % of Zn, 0.40 mass % to 0.9 mass % of Sn, 0.01 mass % to 0.08 mass % of P, and 0.20 mass % to 0.85 mass % of Ni with a remainder being Cu and inevitable impurities, a relationship of 11?[Zn]+7.5×[Sn]+16×[P]+3.5×[Ni]?19 is satisfied, a relationship of 7?[Ni]/[P]?40 is satisfied in a case in which the content of Ni is in a range of 0.35 mass % to 0.85 mass %, an average crystal grain diameter is in a range of 2.0 ?m to 8.0 ?m, an average particle diameter of circular or elliptical precipitates is in a range of 4.0 nm to 25.0 nm or a proportion of the number of precipitates having a particle diameter in a range of 4.0 nm to 25.0 nm in the precipitates is 70% or more, an electric conductivity is 29% IACS or more, a percentage of stress relaxation is 30% or less at 150° C. for 1000 hours as stress relaxation resistance, bending workability is R/t?0.

Abstract: A copper alloy sheet according to one aspect contains 28.0 mass % to 35.0 mass % of Zn, 0.15 mass % to 0.75 mass % of Sn, 0.005 mass % to 0.05 mass % of P, and a balance consisting of Cu and unavoidable impurities, in which relationships of 44?[Zn]+20×[Sn]?37 and 32?[Zn]+9×([Sn]?0.25)1/2?37 are satisfied. The copper alloy sheet according to the aspect is manufactured by a manufacturing process including a finish cold-rolling process of cold-rolling a copper alloy material, an average grain size of the copper alloy material is 2.0 ?m to 7.0 ?m, and a sum of an area ratio of a ? phase and an area ratio of a ? phase in a metallographic structure of the copper alloy material is 0% to 0.9%.

Abstract: A copper alloy sheet according to one aspect contains 28.0 mass % to 35.0 mass % of Zn, 0.15 mass % to 0.75 mass % of Sn, 0.005 mass % to 0.05 mass % of P, and a balance consisting of Cu and unavoidable impurities, in which relationships of 44?[Zn]+20×[Sn]?37 and 32?[Zn]+9×([Sn]?0.25)1/2?37 are satisfied. The copper alloy sheet according to the aspect is manufactured by a manufacturing process including a finish cold-rolling process of cold-rolling a copper alloy material, an average grain size of the copper alloy material is 2.0 ?m to 7.0 ?m, and a sum of an area ratio of a ? phase and an area ratio of a ? phase in a metallographic structure of the copper alloy material is 0% to 0.9%.

Abstract: This Cu alloy sputtering target includes, in terms of atomic percent: Al: 1% to 10%; and Ca: 0.1% to 2%, with the balance being Cu and 1% or less of inevitable impurities. This thin film transistor includes: a gate electrode layer joined to the surface of a glass substrate through an adhesion layer; a gate insulating layer; a Si semiconductor layer; an n-type Si semiconductor layer; a barrier layer; a wire layer composed of a drain electrode layer and a source electrode layer, both of which are mutually divided; a passivation layer; and a transparent electrode layer, wherein the barrier layer is formed by sputtering under an oxidizing atmosphere using the Cu alloy sputtering target.

Abstract: This wiring layer structure includes: an underlying substrate of a semiconductor substrate or a glass substrate; an oxygen-containing Cu layer or an oxygen-containing Cu alloy layer which is formed on the underlying substrate; an oxide layer containing at least one of Al, Zr, and Ti which is formed on the oxygen-containing Cu layer or the oxygen-containing Cu alloy layer; and a Cu alloy layer containing at least one of Al, Zr, and Ti which is formed on the oxide layer.

Abstract: This wiring layer structure includes: an underlying substrate of a semiconductor substrate or a glass substrate; an oxygen-containing Cu layer or an oxygen-containing Cu alloy layer which is formed on the underlying substrate; an oxide layer containing at least one of Al, Zr, and Ti which is formed on the oxygen-containing Cu layer or the oxygen-containing Cu alloy layer; and a Cu alloy layer containing at least one of Al, Zr, and Ti which is formed on the oxide layer.

Abstract: This Cu alloy sputtering target includes, in terms of atomic percent: Al: 1% to 10%; and Ca: 0.1% to 2%, with the balance being Cu and 1% or less of inevitable impurities. This thin film transistor includes: a gate electrode layer joined to the surface of a glass substrate through an adhesion layer; a gate insulating layer; a Si semiconductor layer; an n-type Si semiconductor layer; a barrier layer; a wire layer composed of a drain electrode layer and a source electrode layer, both of which are mutually divided; a passivation layer; and a transparent electrode layer, wherein the barrier layer is formed by sputtering under an oxidizing atmosphere using the Cu alloy sputtering target.

Abstract: A copper alloy wiring film of a flat panel display of the present invention and a sputtering target for forming the same have a composition including Mg: 0.1 to 5 atom %; either one or both of Mn and Al: 0.1 to 11 atom % in total; and Cu and inevitable impurities as the balance, and if necessary, may be further including P: 0.001 to 0.1 atom %.

Abstract: This sputtering target for forming a thin film transistor wiring film has a composition including 0.1 at % to 5 at % of Mg, 0.1 at % to 10 at % of Ca, and the remainder being Cu and inevitable impurities. Either one or both of Mn and Al may further be included at a total amount in a range of 0.1 at % to 10 at %. 0.001 at % to 0.1 at % of P may further be included.