Patents by Inventor Yosuke Yukawa

Yosuke Yukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010011766
    Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.
    Type: Application
    Filed: March 19, 2001
    Publication date: August 9, 2001
    Inventors: Hirotaka Nishizawa, Yosuke Yukawa, Takashi Totsuka
  • Patent number: 4947373
    Abstract: A semiconductor memory is provided with a first memory cell group, a second memory cell group, a first register for a serial output operation for holding information related to the first memory cell group, a second register for a serial output operation for holding information related to the second memory cell group, and transfer means for transferring information related to either the first or second memory cell group to either the first or second serial output register. By virtue of this arrangement, while the information transferred to the first serial output register is being serially output therefrom, information can simultaneously be transferred to the second serial output register by the transfer means.
    Type: Grant
    Filed: December 17, 1987
    Date of Patent: August 7, 1990
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Yasunori Yamaguchi, Katsuyuki Sato, Jun Mitake, Hitoshi Kawaguchi, Masahiro Yoshida, Terutaka Okada, Makoto Morino, Tetsuya Saeki, Yosuke Yukawa, Osamu Nagashima