Patents by Inventor You-Ru Lin

You-Ru Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9450098
    Abstract: A fin field effect transistor (FinFET) device is provided. The FinFET includes a superlattice layer and a strained layer. The superlattice layer is supported by a substrate. The strained layer is disposed on the superlattice layer and provides a gate channel. The gate channel is stressed by the superlattice layer. In an embodiment, the superlattice layer is formed by stacking different silicon germanium alloys or stacking other III-V semiconductor materials.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: September 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
  • Publication number: 20160099352
    Abstract: An embodiment is a structure. The structure comprises a fin on a substrate, isolation regions on the substrate, a dielectric region, and a gate structure. The fin includes a first epitaxial portion. The isolation regions are on opposing sides of the fin, and at least the first epitaxial portion of the fin protrudes from between the isolation regions. The dielectric region directly underlies the first epitaxial portion. A material of the dielectric region is different from a material of the isolation regions. The gate structure is along sidewalls and is over an upper surface of the fin. The gate structure defines a channel region in the first epitaxial portion.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Inventors: Tung Ying Lee, Yu-Lien Huang, You-Ru Lin
  • Publication number: 20160020302
    Abstract: Methods of semiconductor arrangement formation are provided. A method of forming the semiconductor arrangement includes forming a first nucleus on a substrate in a trench or between dielectric pillars on the substrate. Forming the first nucleus includes applying a first source material beam at a first angle relative to a top surface of the substrate and concurrently applying a second source material beam at a second angle relative to the top surface of the substrate. A first semiconductor column is formed from the first nucleus by rotating the substrate while applying the first source material beam and the second source material beam. Forming the first semiconductor column in the trench or between the dielectric pillars using the first source material beam and the second source material beam restricts the formation of the first semiconductor column to a single direction.
    Type: Application
    Filed: July 18, 2014
    Publication date: January 21, 2016
    Inventors: Wei-Chieh Chen, Hao-Hsiung Lin, Shu-Han Chen, You-Ru Lin, Cheng-Hsien Wu, Chih-Hsin Ko, Clement Hsingjen Wann
  • Publication number: 20150380527
    Abstract: A FinFET comprises an isolation region formed in a substrate, a cloak-shaped active region formed over the substrate, wherein the cloak-shaped active region has an upper portion protruding above a top surface of the isolation region. In addition, the FinFET comprises a gate electrode wrapping the channel of the cloak-shaped active region.
    Type: Application
    Filed: September 4, 2015
    Publication date: December 31, 2015
    Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
  • Patent number: 9153582
    Abstract: A FinFET comprises an isolation region formed in a substrate, a cloak-shaped active region formed over the substrate, wherein the cloak-shaped active region has an upper portion protruding above a top surface of the isolation region. In addition, the FinFET comprises a gate electrode wrapping the channel of the cloak-shaped active region.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: October 6, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
  • Publication number: 20150162447
    Abstract: A fin field effect transistor (FinFET) device is provided. The FinFET includes a superlattice layer and a strained layer. The superlattice layer is supported by a substrate. The strained layer is disposed on the superlattice layer and provides a gate channel. The gate channel is stressed by the superlattice layer. In an embodiment, the superlattice layer is formed by stacking different silicon germanium alloys or stacking other III-V semiconductor materials.
    Type: Application
    Filed: February 19, 2015
    Publication date: June 11, 2015
    Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
  • Patent number: 8994002
    Abstract: A fin field effect transistor (FinFET) device is provided. The FinFET includes a superlattice layer and a strained layer. The superlattice layer is supported by a substrate. The strained layer is disposed on the superlattice layer and provides a gate channel. The gate channel is stressed by the superlattice layer. In an embodiment, the superlattice layer is formed by stacking different silicon germanium alloys or stacking other III-V semiconductor materials.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: March 31, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
  • Publication number: 20150011068
    Abstract: The present disclosure provides a FinFET device. The FinFET device comprises a semiconductor substrate of a first semiconductor material; a fin structure of the first semiconductor material overlying the semiconductor substrate, wherein the fin structure has a top surface of a first crystal plane orientation; a diamond-like shape structure of a second semiconductor material disposed over the top surface of the fin structure, wherein the diamond-like shape structure has at least one surface of a second crystal plane orientation; a gate structure disposed over the diamond-like shape structure, wherein the gate structure separates a source region and a drain region; and a channel region defined in the diamond-like shape structure between the source and drain regions.
    Type: Application
    Filed: September 22, 2014
    Publication date: January 8, 2015
    Inventors: You-Ru Lin, Cheng-Hsien Wu, Chih-Hsin Ko, Clement Hsingjen Wann
  • Publication number: 20140284726
    Abstract: A FinFET device comprises an isolation region in a substrate, wherein the isolation region comprises a plurality of non-vertical sidewalls, a first V-shaped groove, a second V-shaped groove and a third V-shaped groove formed in the substrate, a first cloak-shaped active region over the first V-shaped groove, wherein a top surface of the first cloak-shaped active region comprises a first slope, a second cloak-shaped active region over the second V-shaped groove, wherein a top surface of the second cloak-shaped active region is triangular in shape and a third cloak-shaped active region over the third V-shaped groove, wherein a top surface of the third cloak-shaped active region comprises a second slope.
    Type: Application
    Filed: June 3, 2014
    Publication date: September 25, 2014
    Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
  • Patent number: 8841701
    Abstract: The present disclosure provides a FinFET device. The FinFET device comprises a semiconductor substrate of a first semiconductor material; a fin structure of the first semiconductor material overlying the semiconductor substrate, wherein the fin structure has a top surface of a first crystal plane orientation; a diamond-like shape structure of a second semiconductor material disposed over the top surface of the fin structure, wherein the diamond-like shape structure has at least one surface of a second crystal plane orientation; a gate structure disposed over the diamond-like shape structure, wherein the gate structure separates a source region and a drain region; and a channel region defined in the diamond-like shape structure between the source and drain regions.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: September 23, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: You-Ru Lin, Cheng-Hsien Wu, Chih-Hsin Ko, Clement Hsingjen Wann
  • Patent number: 8815712
    Abstract: A treatment is performed on a surface of a first semiconductor region, wherein the treatment is performed using process gases including an oxygen-containing gas and an etching gas for etching the semiconductor material. An epitaxy is performed to grow a second semiconductor region on the surface of the first semiconductor region.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: August 26, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Tien Wan, You-Ru Lin, Yi-Jing Lee, Cheng-Hsien Wu, Chih-Hsin Ko, Clement Hsingjen Wann
  • Publication number: 20140220753
    Abstract: A FinFET comprises an isolation region formed in a substrate, a cloak-shaped active region formed over the substrate, wherein the cloak-shaped active region has an upper portion protruding above a top surface of the isolation region. In addition, the FinFET comprises a gate electrode wrapping the channel of the cloak-shaped active region.
    Type: Application
    Filed: April 14, 2014
    Publication date: August 7, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
  • Patent number: 8742509
    Abstract: A FinFET comprises an isolation region formed in a substrate, a cloak-shaped active region formed over the substrate, wherein the cloak-shaped active region has an upper portion protruding above a top surface of the isolation region. In addition, the FinFET comprises a gate electrode wrapping the channel of the cloak-shaped active region.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: June 3, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
  • Publication number: 20130240836
    Abstract: A fin field effect transistor (FinFET) device is provided. The FinFET includes a superlattice layer and a strained layer. The superlattice layer is supported by a substrate. The strained layer is disposed on the superlattice layer and provides a gate channel. The gate channel is stressed by the superlattice layer. In an embodiment, the superlattice layer is formed by stacking different silicon germanium alloys or stacking other III-V semiconductor materials.
    Type: Application
    Filed: March 16, 2012
    Publication date: September 19, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
  • Publication number: 20130228875
    Abstract: A FinFET comprises an isolation region formed in a substrate, a cloak-shaped active region formed over the substrate, wherein the cloak-shaped active region has an upper portion protruding above a top surface of the isolation region. In addition, the FinFET comprises a gate electrode wrapping the channel of the cloak-shaped active region.
    Type: Application
    Filed: March 1, 2012
    Publication date: September 5, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jing Lee, You-Ru Lin, Cheng-Tien Wan, Cheng-Hsien Wu, Chih-Hsin Ko
  • Publication number: 20130171792
    Abstract: A treatment is performed on a surface of a first semiconductor region, wherein the treatment is performed using process gases including an oxygen-containing gas and an etching gas for etching the semiconductor material. An epitaxy is performed to grow a second semiconductor region on the surface of the first semiconductor region.
    Type: Application
    Filed: March 7, 2012
    Publication date: July 4, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Tien Wan, You-Ru Lin, Yi-Jing Lee, Cheng-Hsien Wu, Chih-Hsin Ko, Clement Hsingjen Wann
  • Publication number: 20130049068
    Abstract: The present disclosure provides a FinFET device. The FinFET device comprises a semiconductor substrate of a first semiconductor material; a fin structure of the first semiconductor material overlying the semiconductor substrate, wherein the fin structure has a top surface of a first crystal plane orientation; a diamond-like shape structure of a second semiconductor material disposed over the top surface of the fin structure, wherein the diamond-like shape structure has at least one surface of a second crystal plane orientation; a gate structure disposed over the diamond-like shape structure, wherein the gate structure separates a source region and a drain region; and a channel region defined in the diamond-like shape structure between the source and drain regions.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: You-Ru Lin, Cheng-Hsien Wu, Chih-Hsin Ko, Clement Hsingjen Wann