Patents by Inventor Youjun Chen

Youjun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070297223
    Abstract: A method and system for providing a magnetic memory is described. The magnetic memory includes magnetic storage cells in an array, bit lines, and source lines. Each magnetic storage cell includes at least one magnetic element. The magnetic element(s) are programmable by write currents driven through the magnetic element(s). Each magnetic element has free and pinned layer(s) and a dominant spacer.
    Type: Application
    Filed: June 26, 2006
    Publication date: December 27, 2007
    Inventors: Eugene Youjun Chen, Yiming Huai, Alex Fischer Panchula, Lien-Chang Wang, Xiao Luo
  • Publication number: 20070279968
    Abstract: A method and system for providing a magnetic memory is described. The method and system include providing magnetic memory cells, local and global word lines, bit lines, and source lines. Each magnetic memory cell includes a magnetic element and a selection device connected with the magnetic element. The magnetic element is programmed by first and second write currents driven through the magnetic element in first and second directions. The local word lines are connected with the selection device of and have a first resistivity. Each global word line corresponds to a portion of the local word lines and has a resistivity lower than the first resistivity. The bit lines are connected with the magnetic element. The source lines are connected with the selection device. Each source line corresponds to a more than one of the magnetic memory cells and carries the first and second write currents.
    Type: Application
    Filed: June 1, 2006
    Publication date: December 6, 2007
    Inventors: Xiao Luo, Eugene Youjun Chen, Lien-Chang Wang, Yiming Huai
  • Patent number: 7286395
    Abstract: A method and system for providing a magnetic memory is described. The magnetic memory includes a plurality of magnetic storage cell and at least one bit line and a plurality of source lines corresponding to the plurality of magnetic storage cells. Each magnetic storage cell includes a magnetic element that is programmed to a high resistance state by a first write current driven through the magnetic element in a first direction and to a low resistance state by a second write current driven through the magnetic element in a second direction. The bit line(s) and the source lines are configured to drive the first write current through the magnetic element in the first direction, to drive the second write current through the magnetic element in the second direction, and to drive at least one read current through the magnetic element in a third direction that does not destabilize the low resistance state.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: October 23, 2007
    Assignee: Grandis, Inc.
    Inventors: Eugene Youjun Chen, Yiming Huai
  • Patent number: 7272034
    Abstract: A method and system for providing a magnetic memory is described. The method and system include providing a plurality of magnetic storage cells. Each of the plurality of magnetic storage cells includes at least one magnetic element and a plurality of selection transistors. The at least one magnetic element is capable of being programmed using spin transfer induced switching by a write current driven through the at least one magnetic element. The at least one selection transistor is configured to allow the magnetic element to be alternately selected for writing and reading. Architectures for reading and writing to the magnetic storage cells are also described.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: September 18, 2007
    Assignee: Grandis, Inc.
    Inventors: Eugene Youjun Chen, Yiming Huai
  • Patent number: 7272035
    Abstract: A method and system for providing a magnetic memory is described. The method and system include providing a plurality of magnetic storage cells. Each of the plurality of magnetic storage cells includes a magnetic element and a selection transistor. The magnetic element may be programmed using spin transfer induced switching by a write current driven through the magnetic element. The selection transistor includes a source and a drain. The plurality of magnetic storage cells are grouped in pairs. The source of the selection transistor for one magnetic storage cell of a pair shares the source with the selection transistor for another magnetic storage cell of the pair.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: September 18, 2007
    Assignee: Grandis, Inc.
    Inventors: Eugene Youjun Chen, Yiming Huai
  • Publication number: 20070149225
    Abstract: A method for authenticating a Short Message (SM) calling party, including: if a Signal Relay Function for support of Mobile Number Portability (MNP-SRF) module detects a calling party number carried in an SM belongs to its serving network after receiving a Mobile Originated (MO) SM, the MNP_SRF module adds an identifier of the MNP_SRF module's network to the calling party number. A Short Message Serving Center (SMSC) determines whether the SM passes calling party authentication according to the fact that whether the calling party number carries an identifier of the SMSC's network. The invention provides a system for authenticating an SM calling party, including: a Mobile Switching Center (MSC), a calling MNP_SRF module, a Number Portability Database (NPDB) and a Short Message Serving Center (SMSC). The invention may avoid a mobile number having subscribed to a new network from using resources of the SMSC of a network to which the subscription has been canceled.
    Type: Application
    Filed: January 12, 2007
    Publication date: June 28, 2007
    Applicant: Huawei Technologies Co., Ltd.
    Inventors: Youjun Chen, Zujian Li, Guofan Tong, Weihua Ding
  • Publication number: 20060153355
    Abstract: Disclosed are systems and methods for providing ring back tones in a communication network. At first, a ring back tone device for storing and playing the ring back tone customized by a subscriber is established in the communication network. Whether a subscriber is a ring back tone service register subscriber is judged with a certain triggering mode, such as intelligent network triggering, signaling interception triggering, call forwarding triggering or switching device triggering. If it is judged the subscriber is a ring back tone service registered subscriber, a connection between the originating switching device and the terminating switching device and a connection between a switching device and the ring back tone device are established. When the called terminal is idle, the ring back tone device provides a piece of customized ring back tone to the calling subscriber for replacing traditional ring back tone.
    Type: Application
    Filed: November 15, 2005
    Publication date: July 13, 2006
    Applicant: Huawei Technologies Co., Ltd.
    Inventors: Bin Wang, Yihua Cheng, Xiaoqing Hu, Xiaojun Mo, Jihong Dong, Qian Yu, Xuanming Lu, Xiaodong Zhao, Yongfeng Cai, Junrong Xu, Guodao Yang, Youjun Chen, Zujian Li, Guofan Tong, Shichang Xiao, Yi Zhang, Jiaqing Liu, Yonghong Wu, Shiqian Li
  • Patent number: 6912107
    Abstract: An improved and novel device and fabrication method for a magnetic element, and more particularly a magnetic element (10) including a first electrode (14), a second electrode (18) and a spacer layer (16). The first electrode (14) and the second electrode (18) include ferromagnetic layers (26 & 28). A spacer layer (16) is located between the ferromagnetic layer (26) of the first electrode (14) and the ferromagnetic layer (28) of the second electrode (16) for permitting tunneling current in a direction generally perpendicular to the ferromagnetic layers (26 & 28). The device includes insulative veils (34) characterized as electrically isolating the first electrode (14) and the second electrode (18), the insulative veils (34) including non-magnetic and insulating dielectric properties.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: June 28, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Eugene Youjun Chen, Mark Durlam, Saied N. Tehrani, Mark DeHerrera, Gloria Kerszykowski, Kelly Wayne Kyler
  • Patent number: 6835423
    Abstract: An improved and novel device and fabrication method for a magnetic element, and more particularly a magnetic element (10) including a first electrode (14), a second electrode (18) and a spacer layer (16). The first electrode (14) and the second electrode (18) include ferromagnetic layers (26 & 28). A spacer layer (16) is located between the ferromagnetic layer (26) of the first electrode (14) and the ferromagnetic layer (28) of the second electrode (16) for permitting tunneling current in a direction generally perpendicular to the ferromagnetic layers (26 & 28). The device includes insulative veils (34) characterized as electrically isolating the first electrode (14) and the second electrode (18), the insulative veils (34) including non-magnetic and insulating dielectric properties.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: December 28, 2004
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Eugene Youjun Chen, Mark Durlam, Saied N. Tehrani, Mark DeHerrera, Gloria Kerszykowski, Kelly Wayne Kyler
  • Publication number: 20040197579
    Abstract: An improved and novel device and fabrication method for a magnetic element, and more particularly a magnetic element (10) including a first electrode (14), a second electrode (18) and a spacer layer (16). The first electrode (14) and the second electrode (18) include ferromagnetic layers (26 & 28). A spacer layer (16) is located between the ferromagnetic layer (26) of the first electrode (14) and the ferromagnetic layer (28) of the second electrode (16) for permitting tunneling current in a direction generally perpendicular to the ferromagnetic layers (26 & 28). The device includes insulative veils (34) characterized as electrically isolating the first electrode (14) and the second electrode (18), the insulative veils (34) including non-magnetic and insulating dielectric properties.
    Type: Application
    Filed: April 21, 2004
    Publication date: October 7, 2004
    Inventors: Eugene Youjun Chen, Mark Durlam, Saied N. Tehrani, Mark DeHerrera, Gloria Kerszykowski, Kelly Wayne Kyler
  • Patent number: 6750068
    Abstract: An improved and novel magnetic element and fabrication method. The magnetic element (10;30) including a bottom pinned ferromagnetic layer (12;32) and a top pinned ferromagnetic layer (20;40) fabricated antiparallel to one another. The magnetic element (10;30) further including a bottom tunnel barrier layer (14;34), a free ferromagnetic layer (16;46 and 48) and a top tunnel barrier layer (18;38) formed between the bottom pinned ferromagnetic layer (12;32) and the top pinned ferromagnetic layer (20;40). The structure is defined as including two (2) tunnel barrier layers in which one tunnel barrier layer is normal (18) and one is reversed (14), or a structure in which the two tunnel barrier layers are of the same type (34; 38) with the structure further includes a SAF structure (36) to allow for consistently changing magnetoresistance ratios across both tunnel barriers. The magnetic element (10;30) having an improved magnetoresistance ratio and a decrease in voltage dependence.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: June 15, 2004
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Eugene Youjun Chen
  • Publication number: 20030134096
    Abstract: An improved and novel device and fabrication method for a magnetic element, and more particularly a magnetic element (10) including a first electrode (14), a second electrode (18) and a spacer layer (16). The first electrode (14) and the second electrode (18) include ferromagnetic layers (26 & 28). A spacer layer (16) is located between the ferromagnetic layer (26) of the first electrode (14) and the ferromagnetic layer (28) of the second electrode (16) for permitting tunneling current in a direction generally perpendicular to the ferromagnetic layers (26 & 28). The device includes insulative veils (34) characterized as electrically isolating the first electrode (14) and the second electrode (18), the insulative veils (34) including non-magnetic and insulating dielectric properties.
    Type: Application
    Filed: January 22, 2003
    Publication date: July 17, 2003
    Inventors: Eugene Youjun Chen, Mark Durlam, Saied N. Tehrani, Mark DeHerrera, Gloria Kerszykowski, Kelly Wayne Kyler
  • Publication number: 20030048658
    Abstract: An improved and novel magnetic element and fabrication method. The magnetic element (10;30) including a bottom pinned ferromagnetic layer (12;32) and a top pinned ferromagnetic layer (20;40) fabricated antiparallel to one another. The magnetic element (10;30) further including a bottom tunnel barrier layer (14;34), a free ferromagnetic layer (16;46 and 48) and a top tunnel barrier layer (18;38) formed between the bottom pinned ferromagnetic layer (12;32) and the top pinned ferromagnetic layer (20;40). The structure is defined as including two (2) tunnel barrier layers in which one tunnel barrier layer is normal (18) and one is reversed (14), or a structure in which the two tunnel barrier layers are of the same type (34; 38) with the structure further includes a SAF structure (36) to allow for consistently changing magnetoresistance ratios across both tunnel barriers. The magnetic element (10;30) having an improved magnetoresistance ratio and a decrease in voltage dependence.
    Type: Application
    Filed: August 20, 2002
    Publication date: March 13, 2003
    Inventor: Eugene Youjun Chen
  • Patent number: 6469926
    Abstract: An improved and novel magnetic element and fabrication method. The magnetic element (10;30) including a bottom pinned ferromagnetic layer (12;32) and a top pinned ferromagnetic layer (20;40) fabricated antiparallel to one another. The magnetic element (10;30) further including a bottom tunnel barrier layer (14;34), a free ferromagnetic layer (16;46 and 48) and a top tunnel barrier layer (18;38) formed between the bottom pinned ferromagnetic layer (12;32) and the top pinned ferromagnetic layer (20;40). The structure is defined as including two (2) tunnel barrier layers in which one tunnel barrier layer is normal (18) and one is reversed (14), or a structure in which the two tunnel barrier layers are of the same type (34; 38) with the structure further includes a SAF structure (36) to allow for consistently changing magnetoresistance ratios across both tunnel barriers. The magnetic element (10;30) having an improved magnetoresistance ratio and a decrease in voltage dependence.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: October 22, 2002
    Assignee: Motorola, Inc.
    Inventor: Eugene Youjun Chen
  • Patent number: 6376260
    Abstract: An improved and novel fabrication method for a magnetic element, and more particularly a magnetic element (10) including a first electrode (14) , a second electrode (18) and a spacer layer (16). The first electrode (14) includes a fixed ferromagnetic layer (26) having a thickness t1. A second electrode (18) is included and comprises a free ferromagnetic layer (28) having a thickness t2. A spacer layer (16) is located between the fixed ferromagnetic layer (26) and the free ferromagnetic (28) layer, the spacer layer (16) having a thickness t3, where 0.25t3<t1<2t3, thereby producing near zero magnetic field at the free ferromagnetic layer (28).
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: April 23, 2002
    Assignee: Motorola, Inc.
    Inventors: Eugene Youjun Chen, Jon Michael Slaughter, Jing Shi
  • Patent number: 6292389
    Abstract: An improved and novel fabrication method for a magnetic element, and more particularly a magnetic element (10) including a first electrode (14), a second electrode (18) and a spacer layer (16). The first electrode (14) includes a fixed ferromagnetic layer (26) having a thickness t1. A second electrode (18) is included and comprises a free ferromagnetic layer (28) having a thickness t2. A spacer layer (16) is located between the fixed ferromagnetic layer (26) and the free ferromagnetic (28) layer, the spacer layer (16) having a thickness t3, where 0.25t3<t1<2t3, thereby producing near zero magnetic field at the free ferromagnetic layer (28).
    Type: Grant
    Filed: July 19, 1999
    Date of Patent: September 18, 2001
    Assignee: Motorola, Inc.
    Inventors: Eugene Youjun Chen, Jon Michael Slaughter, Jing Shi
  • Patent number: 6233172
    Abstract: An improved and novel magnetic element (10; 10′; 50; 50′; 80) including a plurality of thin film layers wherein the bit end magneto-static demagnetizing fields cancel the total positive coupling of the structure to obtain dual magnetic states in a zero external field. Additionally disclosed is a method of fabricating a magnetic element (10) by providing a plurality of thin film layers wherein the bit end magneto-static demagnetizing fields of the thin film layers cancel the total positive coupling of the structure to obtain dual magnetic states in a zero external field.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: May 15, 2001
    Assignee: Motorola, Inc.
    Inventors: Eugene Youjun Chen, Jon Michael Slaughter, Mark Durlam, Mark DeHerrera, Saied N. Tehrani
  • Patent number: 6211090
    Abstract: A method of fabricating a flux concentrator for use in magnetic memory devices including the steps of providing at least one magnetic memory bit (10) and forming proximate thereto a material stack defining a copper (Cu) damascene bit line (56) including a flux concentrating layer (52). The method includes the steps of depositing a bottom dielectric layer (32), an optional etch stop (34) layer, and a top dielectric layer (36) proximate the magnetic memory bit (10). A trench (38) is etched in the top dielectric layer (36) and the bottom dielectric layer (32). A first barrier layer (42) is deposited in the trench (38). Next, a metal system (29) is deposited on a surface of the first barrier layer (42). The metal system (29) includes a copper (Cu) seed material (44), and a plated copper (Cu) material (46), a first outside barrier layer (50), a flux concentrating layer (52), and a second outside barrier layer (54). The metal system (29) is patterned and etched to define a copper (Cu) damascene bit line (56).
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: April 3, 2001
    Assignee: Motorola, Inc.
    Inventors: Mark Durlam, Eugene Youjun Chen, Saied N. Tehrani, Jon Michael Slaughter, Gloria Kerszykowski, Kelly Wayne Kyler