Patents by Inventor Youko FURIHATA

Youko FURIHATA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230276625
    Abstract: Contact via openings are formed through a retro-stepped dielectric material portion in a three-dimensional memory device to underlying etch stop structures. The etch stop structures may include a stepped conductive or semiconductor etch stop plate overlying stepped surfaces in the staircase region. The contact via openings are extended through the etch stop structures. Alternatively, electrically conductive layers, including a topmost dummy electrically conductive layer in the staircase region, may be employed as etch stop structures. In this case, the contact via openings can be extended through the electrically conductive layers. Insulating spacers are formed at peripheral regions of the extended contact via openings. Contact via structures surrounded by the insulating spacers are formed in the extended contact via openings to a respective underlying electrically conductive layer.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Inventors: Kazuto WATANABE, Youko FURIHATA
  • Publication number: 20180342531
    Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, the alternating stack containing a memory array region and a terrace region. Memory stack structures containing a memory film and a vertical semiconductor channel extend through the memory array region of the alternating stack. Support pillar structures extending through the terrace region of the alternating stack. The support pillar structures have different heights from each other.
    Type: Application
    Filed: May 29, 2017
    Publication date: November 29, 2018
    Inventors: Hiromasa Susuki, Masanori Tsutsumi, Shigehisa Inoue, Junji Oh, Kensuke Yamaguchi, Seiji Shimabukuro, Yuji Fukano, Ryoichi Ehara, Youko Furihata
  • Patent number: 10141331
    Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, the alternating stack containing a memory array region and a terrace region. Memory stack structures containing a memory film and a vertical semiconductor channel extend through the memory array region of the alternating stack. Support pillar structures extending through the terrace region of the alternating stack. The support pillar structures have different heights from each other.
    Type: Grant
    Filed: May 29, 2017
    Date of Patent: November 27, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Hiromasa Susuki, Masanori Tsutsumi, Shigehisa Inoue, Junji Oh, Kensuke Yamaguchi, Seiji Shimabukuro, Yuji Fukano, Ryoichi Ehara, Youko Furihata
  • Patent number: 9780034
    Abstract: A method of forming a monolithic three-dimensional memory device includes forming a first alternating stack over a substrate, forming an insulating cap layer, forming a first memory opening through the insulating cap layer and the first alternating stack, forming a sacrificial pillar structure in the first memory opening, forming a second alternating stack, forming a second memory opening, forming an inter-stack memory opening, forming a memory film and a first semiconductor channel layer in the inter-stack memory opening, anisotropically etching a horizontal bottom portion of the memory film and the first semiconductor channel layer to expose the substrate at the bottom of the inter-stack memory opening such that damage to portions of the first semiconductor channel layer and the memory film located adjacent to the insulating cap layer is reduced or avoided, and forming a second semiconductor channel layer in contact with the exposed substrate in the inter-stack memory opening.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: October 3, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Masanori Tsutsumi, Kota Funayama, Ryoichi Ehara, Youko Furihata, Zhenyu Lu, Tong Zhang, Tadashi Nakamura
  • Publication number: 20170271261
    Abstract: A method of forming a monolithic three-dimensional memory device includes forming a first alternating stack over a substrate, forming an insulating cap layer, forming a first memory opening through the insulating cap layer and the first alternating stack, forming a sacrificial pillar structure in the first memory opening, forming a second alternating stack, forming a second memory opening, forming an inter-stack memory opening, forming a memory film and a first semiconductor channel layer in the inter-stack memory opening, anisotropically etching a horizontal bottom portion of the memory film and the first semiconductor channel layer to expose the substrate at the bottom of the inter-stack memory opening such that damage to portions of the first semiconductor channel layer and the memory film located adjacent to the insulating cap layer is reduced or avoided, and forming a second semiconductor channel layer in contact with the exposed substrate in the inter-stack memory opening.
    Type: Application
    Filed: June 15, 2016
    Publication date: September 21, 2017
    Inventors: Masanori TSUTSUMI, Kota FUNAYAMA, Ryoichi EHARA, Youko FURIHATA, Zhenyu LU, Tong ZHANG, Tadashi NAKAMURA