Patents by Inventor Young-Hoon Kim

Young-Hoon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200020202
    Abstract: A sports bingo game operation method implemented by at least one data processor provided in a computing device capable of communicating with a client terminal of each user, includes generating, by the data processor, a bingo game of each user including at least N×N (N is a natural number of 3 or greater) tiles related to a sports game performance, determining, by the data processor, whether each of the tiles is daubed and the daubed tiles complete a bingo according to the sports game information according to sports game information, and determining a ranking of each user on the basis of points related to the daubed tiles and points related to the completed bingo.
    Type: Application
    Filed: February 5, 2018
    Publication date: January 16, 2020
    Inventors: Young-Hoon Kim, Yong-Hyuk Chang
  • Patent number: 10522206
    Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference voltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: December 31, 2019
    Assignee: SK hynix Inc.
    Inventors: Sang Kwon Lee, Kwang Soon Kim, Young Hoon Kim, Young Jun Yoon, Kyu Dong Hwang
  • Patent number: 10515795
    Abstract: A method of depositing a thin film includes: repeating a first gas supply cycle a first plurality of times, the first gas supply cycle including supplying a source gas to a reaction space; supplying first plasma while supplying a reactant gas to the reaction space; repeating a second gas supply cycle a second plurality of times, the second gas supply cycle including supplying the source gas to the reaction space; and supplying second plasma while supplying the reactant gas to the reaction space, wherein the supplying of the first plasma includes supplying remote plasma, and the supplying of the second plasma includes supplying direct plasma.
    Type: Grant
    Filed: January 2, 2017
    Date of Patent: December 24, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Young Hoon Kim, Dae Youn Kim, Sang Wook Lee
  • Patent number: 10501473
    Abstract: The present invention relates to a novel indene derivative, a preparation method for the same, and a pharmaceutical composition for treating retinal disease comprising the same as an active ingredient. The novel indene derivative of the present invention, the optional isomer of the same, or the pharmaceutically acceptable salts of the same have excellent inhibitory efficiency of receptor-interacting serine-threonine-protein kinase 1 (RIPK1). Therefore, the composition containing the same as an active ingredient can be effectively used as a pharmaceutical composition for treating retinal disease.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: December 10, 2019
    Assignee: THE INDUSTRY & ACADEMIC COOPERATION IN CHUNGNAM NATIONAL UNIVERSITY (IAC)
    Inventors: Eunhee Kim, Sung-Eun Yoo, Nam Sook Kang, Tae-Sung Koo, Min-Young Park, Young-Hoon Kim, Hyun-Ju Bae, Jin-Woo Kim, Tae-Kyu In, Choun-Ki Joo
  • Patent number: 10505230
    Abstract: Disclosed herein is an electrode assembly including unit cells, each of which is constituted by an electrode plate stack configured to have a structure in which a separator is disposed between electrode plates comprising positive electrodes or negative electrodes, wherein the electrode assembly includes a combination of two or more kinds of unit cells having different sizes, the unit cells are stacked in a height direction on the basis of a plane, two or more of the unit cells located at a lower part of the electrode assembly, i.e. two or more base unit cells, are wound using a single sheet-type separation film to constitute an integrated base structure, and the others of the unit cells excluding the base unit cells, i.e. sub unit cells, are stacked in a state in which a separator is disposed between the respective sub unit cells.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: December 10, 2019
    Assignee: LG CHEM, LTD.
    Inventors: Young Hoon Kim, Young Joon Shin, Sungjin Kwon, Dong-Myung Kim, Ki Woong Kim
  • Publication number: 20190357127
    Abstract: The present application relates to a method of generating a downlink frame. The method of generating the downlink frame includes: generating a first short sequence and a second short sequence indicating cell group information; generating a first scrambling sequence and a second scrambling sequence determined by the primary synchronization signal; generating a third scrambling sequence determined by the first short sequence and a fourth scrambling sequence determined by the second short sequence; scrambling the short sequences with the respective scrambling sequences; and mapping the secondary synchronization signal that includes the first short sequence scrambled with the first scrambling sequence, the second short sequence scrambled with the second scrambling sequence and the third scrambling sequence, the second short sequence scrambled with the first scrambling sequence and the first short sequence scrambled by the second scrambling sequence and the fourth scrambling sequence to a frequency domain.
    Type: Application
    Filed: August 2, 2019
    Publication date: November 21, 2019
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kap Seok CHANG, Il Gyu KIM, Hyeong Geun PARK, Young Jo KO, Hyo Seok Yl, Chan Bok JEONG, Young Hoon KIM, Seung Chan BANG
  • Patent number: 10482942
    Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference voltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: November 19, 2019
    Assignee: SK hynix Inc.
    Inventors: Sang Kwon Lee, Kwang Soon Kim, Young Hoon Kim, Young Jun Yoon, Kyu Dong Hwang
  • Publication number: 20190344160
    Abstract: According to the present invention, a sports bingo game operation method implemented by at least one data processor included in a computing device capable of communicating with a client terminal of each user comprises the steps of: allowing the data processor to generate a bingo game, for each user, composed of at least N×N grids (N is a natural number greater than or equal to 3) related to sports game results; allowing the data processor to update the bingo game by changing arrangement locations of at least two or more grids in response to a movement command; allowing the data processor to calculate the number of bingos completed in the updated bingo game, according to sports game information; and determining user ranking by calculating points on the basis of the calculated number of bingos.
    Type: Application
    Filed: January 18, 2018
    Publication date: November 14, 2019
    Inventors: Young-Hoon Kim, Yong-Hyuk Chang
  • Publication number: 20190341912
    Abstract: A semiconductor apparatus includes a pulse generation circuit which generates a pulse signal in response to a clock, and an amplification circuit which generates an output signal in response to an input signal, the clock, and the pulse signal, wherein the amplification circuit voltage is configured to amplify a voltage level difference between a pair of latch input nodes.
    Type: Application
    Filed: July 19, 2019
    Publication date: November 7, 2019
    Applicant: SK hynix Inc.
    Inventor: Young Hoon KIM
  • Patent number: 10440167
    Abstract: An artificial intelligence system and method are disclosed herein. The system includes a processor which implements the method, including: receiving by an input unit a first user input including a request to execute a task using at least one of the electronic device or an external device, transmitting by a wireless communication unit first data associated with the first user input to an external server, receiving a first response from the external server including information associated with at least one of the first user input and a sequence of electronic device states for performing at least a portion of the task, receiving a second user input assigning at least one of a voice command and a touch operation received by a touch screen display as the request to perform the task, and transmitting second data associated with the second user input to the external server.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: October 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-Hwan Choi, Sang-Wook Kang, Young-Hoon Kim, Seung-Hoon Park, Hyun-Ju Seo, Tae-Kwang Um, Jae-Yong Lee, Jin-Ho Choi, Da-Som Lee, Jae-Yung Yeo
  • Patent number: 10439598
    Abstract: A semiconductor apparatus includes a pulse generation circuit which generates a pulse signal in response to a clock, and an amplification circuit which generates an output signal in response to an input signal, the clock, and the pulse signal, wherein the amplification circuit voltage is configured to amplify a voltage level difference between a pair of latch input nodes.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: October 8, 2019
    Assignee: SK hynix Inc.
    Inventor: Young Hoon Kim
  • Patent number: 10423193
    Abstract: An electronic device and a method for controlling displaying of information in the electronic device are provided. The electronic device includes a first display formed on at least a portion of a body of the electronic device, and a second display formed on at least a portion of a cover functionally connected to the body and including a transparent display area.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: September 24, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong Eun Kim, Seon Il Kim, Young Hoon Kim, Jung Han Kim, Ju Nyun Kim, Jung Sik Park, Do Hun Cha, Seung Ki Choi, Soo Hyung Kim, Chang Wan Lee, Myung Gon Hong, Hyun Ju Hong
  • Patent number: 10404238
    Abstract: A semiconductor apparatus includes a pulse generation circuit which generates a pulse signal in response to a clock, and an amplification circuit which generates an output signal in response to an input signal, the clock, and the pulse signal, wherein the amplification circuit voltage is configured to amplify a voltage level difference between a pair of latch input nodes.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: September 3, 2019
    Assignee: SK hynix Inc.
    Inventor: Young Hoon Kim
  • Patent number: 10395921
    Abstract: Provided is a method of forming a thin film having a target thickness T on a substrate by an atomic layer deposition (ALD) method. The method includes n processing conditions each having a film growth rate that is different from the others, and determining a1 to an that are cycles of a first processing condition to an n-th processing condition so that a value of |T?(a1×G1+a2×G2+ . . . +an×Gn)| is less than a minimum value among G1, G2, . . . , and Gn, where n is 2 or greater integer, G1, . . . , and Gn respectively denote a first film growth rate that is a film growth rate of the first processing condition, . . . and an n-th film growth rate that is a film growth rate of the n-th processing condition, and the film growth rate denotes a thickness of a film formed per a unit cycle in each of the processing conditions. The film forming method may precisely and uniformly control a thickness of the thin film when an ALD is performed.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: August 27, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Young Hoon Kim, Dae Youn Kim, Seung Woo Choi, Hyung Wook Noh, Yong Min Yoo, Hak Joo Lee
  • Publication number: 20190260866
    Abstract: An artificial intelligence system and method are disclosed herein. The system includes a processor which implements the method, including: receiving by an input unit a first user input including a request to execute a task using at least one of the electronic device or an external device, transmitting by a wireless communication unit first data associated with the first user input to an external server, receiving a first response from the external server including information associated with at least one of the first user input and a sequence of electronic device states for performing at least a portion of the task, receiving a second user input assigning at least one of a voice command and a touch operation received by a touch screen display as the request to perform the task, and transmitting second data associated with the second user input to the external server.
    Type: Application
    Filed: April 19, 2019
    Publication date: August 22, 2019
    Inventors: Il-Hwan CHOI, Sang-Wook KANG, Young-Hoon KIM, Seung-Hoon PARK, Hyun-Ju SEO, Tae-Kwang UM, Jae-Yong LEE, Jin-Ho CHOI, Da-Som LEE, Jae-Yung YEO
  • Publication number: 20190258334
    Abstract: Provided are a transparent conductor and a display device including the same, the transparent conductor including: a substrate layer; and a transparent conductive pattern layer formed on the substrate layer, and the transparent conductive pattern layer includes a plurality of conductive areas and non-conductive areas, the non-conductive areas are formed every between neighboring conductive areas, the non-conductive area in the transparent conductive pattern layer has a deviation as calculated by Equation 1 herein, which has a value larger than about 1 and equal to or smaller than about 1.25, and the non-conductive areas have a minimum line width of 40 ?m or less.
    Type: Application
    Filed: December 14, 2016
    Publication date: August 22, 2019
    Inventors: Oh Hyeon HWANG, Dong Myeong SHIN, Ji Young HAN, Do Young KIM, Young Hoon KIM, Tae Ji KIM
  • Publication number: 20190259962
    Abstract: Provided are: a light-emitting layer for a perovskite light-emitting device; a method for manufacturing the same; and a perovskite light-emitting device using the same. The method of the present invention for manufacturing a light-emitting layer for an organic and inorganic hybrid perovskite light-emitting device comprises a step of forming a first nanoparticle thin film by coating, on a member for coating a light-emitting layer, a solution comprising organic and inorganic perovskite nanoparticles including an organic and inorganic perovskite nanocrystalline structure. Thereby, a nanoparticle light emitter has therein an organic and inorganic hybrid perovskite having a crystalline structure in which FCC and BCC are combined; forms a lamella structure in which an organic plane and an inorganic plane are alternatively stacked; and can show high color purity since excitons are confined to the inorganic plane.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 22, 2019
    Inventors: Tae-Woo LEE, Sanghyuk IM, Himchan CHO, Young-Hoon KIM
  • Patent number: 10388359
    Abstract: A semiconductor device may include a divider circuit and a detection circuit. The divider circuit may divide an external clock to generate a plurality of divided clocks. The detection circuit may generate a phase information signal and a timing information signal based on a plurality of data determination signals and the plurality of divided clocks.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: August 20, 2019
    Assignee: SK hynix Inc.
    Inventor: Young Hoon Kim
  • Publication number: 20190253041
    Abstract: A strobe generation circuit includes: a main hybrid multiplexing circuit outputting a main pull-up signal and a main pull-down signal to first and second nodes, respectively, the main pull-up and pull-down signals being selectively controlled based on first pull-up and pull-down control signals generated by removing an input loading of main data; a sub hybrid multiplexing circuit outputting a sub pull-up signal and a sub pull-down signal to the first and second nodes, respectively, the sub pull-up and pull-down signals being selectively controlled based on second pull-up and pull-down control signals generated by removing an input loading of sub data; a latch circuit latching a signal of the first node and a signal of the second node to output a first latch signal and a second latch signal; and an output driver outputting a strobe signal according to the first and second latch signals.
    Type: Application
    Filed: April 23, 2019
    Publication date: August 15, 2019
    Inventor: Young-Hoon KIM
  • Patent number: 10383041
    Abstract: The present application relates to a method of generating a downlink frame. The method of generating the downlink frame includes: generating a first short sequence and a second short sequence indicating cell group information; generating a first scrambling sequence and a second scrambling sequence determined by the primary synchronization signal; generating a third scrambling sequence determined by the first short sequence and a fourth scrambling sequence determined by the second short sequence; scrambling the short sequences with the respective scrambling sequences; and mapping the secondary synchronization signal that includes the first short sequence scrambled with the first scrambling sequence, the second short sequence scrambled with the second scrambling sequence and the third scrambling sequence, the second short sequence scrambled with the first scrambling sequence and the first short sequence scrambled by the second scrambling sequence and the fourth scrambling sequence to a frequency domain.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: August 13, 2019
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kap Seok Chang, Il Gyu Kim, Hyeong Geun Park, Young Jo Ko, Hyo Seok Yi, Chan Bok Jeong, Young Hoon Kim, Seung Chan Bang