Patents by Inventor Young-Hoon Kim

Young-Hoon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10727824
    Abstract: A strobe generation circuit includes: a main hybrid multiplexing circuit outputting a main pull-up signal and a main pull-down signal to first and second nodes, respectively, the main pull-up and pull-down signals being selectively controlled based on first pull-up and pull-down control signals generated by removing an input loading of main data; a sub hybrid multiplexing circuit outputting a sub pull-up signal and a sub pull-down signal to the first and second nodes, respectively, the sub pull-up and pull-down signals being selectively controlled based on second pull-up and pull-down control signals generated by removing an input loading of sub data; a latch circuit latching a signal of the first node and a signal of the second node to output a first latch signal and a second latch signal; and an output driver outputting a strobe signal according to the first and second latch signals.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: July 28, 2020
    Assignee: SK hynix Inc.
    Inventor: Young-Hoon Kim
  • Publication number: 20200233062
    Abstract: An apparatus for estimating the number of targets including a radar signal receiver configured to receive a radar signal that belongs to a detection signal transmitted by a radar and that is reflected by an object on the ground, and a controller configured to learn the number of targets by processing the received radar signal and to estimate the number of targets by processing a newly received radar signal based on the learned information.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 23, 2020
    Inventor: YOUNG HOON KIM
  • Publication number: 20200224308
    Abstract: A reaction chamber includes a reactor wall, a susceptor contacting the reactor wall to define a reaction space and a gas flow control device and a showerhead member stacked between the reactor wall and the susceptor. The showerhead member includes a gas channel and a showerhead. Penetration holes are formed through a protruding lateral portion of the gas flow control device, and the reactor wall and a lateral portion of the showerhead member are spaced apart from each other to form a gas discharge path. Gas remaining in the gas discharge path is discharged through the penetration holes and a gas outlet formed in an upper portion of the reactor wall. Because of the reaction space and the gas discharge path, unnecessary regions are removed to rapidly change gases from one to another, and thus atomic layer deposition may be performed with high efficiency and productivity.
    Type: Application
    Filed: March 30, 2020
    Publication date: July 16, 2020
    Inventors: Hyun Soo JANG, Dae Youn KIM, Jeong Ho LEE, Young Hoon KIM, Seung Seob LEE, Woo Chan KIM
  • Patent number: 10714335
    Abstract: Provided is a method of depositing a thin film on a pattern structure of a semiconductor substrate, the method including (a) supplying a source gas; (b) supplying a reactive gas; and (c) supplying plasma, wherein the steps (a), (b), and (c) are sequentially repeated on the semiconductor substrate within a reaction space until a desired thickness is obtained, and a frequency of the plasma is a high frequency of 60 MHz or greater.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: July 14, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Young Hoon Kim, Yong Gyu Han, Dae Youn Kim, Tae Hee Yoo, Wan Gyu Lim, Jin Geun Yu
  • Patent number: 10708279
    Abstract: A method and apparatus for transmitting data. Data to be transmitted is an aggregated frame including a first subframe and a second subframe each including information used to verify integrity of each subframe, and an apparatus receiving the data verifies integrity of a subframe based on the information used to verify the integrity.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: July 7, 2020
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Seung Lee, Moon-Sik Lee, Young-Hoon Kim, Jaewoo Park, Gyung-chul Shin, Hoo Sung Lee, Ik Jae Chun, Jeeyon Choi
  • Publication number: 20200190402
    Abstract: Provided are a method for manufacturing a perovskite nanocrystal particle light-emitter where an organic ligand is substituted, a light-emitter manufactured thereby, and a light emitting device using the same. A method for manufacturing an organic-inorganic-hybrid perovskite nanocrystal particle light-emitter where an organic ligand is substituted may comprise the steps of: preparing a solution including an organic-inorganic-hybrid perovskite nanocrystal particle light-emitter, wherein the organic-inorganic-hybrid perovskite nanocrystal particle light-emitter comprises an organic-inorganic-hybrid perovskite nanocrystal structure and a plurality of first organic ligands surrounding the organic-inorganic-hybrid perovskite nanocrystal structure; and adding, to the solution, a second organic ligand which is shorter than the first organic ligands or includes a phenyl group or a fluorine group, thereby substitutes the first organic ligands with the second organic ligand.
    Type: Application
    Filed: February 6, 2020
    Publication date: June 18, 2020
    Inventors: Tae-Woo LEE, Sanghyuk IM, Young-Hoon KIM, Himchan CHO
  • Patent number: 10662525
    Abstract: A reaction chamber includes a reactor wall, a susceptor contacting the reactor wall to define a reaction space and a gas flow control device and a showerhead member stacked between the reactor wall and the susceptor. The showerhead member includes a gas channel and a showerhead. Penetration holes are formed through a protruding lateral portion of the gas flow control device, and the reactor wall and a lateral portion of the showerhead member are spaced apart from each other to form a gas discharge path. Gas remaining in the gas discharge path is discharged through the penetration holes and a gas outlet formed in an upper portion of the reactor wall. The reaction chamber provides a reaction space and the gas discharge path from which unnecessary regions are removed to rapidly change gases from one to another, and thus atomic layer deposition may be performed with high efficiency and productivity.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: May 26, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Hyun Soo Jang, Dae Youn Kim, Jeong Ho Lee, Young Hoon Kim, Seung Seob Lee, Woo Chan Kim
  • Publication number: 20200149022
    Abstract: The present invention relates to an artificially engineered CRISPR/Cas9 system. More particularly, the present invention relates to an artificially engineered CRISPR enzyme having enhanced target specificity and a use of an artificially engineered CRISPR/Cas9 system including the same enzyme in genome and/or epigenome manipulation or modification, genome targeting, genome editing, and in vitro diagnosis, etc.
    Type: Application
    Filed: July 6, 2018
    Publication date: May 14, 2020
    Inventors: Young-Hoon KIM, Min Hee JUNG, Joonsun LEE, Eunji SHIN, Kang In LEE, Seokjoong KIM, Jeongjoon LEE
  • Patent number: 10651826
    Abstract: A semiconductor device includes a plurality of delay cells coupled in series to each other, each including a pull-up transistor and a pull-down transistor coupled in series to each other; a monitoring control block suitable for controlling the delay cells to perform a monitoring operation based on an enable signal; and a coupling block that is arranged between each input terminal of the delay cells and a gate of the pull-up transistor or pull-down transistor, and suitable for adjusting a turn-on level based on the enable signal.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: May 12, 2020
    Assignee: SK hynix Inc.
    Inventor: Young-Hoon Kim
  • Patent number: 10644722
    Abstract: A serializer includes: a data trigger circuit suitable for latching a plurality of input data based on a plurality of clocks having a predetermined phase difference to output a plurality of aligned data and a plurality of complementary aligned data; a hybrid multiplexing circuit suitable for outputting a pull-down signal and a pull-up signal that are selectively controlled based on a pull-down control signal which is generated by removing an input loading of the aligned data and a pull-up control signal which is generated by removing an input loading of the complementary aligned data; and an output driver suitable for outputting serial data corresponding to the pull-up signal and the pull-down signal.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: May 5, 2020
    Assignee: SK hynix Inc.
    Inventor: Young-Hoon Kim
  • Patent number: 10626326
    Abstract: Provided are a method for manufacturing a perovskite particle light-emitter where an organic ligand is substituted, a light-emitter manufactured thereby, and a light emitting device using the same. A method for manufacturing an hybrid perovskite particle light-emitter where an organic ligand is substituted may comprise the steps of: preparing a solution including an hybrid perovskite particle light-emitter, wherein the hybrid perovskite particle light-emitter comprises an halide perovskite nanocrystal structure and a plurality of first organic ligands surrounding the perovskite nanocrystal structure; and adding, to the solution, a second organic ligand which is shorter than the first organic ligands or includes a phenyl group or a fluorine group, thereby substitutes the first organic ligands with the second organic ligand.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: April 21, 2020
    Assignees: POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Tae-Woo Lee, Sanghyuk Im, Young-Hoon Kim, Himchan Cho
  • Patent number: 10622041
    Abstract: A semiconductor device includes: a clock generation circuit suitable for generating first and second write clocks that correspond respectively to a rising clock and a falling clock of an external clock during a write leveling operation, and for generating an input clock based on a delay of a write command by a delay time based on the rising clock during a write operation; a first transmission line suitable for transmitting the first write clock or the input clock as a first transmission clock; and a second transmission line suitable for transmitting the second write clock as a second transmission clock.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: April 14, 2020
    Assignee: SK hynix Inc.
    Inventor: Young-Hoon Kim
  • Patent number: 10615781
    Abstract: A semiconductor apparatus includes a pulse generation circuit which generates a pulse signal in response to a clock, and an amplification circuit which generates an output signal in response to an input signal, the clock, and the pulse signal, wherein the amplification circuit voltage is configured to amplify a voltage level difference between a pair of latch input nodes.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: April 7, 2020
    Assignee: SK hynix Inc.
    Inventor: Young Hoon Kim
  • Patent number: 10557639
    Abstract: Disclosed herein is a dehumidifier which has an improved structure capable of improving a user convenience of a water container. The dehumidifier includes a main body including an inlet port and an outlet port, a heat exchanger which exchanges heat with air introduced through the inlet port and a water container which accommodates condensate and is separately coupled to the main body in a sliding manner. The water container includes a handle rotatably coupled to the water container.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: February 11, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Chul Ahn, Sang Ki Yoon, Ha Young Yoon, Kwon Jin Kim, Nak Hyun Kim, Young Hoon Kim, Kang Ho Choi
  • Publication number: 20200043542
    Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference xvoltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.
    Type: Application
    Filed: October 15, 2019
    Publication date: February 6, 2020
    Applicant: SK hynix Inc.
    Inventors: Sang Kwon LEE, Kwang Soon KIM, Young Hoon KIM, Young Jun YOON, Kyu Dong HWANG
  • Publication number: 20200036827
    Abstract: An artificial intelligence system and method are disclosed herein. The system includes a processor which implements the method, including: receiving by an input unit a first user input including a request to execute a task using at least one of the electronic device or an external device, transmitting by a wireless communication unit first data associated with the first user input to an external server, receiving a first response from the external server including information associated with at least one of the first user input and a sequence of electronic device states for performing at least a portion of the task, receiving a second user input assigning at least one of a voice command and a touch operation received by a touch screen display as the request to perform the task, and transmitting second data associated with the second user input to the external server.
    Type: Application
    Filed: October 1, 2019
    Publication date: January 30, 2020
    Inventors: Il-Hwan CHOI, Sang-Wook KANG, Young-Hoon KIM, Seung-Hoon PARK, Hyun-Ju SEO, Tae-Kwang UM, Jae-Yong LEE, Jin-Ho CHOI, Da-Som LEE, Jae-Yung YEO
  • Publication number: 20200035320
    Abstract: A memory device includes a plurality of memory cell arrays, a plurality of data transmitters corresponding to the plurality of memory cell arrays, respectively, and suitable for transmitting data read in parallel from the corresponding memory cell arrays, and a test circuit suitable for selecting one data transmitter among the plurality of data transmitters, and sequentially outputting data transmitted in parallel from the selected data transmitter to one data input/output pad among a plurality of data input/output pads, during a test mode.
    Type: Application
    Filed: December 28, 2018
    Publication date: January 30, 2020
    Inventors: Young-Hoon KIM, Kwang-Soon Kim, Sang-Kwon Lee
  • Patent number: 10547729
    Abstract: An artificial intelligence system and method are disclosed herein. The system includes a processor which implements the method, including: receiving by an input unit a first user input including a request to execute a task using at least one of the electronic device or an external device, transmitting by a wireless communication unit first data associated with the first user input to an external server, receiving a first response from the external server including information associated with at least one of the first user input and a sequence of electronic device states for performing at least a portion of the task, receiving a second user input assigning at least one of a voice command and a touch operation received by a touch screen display as the request to perform the task, and transmitting second data associated with the second user input to the external server.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: January 28, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-Hwan Choi, Sang-Wook Kang, Young-Hoon Kim, Seung-Hoon Park, Hyun-Ju Seo, Tae-Kwang Um, Jae-Yong Lee, Jin-Ho Choi, Da-Som Lee, Jae-Yung Yeo
  • Publication number: 20200020202
    Abstract: A sports bingo game operation method implemented by at least one data processor provided in a computing device capable of communicating with a client terminal of each user, includes generating, by the data processor, a bingo game of each user including at least N×N (N is a natural number of 3 or greater) tiles related to a sports game performance, determining, by the data processor, whether each of the tiles is daubed and the daubed tiles complete a bingo according to the sports game information according to sports game information, and determining a ranking of each user on the basis of points related to the daubed tiles and points related to the completed bingo.
    Type: Application
    Filed: February 5, 2018
    Publication date: January 16, 2020
    Inventors: Young-Hoon Kim, Yong-Hyuk Chang
  • Patent number: RE47910
    Abstract: The present invention relates to a method for generating a downlink frame including generating a first short sequence and a second short sequence indicating cell group information, generating a first scrambling sequence determined by the first synchronization signal, generating a second scrambling sequence determined by the first short sequence, scrambling the first short sequence with the first scrambling sequence, scrambling the second short sequence with at least the second scrambling sequence, and mapping a second synchronization signal including the scrambled first short sequence and the scrambled second short sequence in the frequency domain.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: March 17, 2020
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kap Seok Chang, Il Gyu Kim, Hyeong Geun Park, Young Jo Ko, Hyo Seok Yi, Moon Sik Lee, Young Hoon Kim, Seung Chan Bang