Abstract: A package substrate of, for example, a BGA type or a CSP type, manufactured by carrying out an electrolytic Au plating process without using any plating lead line for formation of bond fingers and solder ball pads, and a method for manufacturing the package substrate.

Abstract: A package substrate manufactured by electrolytically plating Au in a semi-additive manner without using any plating lead line on wire bonding pads and solder ball pads, and a method for manufacturing the package substrate.

Abstract: The present invention relates to a BGA package having center-bonding type semiconductor chips with edge-bonding metal patterns formed thereon wherein the edge-bonding metal patterns are formed on the semiconductor chips in a wafer level, and wire bonding is carried out in the shape of edge bonding so that a plurality of semiconductor chips are stacked, whereby high-density memory performance is obtained, and a method of manufacturing the same.

Abstract: A package substrate of, for example, a BGA type or a CSP type, manufactured by carrying out an electrolytic Au plating process without using any plating lead line for formation of bond fingers and solder ball pads, and a method for manufacturing the package substrate.

Abstract: A system for and a method of analyzing the surface condition of a PCB using RGB colors are disclosed. The analyzing method includes the steps of feeding a target PCB, to be measured, to an image pick-up position where a pick-up unit is disposed, by a feeding unit, picking up an image of a metal surface of the fed target PCB, extracting pixel data from the picked-up image for the target PCB, performing a mapping operation for RGB signals of the extracted pixel data in accordance with a mapping program, thereby determining relative RGB values, producing cumulative distribution data of the relative RGB values for the target PCB in accordance with an RGB-mapping process, and quantitatively determining the oxidation degree of the target PCB metal surface exhibited with the lapse of time, based on the cumulative distribution data.

Abstract: A package substrate manufactured by electrolytically plating Au in a semi-additive manner without using any plating lead line on wire bonding pads and solder ball pads, and a method for manufacturing the package substrate.

Abstract: A package substrate of, for example, a BGA type or a CSP type, manufactured by carrying out an electrolytic Au plating process without using any plating lead line for formation of bond fingers and solder ball pads, and a method for manufacturing the package substrate.

Abstract: A method for manufacturing a build-up multi-layer printed circuit board is disclosed in which a YAG laser is used upon the formation of a via hole in the multi-layer printed circuit board, such that it can have the following advantages: the manufacturing process would become simple; the component packaging density and freedom for the design of the board would be improved; and a high speed of signal process would be ensured.

Abstract: A method for manufacturing a build-up multi-layer printed circuit board is disclosed which is used in the mother board of a computer, camera-incorporated VTRs, MCMs (multi chip module), CSPs (chip size package) or portable phones. In the build-up multi-layer printed circuit board of the present invention, an inner-layer connecting state is improved. The multi-layer printed circuit board is manufactured by sequentially stacking insulating resin layers and circuit conductor layers based on a build-up method. That is, a first insulating resin layer is necessarily made to undergo an exposure and a development so as to form a first via hole 122. Then a second via hole 124 which is larger than the first via hole 122 is formed on a second insulating resin layer, thereby forming a final V shaped photo via hole 120. Thus build-up multi-layer printed circuit board is manufactured.