Patents by Inventor Young Hwan Son

Young Hwan Son has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12122278
    Abstract: Disclosed is a headrest having a speaker, the headrest including: a headrest frame having a rear surface to which a driving module is coupled so that the headrest frame is movable forwards, rearwards, or vertically in response to operation of the driving module, the headrest frame having a front surface formed with a mounting space recessed rearwards; a speaker, inserted into the mounting space in the headrest frame, provided with an output portion facing forwards and outputting sound, the speaker having a rear side closed by the headrest frame; a foam pad, mounted on the front surface of the headrest frame so as to cover the headrest frame and the speaker, having formed therein a first through hole outputting sound forwards at a position corresponding to the output portion; and a covering configured to cover the front surface of the foam pad and forming the front exterior of the headrest.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: October 22, 2024
    Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATION, HYUNDAI TRANSYS INC.
    Inventors: Byeong Seon Son, Tae Hoon Lee, Young Sun Choi, Ji Hwan Kim, Seon Chae Na, Sang Ho Kim, Sang Hoon Park, Jae Ho Song, Won Kee Kim
  • Publication number: 20240317730
    Abstract: The present disclosure relates to a heteroaryl derivative and uses thereof. The heteroaryl derivative of the present disclosure exhibits excellent inhibitory activity against EGFR and/or HER2, and thus may be usefully employed as a therapeutic agent for EGFR- and/or HER2-related diseases.
    Type: Application
    Filed: June 1, 2024
    Publication date: September 26, 2024
    Applicant: Voronoi Inc.
    Inventors: Youn Ho Lee, Seon Ah Hwang, In Seob Shim, Hyeon Ho Jeon, Woo Mi Do, Hee Sun Ryu, Jung Beom Son, Nam Doo Kim, Sung Hwan Kim, Hong Ryul Jung, Young Yi Lee
  • Patent number: 12085447
    Abstract: A spectroscopy system that includes a light source that generates light having a plurality of wavelengths, a light transmitter that transmits the light to a target analyte, a light receiver that receives Raman-scattered light scattered from the target analyte, and a multi-wavelength spectroscopy assembly that acquires a spectrum by splitting the Raman-scattered light transmitted from the light receiver. The multi-wavelength spectroscopy assembly includes a single diffraction grating configured to diffract the Raman-scattered light and a single concave mirror configured to focus the Raman-scattered light.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: September 10, 2024
    Assignee: AGENCY FOR DEFENSE DEVELOPMENT
    Inventors: Jae Hwan Lee, Young Soo Chung, Hyung Bin Son, Se Kyu Shim, Jung Taek Hong
  • Patent number: 12076466
    Abstract: An air purifier includes a case having an air inlet and an air outlet, a fan disposed adjacent the air inlet, a UV LED unit and a filter unit arranged over the fan along a flow path of air, and a fluid control structure disposed between the fan and the filter unit.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: September 3, 2024
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jae Seon Yi, Young Hwan Son, Seong Min Lee, Jong Rack Kim, Ik Hwan Ko
  • Publication number: 20240274365
    Abstract: A multilayer ceramic capacitor includes a body having a capacitance formation region with a plurality of first and second internal electrodes alternately stacked with one of a plurality of dielectric layers interposed therebetween in a first direction, and first and second external electrodes disposed on the body, spaced apart from each other in a second direction, different from the first direction, with the capacitance formation region therebetween, and connected to the plurality of first and second internal electrodes, respectively. The body further includes a plurality of side margin portions disposed to have the capacitance formation region therebetween in a third direction, different from the first and second directions, the plurality of dielectric layers protrude more toward the plurality of side margin portions than the plurality of first and second internal electrodes, and portions of the plurality of respective side margin portions are located between the plurality of dielectric layers.
    Type: Application
    Filed: November 28, 2023
    Publication date: August 15, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Soo Hwan SON, Young Ghyu AHN, Hwi Dae KIM
  • Publication number: 20240266116
    Abstract: A composite electronic component according to an example embodiment includes: a multilayer ceramic capacitor including a body including dielectric layers, first and second internal electrodes, and first and second external electrodes, first and second interposer connected to the first and second external electrodes, respectively. The first and second interposer respectively include first and second connection units, first and second mounting units, first and second connection vias penetrating through the first and second connection unit, respectively, and first and second mounting vias penetrating through the first and second mounting units, respectively. The first connection via and the first mounting via are disposed so as not to overlap each other based on the first direction, and the second connection via and the second mounting via are disposed so as not to overlap each other based on the first direction.
    Type: Application
    Filed: November 27, 2023
    Publication date: August 8, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jeong Pil JHUN, Soo Hwan SON, Young Ghyu AHN
  • Patent number: 12037330
    Abstract: The present disclosure relates to a heteroaryl derivative and uses thereof. The heteroaryl derivative of the present disclosure exhibits excellent inhibitory activity against EGFR and/or HER2, and thus may be usefully employed as a therapeutic agent for EGFR- and/or HER2-related diseases.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: July 16, 2024
    Assignee: Voronoi Inc.
    Inventors: Youn Ho Lee, Seon Ah Hwang, In Seob Shim, Hyeon Ho Jeon, Woo Mi Do, Hee Sun Ryu, Jung Beom Son, Nam Doo Kim, Sung Hwan Kim, Hong Ryul Jung, Young Yi Lee
  • Patent number: 12040137
    Abstract: A multilayer capacitor includes: a body including internal electrodes stacked in a first direction; and first and second external electrodes disposed on the body. A portion of the first external electrode overlaps the body in the first direction and does not overlap a remainder of the first external electrode in the first direction. A portion of the second external electrode overlaps the body in the first direction and does not overlap a remainder of the second external electrode in the first direction. At least one of the external electrodes includes: a second electrode layer covering a first electrode layer, which covers one portion of an edge of the body. A width W1 of a portion of the first electrode layer, closest to the one portion of the edge, is narrower than a width W2 of an end of the second electrode layer, farthest from the first electrode layer.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: July 16, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Ghyu Ahn, Soo Hwan Son, Hwi Dae Kim
  • Publication number: 20240224525
    Abstract: A semiconductor memory includes metallic lines on a substrate and including an uppermost metallic line, a semiconductor conduction line on the uppermost metallic line, a vertical structure penetrating the semiconductor conduction line and metallic lines, and including a vertical structure that includes an upper channel film, a first lower channel film, and an upper connection channel film connecting the upper channel film and the first lower channel film between a bottom of the semiconductor conduction line and a bottom of the uppermost metallic line, and a first cutting line through the metallic lines and the semiconductor conduction line, and including a first upper cutting line through the semiconductor conduction line, and a first lower cutting line through the plurality of metallic lines, a width of the first upper cutting line being greater than a width of an extension line of a sidewall of the first lower cutting line.
    Type: Application
    Filed: March 18, 2024
    Publication date: July 4, 2024
    Inventors: Hyo Joon Ryu, Young Hwan Son, Seo-Goo Kang, Jung Hoon Jun, Kohji Kanamori, Jee Hoon Han
  • Patent number: 12005149
    Abstract: A sterilizer is provided to include: a first pipe having an inner wall with a light reflecting property; a second pipe disposed in the first pipe so as to pass fluid therethrough and formed of a light transmitting material; and a plurality of UV LEDs arranged on the inner wall of the first pipe and configured to irradiate sterilization UV light onto the fluid.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: June 11, 2024
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Seong Min Lee, Young Hwan Son, Jae Seon Yi, Jong Rack Kim, Ik Hwan Ko
  • Patent number: 11963358
    Abstract: A semiconductor memory includes metallic lines on a substrate and including an uppermost metallic line, a semiconductor conduction line on the uppermost metallic line, a vertical structure penetrating the semiconductor conduction line and metallic lines, and including a vertical structure that includes an upper channel film, a first lower channel film, and an upper connection channel film connecting the upper channel film and the first lower channel film between a bottom of the semiconductor conduction line and a bottom of the uppermost metallic line, and a first cutting line through the metallic lines and the semiconductor conduction line, and including a first upper cutting line through the semiconductor conduction line, and a first lower cutting line through the plurality of metallic lines, a width of the first upper cutting line being greater than a width of an extension line of a sidewall of the first lower cutting line.
    Type: Grant
    Filed: February 1, 2023
    Date of Patent: April 16, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo Joon Ryu, Young Hwan Son, Seo-Goo Kang, Jung Hoon Jun, Kohji Kanamori, Jee Hoon Han
  • Patent number: 11864384
    Abstract: A nonvolatile memory device includes a mold structure having a stack of word lines on a substrate and first and second string selection lines on the word lines, a first cutting structure through the mold structure, a second cutting structure through the mold structure, the second cutting structure being spaced apart from the first cutting structure, a channel structure penetrating the mold structure to be connected to the substrate, the channel structure being between the first and second cutting structures, a first cutting line cutting through the first string selection line but not through the second string selection line, the first cutting line being between the first and second cutting structures, and a second cutting line cutting through the second string selection line but not through the first string selection line, the second cutting line being between the second cutting structure and the channel structure.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: January 2, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je Suk Moon, Seo-Goo Kang, Young Hwan Son, Kohji Kanamori, Jee Hoon Han
  • Publication number: 20230292515
    Abstract: A vertical memory device includes gate electrodes on a substrate, a channel extending through the gate electrodes, and a contact plug extending through the gate electrodes. The gate electrodes are stacked in a first direction substantially vertical to an upper surface of the substrate and arranged to have a staircase shape including steps of which extension lengths in a second direction substantially parallel to the upper surface gradually increase from a lowermost level toward an uppermost level. A pad at an end portion of each of the gate electrodes in the second direction has a thickness greater than those of other portions thereof. The channel extends in the first direction. The contact plug extends in the first direction. The channel contacts the pad of a first gate electrode among the gate electrodes to be electrically connected thereto, and is electrically insulated from second gate electrodes among the gate electrodes.
    Type: Application
    Filed: May 22, 2023
    Publication date: September 14, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young-Hwan SON, Kohji KANAMORI, Shin-Hwan KANG, Young Jin KWON
  • Publication number: 20230248865
    Abstract: A sterilizer is provided to include: a first pipe having an inner wall with a light reflecting property; a second pipe disposed in the first pipe so as to pass fluid therethrough and formed of a light transmitting material; and a plurality of UV LEDs arranged on the inner wall of the first pipe and configured to irradiate sterilization UV light onto the fluid.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 10, 2023
    Inventors: Seong Min LEE, Young Hwan SON, Jae Seon YI, Jong Rack KIM, Ik Hwan KO
  • Patent number: 11696442
    Abstract: A vertical memory device includes gate electrodes on a substrate, a channel extending through the gate electrodes, and a contact plug extending through the gate electrodes. The gate electrodes are stacked in a first direction substantially vertical to an upper surface of the substrate and arranged to have a staircase shape including steps of which extension lengths in a second direction substantially parallel to the upper surface gradually increase from a lowermost level toward an uppermost level. A pad at an end portion of each of the gate electrodes in the second direction has a thickness greater than those of other portions thereof. The channel extends in the first direction. The contact plug extends in the first direction. The channel contacts the pad of a first gate electrode among the gate electrodes to be electrically connected thereto, and is electrically insulated from second gate electrodes among the gate electrodes.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: July 4, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Hwan Son, Kohji Kanamori, Shin-Hwan Kang, Young Jin Kwon
  • Publication number: 20230189525
    Abstract: A semiconductor memory includes metallic lines on a substrate and including an uppermost metallic line, a semiconductor conduction line on the uppermost metallic line, a vertical structure penetrating the semiconductor conduction line and metallic lines, and including a vertical structure that includes an upper channel film, a first lower channel film, and an upper connection channel film connecting the upper channel film and the first lower channel film between a bottom of the semiconductor conduction line and a bottom of the uppermost metallic line, and a first cutting line through the metallic lines and the semiconductor conduction line, and including a first upper cutting line through the semiconductor conduction line, and a first lower cutting line through the plurality of metallic lines, a width of the first upper cutting line being greater than a width of an extension line of a sidewall of the first lower cutting line.
    Type: Application
    Filed: February 1, 2023
    Publication date: June 15, 2023
    Inventors: Hyo Joon RYU, Young Hwan SON, Seo-Goo KANG, Jung Hoon JUN, Kohji KANAMORI, Jee Hoon HAN
  • Patent number: 11628232
    Abstract: A sterilizer may include: a first pipe having an inner wall with a light reflecting property; a second pipe disposed in the first pipe so as to pass fluid therethrough and formed of a light transmitting material; and a plurality of UV LEDs arranged on the inner wall of the first pipe and configured to irradiate sterilization UV light onto the fluid.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: April 18, 2023
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Seong Min Lee, Young Hwan Son, Jae Seon Yi, Jong Rack Kim, Ik Hwan Ko
  • Patent number: 11581331
    Abstract: A semiconductor memory includes metallic lines on a substrate and including an uppermost metallic line, a semiconductor conduction line on the uppermost metallic line, a vertical structure penetrating the semiconductor conduction line and metallic lines, and including a vertical structure that includes an upper channel film, a first lower channel film, and an upper connection channel film connecting the upper channel film and the first lower channel film between a bottom of the semiconductor conduction line and a bottom of the uppermost metallic line, and a first cutting line through the metallic lines and the semiconductor conduction line, and including a first upper cutting line through the semiconductor conduction line, and a first lower cutting line through the plurality of metallic lines, a width of the first upper cutting line being greater than a width of an extension line of a sidewall of the first lower cutting line.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: February 14, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyo Joon Ryu, Young Hwan Son, Seo-Goo Kang, Jung Hoon Jun, Kohji Kanamori, Jee Hoon Han
  • Publication number: 20220139957
    Abstract: A nonvolatile memory device includes a mold structure having a stack of word lines on a substrate and first and second string selection lines on the word lines, a first cutting structure through the mold structure, a second cutting structure through the mold structure, the second cutting structure being spaced apart from the first cutting structure, a channel structure penetrating the mold structure to be connected to the substrate, the channel structure being between the first and second cutting structures, a first cutting line cutting through the first string selection line but not through the second string selection line, the first cutting line being between the first and second cutting structures, and a second cutting line cutting through the second string selection line but not through the first string selection line, the second cutting line being between the second cutting structure and the channel structure.
    Type: Application
    Filed: January 20, 2022
    Publication date: May 5, 2022
    Inventors: Je Suk MOON, Seo-Goo KANG, Young Hwan SON, Kohji KANAMORI, Jee Hoon HAN
  • Patent number: 11296110
    Abstract: A nonvolatile memory device includes a mold structure including a plurality of insulating patterns and a plurality of gate electrodes alternately stacked on a substrate, a semiconductor pattern penetrating through the mold structure and contacting the substrate, a first charge storage film, and a second charge storage film separated from the first charge storage film. The first and second charge storage films are disposed between each of the gate electrodes and the semiconductor pattern. Each of the gate electrodes includes a first recess and a second recess which are respectively recessed inward from a side surface of the gate electrodes. The first charge storage film fills at least a portion of the first recess, and the second charge storage film fills at least a portion of the second recess.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: April 5, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwang Young Jung, Jong Won Kim, Young Hwan Son, Jee Hoon Han