Patents by Inventor Young Hwan Son
Young Hwan Son has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11233065Abstract: A nonvolatile memory device includes a mold structure having a stack of word lines on a substrate and first and second string selection lines on the word lines, a first cutting structure through the mold structure, a second cutting structure through the mold structure, the second cutting structure being spaced apart from the first cutting structure, a channel structure penetrating the mold structure to be connected to the substrate, the channel structure being between the first and second cutting structures, a first cutting line cutting through the first string selection line but not through the second string selection line, the first cutting line being between the first and second cutting structures, and a second cutting line cutting through the second string selection line but not through the first string selection line, the second cutting line being between the second cutting structure and the channel structure.Type: GrantFiled: December 18, 2019Date of Patent: January 25, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Je Suk Moon, Seo-Goo Kang, Young Hwan Son, Kohji Kanamori, Jee Hoon Han
-
Publication number: 20210361802Abstract: A sterilizer may include: a first pipe having an inner wall with a light reflecting property; a second pipe disposed in the first pipe so as to pass fluid therethrough and formed of a light transmitting material; and a plurality of UV LEDs arranged on the inner wall of the first pipe and configured to irradiate sterilization UV light onto the fluid.Type: ApplicationFiled: August 9, 2021Publication date: November 25, 2021Inventors: Seong Min LEE, Young Hwan SON, Jae Seon YI, Jong Rack KIM, Ik Hwan KO
-
Publication number: 20210313344Abstract: A semiconductor memory includes metallic lines on a substrate and including an uppermost metallic line, a semiconductor conduction line on the uppermost metallic line, a vertical structure penetrating the semiconductor conduction line and metallic lines, and including a vertical structure that includes an upper channel film, a first lower channel film, and an upper connection channel film connecting the upper channel film and the first lower channel film between a bottom of the semiconductor conduction line and a bottom of the uppermost metallic line, and a first cutting line through the metallic lines and the semiconductor conduction line, and including a first upper cutting line through the semiconductor conduction line, and a first lower cutting line through the plurality of metallic lines, a width of the first upper cutting line being greater than a width of an extension line of a sidewall of the first lower cutting line.Type: ApplicationFiled: November 23, 2020Publication date: October 7, 2021Inventors: Hyo Joon RYU, Young Hwan SON, Seo-Goo KANG, Jung Hoon JUN, Kohji KANAMORI, Jee Hoon HAN
-
Patent number: 11083809Abstract: A sterilizer may include: a first pipe having an inner wall with a light reflecting property; a second pipe disposed in the first pipe so as to pass fluid therethrough and formed of a light transmitting material; and a plurality of UV LEDs arranged on the inner wall of the first pipe and configured to irradiate sterilization UV light onto the fluid.Type: GrantFiled: January 6, 2020Date of Patent: August 10, 2021Assignee: SEOUL VIOSYS CO., LTD.Inventors: Seong Min Lee, Young Hwan Son, Jae Seon Yi, Jong Rack Kim, Ik Hwan Ko
-
Patent number: 11031411Abstract: A vertical non-volatile memory device includes a lower insulating layer on a substrate, a multilayer structure including gate electrodes and interlayer insulating layers alternately stacked on the lower insulating layer, a gate dielectric layer and a channel structure, and has an opening extending through the multilayer structure and exposing the lower insulating layer. The opening includes a first open portion extending through at least one layer of the multilayer structure at a first width, and a second open portion extending through the multilayer structure at a second width less than the first width. The gate dielectric layer lines the opening, and the channel structure is disposed on the gate dielectric layer and is electrically connected to the substrate.Type: GrantFiled: July 8, 2019Date of Patent: June 8, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Hwan Son, Jae-Hoon Jang, Jee-Hoon Han
-
Patent number: 10978464Abstract: A vertical non-volatile memory device includes a lower insulating layer on a substrate, a multilayer structure including gate electrodes and interlayer insulating layers alternately stacked on the lower insulating layer, a gate dielectric layer and a channel structure, and has an opening extending through the multilayer structure and exposing the lower insulating layer. The opening includes a first open portion extending through at least one layer of the multilayer structure at a first width, and a second open portion extending through the multilayer structure at a second width less than the first width. The gate dielectric layer lines the opening, and the channel structure is disposed on the gate dielectric layer and is electrically connected to the substrate.Type: GrantFiled: May 14, 2020Date of Patent: April 13, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Hwan Son, Jae-Hoon Jang, Jee-Hoon Han
-
Patent number: 10928083Abstract: An air conditioner including a body having an evaporator for heat-exchanging air flowing in the body, and an air purifying module coupled to the body. The air purifying module may have a light emitting diode part disposed along a flow path of the air to provide ultraviolet rays, and a filter part disposed adjacent to the light emitting diode part.Type: GrantFiled: October 3, 2016Date of Patent: February 23, 2021Assignee: SEOUL VIOSYS CO., LTD.Inventors: Jung Yeol Park, Young Hwan Son, Seong Min Lee, Jae Seon Yi, Jong Hyun Koo, Sang Hee Cho, Ju Won Yoo, Sung Lim Cho, Jong Rack Kim
-
Patent number: 10886289Abstract: In one embodiment, the semiconductor device includes a stack of alternating interlayer insulating layers and conductive layers on a substrate. Each of the conductive layers extends in a first direction less than a previous one of the conductive layers to define a landing portion of the previous one of the conductive layers. An insulating plug is in one of the conductive layers under one of the landing portions, and a contact plug extends from an upper surface of the one of the landing portions.Type: GrantFiled: April 5, 2018Date of Patent: January 5, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Shin-hwan Kang, Young-hwan Son, Dong-seog Eun, Chang-sup Lee, Jae-hoon Jang
-
Publication number: 20200411546Abstract: A vertical memory device includes gate electrodes on a substrate, a channel extending through the gate electrodes, and a contact plug extending through the gate electrodes. The gate electrodes are stacked in a first direction substantially vertical to an upper surface of the substrate and arranged to have a staircase shape including steps of which extension lengths in a second direction substantially parallel to the upper surface gradually increase from a lowermost level toward an uppermost level. A pad at an end portion of each of the gate electrodes in the second direction has a thickness greater than those of other portions thereof. The channel extends in the first direction. The contact plug extends in the first direction. The channel contacts the pad of a first gate electrode among the gate electrodes to be electrically connected thereto, and is electrically insulated from second gate electrodes among the gate electrodes.Type: ApplicationFiled: August 12, 2020Publication date: December 31, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Young-Hwan SON, Kohji KANAMORI, Shin-Hwan KANG, Young Jin KWON
-
Publication number: 20200388633Abstract: A nonvolatile memory device includes a mold structure including a plurality of insulating patterns and a plurality of gate electrodes alternately stacked on a substrate, a semiconductor pattern penetrating through the mold structure and contacting the substrate, a first charge storage film, and a second charge storage film separated from the first charge storage film. The first and second charge storage films are disposed between each of the gate electrodes and the semiconductor pattern. Each of the gate electrodes includes a first recess and a second recess which are respectively recessed inward from a side surface of the gate electrodes. The first charge storage film fills at least a portion of the first recess, and the second charge storage film fills at least a portion of the second recess.Type: ApplicationFiled: February 21, 2020Publication date: December 10, 2020Inventors: Kwang Young JUNG, Jong Won KIM, Young Hwan SON, Jee Hoon HAN
-
Publication number: 20200381449Abstract: A nonvolatile memory device includes a mold structure having a stack of word lines on a substrate and first and second string selection lines on the word lines, a first cutting structure through the mold structure, a second cutting structure through the mold structure, the second cutting structure being spaced apart from the first cutting structure, a channel structure penetrating the mold structure to be connected to the substrate, the channel structure being between the first and second cutting structures, a first cutting line cutting through the first string selection line but not through the second string selection line, the first cutting line being between the first and second cutting structures, and a second cutting line cutting through the second string selection line but not through the first string selection line, the second cutting line being between the second cutting structure and the channel structure.Type: ApplicationFiled: December 18, 2019Publication date: December 3, 2020Inventors: Je Suk MOON, Seo-Goo KANG, Young Hwan SON, Kohji KANAMORI, Jee Hoon HAN
-
Patent number: 10854632Abstract: A vertical memory device includes first, second and third impurity regions sequentially stacked in a first direction substantially perpendicular to an upper surface of a substrate, a gate electrode structure including gate electrodes spaced apart from each other in the first direction on the third impurity region, a channel extending through the gate electrode structure, the second and third impurity regions, and an upper portion of the first impurity region on the substrate in the first direction, and a charge storage structure covering a portion of an outer sidewall and a lower surface of the channel. The channel directly contacts a sidewall of the second impurity region.Type: GrantFiled: December 30, 2019Date of Patent: December 1, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Kohji Kanamori, Young-Hwan Son, Byung-Kwan You, Eun-Taek Jung
-
Patent number: 10847537Abstract: A three-dimensional semiconductor memory device includes: gate electrodes and mold insulation layers alternately stacked on a substrate; a channel layer passing through the gate electrodes and the mold insulation layers; and a gate dielectric layer between the gate electrodes and the channel layer. The gate dielectric layer and the channel layer may be in an upper portion of the substrate and may be bent at a first angle and extend under the mold insulation layers in the upper portion of the substrate.Type: GrantFiled: January 30, 2019Date of Patent: November 24, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Young Hwan Son, Seo Goo Kang, Shin Hwan Kang
-
Publication number: 20200273870Abstract: A vertical non-volatile memory device includes a lower insulating layer on a substrate, a multilayer structure including gate electrodes and interlayer insulating layers alternately stacked on the lower insulating layer, a gate dielectric layer and a channel structure, and has an opening extending through the multilayer structure and exposing the lower insulating layer. The opening includes a first open portion extending through at least one layer of the multilayer structure at a first width, and a second open portion extending through the multilayer structure at a second width less than the first width. The gate dielectric layer lines the opening, and the channel structure is disposed on the gate dielectric layer and is electrically connected to the substrate.Type: ApplicationFiled: May 14, 2020Publication date: August 27, 2020Inventors: Young-Hwan Son, Jae-Hoon Jang, Jee-Hoon Han
-
Patent number: 10748923Abstract: A vertical memory device includes gate electrodes on a substrate, a channel extending through the gate electrodes, and a contact plug extending through the gate electrodes. The gate electrodes are stacked in a first direction substantially vertical to an upper surface of the substrate and arranged to have a staircase shape including steps of which extension lengths in a second direction substantially parallel to the upper surface gradually increase from a lowermost level toward an uppermost level. A pad at an end portion of each of the gate electrodes in the second direction has a thickness greater than those of other portions thereof. The channel extends in the first direction. The contact plug extends in the first direction. The channel contacts the pad of a first gate electrode among the gate electrodes to be electrically connected thereto, and is electrically insulated from second gate electrodes among the gate electrodes.Type: GrantFiled: December 4, 2018Date of Patent: August 18, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Hwan Son, Kohji Kanamori, Shin-Hwan Kang, Young Jin Kwon
-
Patent number: 10676375Abstract: The present invention relates to a portable water purification system by means of UV LEDs. Provided according to the present invention is a portable water purification system by means of UV LEDs comprising: a support member; a plurality of LEDs mounted on the surface of the support member; a solid filter provided with a through-path into which the support member is inserted; and a cover, attached to one end of the solid filter, for sealing the through-path of the solid filter.Type: GrantFiled: March 21, 2013Date of Patent: June 9, 2020Assignee: SEOUL VIOSYS CO., LTD.Inventors: Seong Min Lee, Chung Hoon Lee, Daewoong Suh, Young Hwan Son
-
Publication number: 20200144288Abstract: A vertical memory device includes first, second and third impurity regions sequentially stacked in a first direction substantially perpendicular to an upper surface of a substrate, a gate electrode structure including gate electrodes spaced apart from each other in the first direction on the third impurity region, a channel extending through the gate electrode structure, the second and third impurity regions, and an upper portion of the first impurity region on the substrate in the first direction, and a charge storage structure covering a portion of an outer sidewall and a lower surface of the channel. The channel directly contacts a sidewall of the second impurity region.Type: ApplicationFiled: December 30, 2019Publication date: May 7, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Kohji Kanamori, Young-Hwan Son, Byung-Kwan You, Eun-Taek Jung
-
Publication number: 20200138991Abstract: A sterilizer may include: a first pipe having an inner wall with a light reflecting property; a second pipe disposed in the first pipe so as to pass fluid therethrough and formed of a light transmitting material; and a plurality of UV LEDs arranged on the inner wall of the first pipe and configured to irradiate sterilization UV light onto the fluid.Type: ApplicationFiled: January 6, 2020Publication date: May 7, 2020Inventors: Seong Min LEE, Young Hwan SON, Jae Seon YI, Jong Rack KIM, Ik Hwan KO
-
Patent number: 10632216Abstract: The multifunction LED lighting apparatus of the present invention includes at least one lighting LED, at least one ultraviolet (UV) LED, a substrate configured to have the at least one lighting LED and the at least one UV LED mounted thereon, and a cover disposed to face the substrate at a specific interval and configured to cover the lighting LED and the UV LED. The at least one lighting LED and the at least one UV LED are integrally mounted on the substrate and configured to form a single module of a thin sheet form, and the cover is installed to cover and support the single module placed on the inside wall of an application.Type: GrantFiled: April 1, 2019Date of Patent: April 28, 2020Assignee: SEOUL VIOSYS CO., LTD.Inventors: Jung Youl Park, Jong Rack Kim, Young Hwan Son, Seong Min Lee, Jae Seon Yi
-
Patent number: 10559591Abstract: A vertical memory device includes first, second and third impurity regions sequentially stacked in a first direction substantially perpendicular to an upper surface of a substrate, a gate electrode structure including gate electrodes spaced apart from each other in the first direction on the third impurity region, a channel extending through the gate electrode structure, the second and third impurity regions, and an upper portion of the first impurity region on the substrate in the first direction, and a charge storage structure covering a portion of an outer sidewall and a lower surface of the channel. The channel directly contacts a sidewall of the second impurity region.Type: GrantFiled: August 31, 2018Date of Patent: February 11, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Kohji Kanamori, Young-Hwan Son, Byung-Kwan You, Eun-Taek Jung