Patents by Inventor Young Hwan Son

Young Hwan Son has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10886289
    Abstract: In one embodiment, the semiconductor device includes a stack of alternating interlayer insulating layers and conductive layers on a substrate. Each of the conductive layers extends in a first direction less than a previous one of the conductive layers to define a landing portion of the previous one of the conductive layers. An insulating plug is in one of the conductive layers under one of the landing portions, and a contact plug extends from an upper surface of the one of the landing portions.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: January 5, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shin-hwan Kang, Young-hwan Son, Dong-seog Eun, Chang-sup Lee, Jae-hoon Jang
  • Publication number: 20200411546
    Abstract: A vertical memory device includes gate electrodes on a substrate, a channel extending through the gate electrodes, and a contact plug extending through the gate electrodes. The gate electrodes are stacked in a first direction substantially vertical to an upper surface of the substrate and arranged to have a staircase shape including steps of which extension lengths in a second direction substantially parallel to the upper surface gradually increase from a lowermost level toward an uppermost level. A pad at an end portion of each of the gate electrodes in the second direction has a thickness greater than those of other portions thereof. The channel extends in the first direction. The contact plug extends in the first direction. The channel contacts the pad of a first gate electrode among the gate electrodes to be electrically connected thereto, and is electrically insulated from second gate electrodes among the gate electrodes.
    Type: Application
    Filed: August 12, 2020
    Publication date: December 31, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young-Hwan SON, Kohji KANAMORI, Shin-Hwan KANG, Young Jin KWON
  • Publication number: 20200388633
    Abstract: A nonvolatile memory device includes a mold structure including a plurality of insulating patterns and a plurality of gate electrodes alternately stacked on a substrate, a semiconductor pattern penetrating through the mold structure and contacting the substrate, a first charge storage film, and a second charge storage film separated from the first charge storage film. The first and second charge storage films are disposed between each of the gate electrodes and the semiconductor pattern. Each of the gate electrodes includes a first recess and a second recess which are respectively recessed inward from a side surface of the gate electrodes. The first charge storage film fills at least a portion of the first recess, and the second charge storage film fills at least a portion of the second recess.
    Type: Application
    Filed: February 21, 2020
    Publication date: December 10, 2020
    Inventors: Kwang Young JUNG, Jong Won KIM, Young Hwan SON, Jee Hoon HAN
  • Publication number: 20200381449
    Abstract: A nonvolatile memory device includes a mold structure having a stack of word lines on a substrate and first and second string selection lines on the word lines, a first cutting structure through the mold structure, a second cutting structure through the mold structure, the second cutting structure being spaced apart from the first cutting structure, a channel structure penetrating the mold structure to be connected to the substrate, the channel structure being between the first and second cutting structures, a first cutting line cutting through the first string selection line but not through the second string selection line, the first cutting line being between the first and second cutting structures, and a second cutting line cutting through the second string selection line but not through the first string selection line, the second cutting line being between the second cutting structure and the channel structure.
    Type: Application
    Filed: December 18, 2019
    Publication date: December 3, 2020
    Inventors: Je Suk MOON, Seo-Goo KANG, Young Hwan SON, Kohji KANAMORI, Jee Hoon HAN
  • Patent number: 10854632
    Abstract: A vertical memory device includes first, second and third impurity regions sequentially stacked in a first direction substantially perpendicular to an upper surface of a substrate, a gate electrode structure including gate electrodes spaced apart from each other in the first direction on the third impurity region, a channel extending through the gate electrode structure, the second and third impurity regions, and an upper portion of the first impurity region on the substrate in the first direction, and a charge storage structure covering a portion of an outer sidewall and a lower surface of the channel. The channel directly contacts a sidewall of the second impurity region.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: December 1, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kohji Kanamori, Young-Hwan Son, Byung-Kwan You, Eun-Taek Jung
  • Patent number: 10847537
    Abstract: A three-dimensional semiconductor memory device includes: gate electrodes and mold insulation layers alternately stacked on a substrate; a channel layer passing through the gate electrodes and the mold insulation layers; and a gate dielectric layer between the gate electrodes and the channel layer. The gate dielectric layer and the channel layer may be in an upper portion of the substrate and may be bent at a first angle and extend under the mold insulation layers in the upper portion of the substrate.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: November 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Hwan Son, Seo Goo Kang, Shin Hwan Kang
  • Publication number: 20200273870
    Abstract: A vertical non-volatile memory device includes a lower insulating layer on a substrate, a multilayer structure including gate electrodes and interlayer insulating layers alternately stacked on the lower insulating layer, a gate dielectric layer and a channel structure, and has an opening extending through the multilayer structure and exposing the lower insulating layer. The opening includes a first open portion extending through at least one layer of the multilayer structure at a first width, and a second open portion extending through the multilayer structure at a second width less than the first width. The gate dielectric layer lines the opening, and the channel structure is disposed on the gate dielectric layer and is electrically connected to the substrate.
    Type: Application
    Filed: May 14, 2020
    Publication date: August 27, 2020
    Inventors: Young-Hwan Son, Jae-Hoon Jang, Jee-Hoon Han
  • Patent number: 10748923
    Abstract: A vertical memory device includes gate electrodes on a substrate, a channel extending through the gate electrodes, and a contact plug extending through the gate electrodes. The gate electrodes are stacked in a first direction substantially vertical to an upper surface of the substrate and arranged to have a staircase shape including steps of which extension lengths in a second direction substantially parallel to the upper surface gradually increase from a lowermost level toward an uppermost level. A pad at an end portion of each of the gate electrodes in the second direction has a thickness greater than those of other portions thereof. The channel extends in the first direction. The contact plug extends in the first direction. The channel contacts the pad of a first gate electrode among the gate electrodes to be electrically connected thereto, and is electrically insulated from second gate electrodes among the gate electrodes.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: August 18, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Hwan Son, Kohji Kanamori, Shin-Hwan Kang, Young Jin Kwon
  • Patent number: 10676375
    Abstract: The present invention relates to a portable water purification system by means of UV LEDs. Provided according to the present invention is a portable water purification system by means of UV LEDs comprising: a support member; a plurality of LEDs mounted on the surface of the support member; a solid filter provided with a through-path into which the support member is inserted; and a cover, attached to one end of the solid filter, for sealing the through-path of the solid filter.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: June 9, 2020
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Seong Min Lee, Chung Hoon Lee, Daewoong Suh, Young Hwan Son
  • Publication number: 20200138991
    Abstract: A sterilizer may include: a first pipe having an inner wall with a light reflecting property; a second pipe disposed in the first pipe so as to pass fluid therethrough and formed of a light transmitting material; and a plurality of UV LEDs arranged on the inner wall of the first pipe and configured to irradiate sterilization UV light onto the fluid.
    Type: Application
    Filed: January 6, 2020
    Publication date: May 7, 2020
    Inventors: Seong Min LEE, Young Hwan SON, Jae Seon YI, Jong Rack KIM, Ik Hwan KO
  • Publication number: 20200144288
    Abstract: A vertical memory device includes first, second and third impurity regions sequentially stacked in a first direction substantially perpendicular to an upper surface of a substrate, a gate electrode structure including gate electrodes spaced apart from each other in the first direction on the third impurity region, a channel extending through the gate electrode structure, the second and third impurity regions, and an upper portion of the first impurity region on the substrate in the first direction, and a charge storage structure covering a portion of an outer sidewall and a lower surface of the channel. The channel directly contacts a sidewall of the second impurity region.
    Type: Application
    Filed: December 30, 2019
    Publication date: May 7, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kohji Kanamori, Young-Hwan Son, Byung-Kwan You, Eun-Taek Jung
  • Patent number: 10632216
    Abstract: The multifunction LED lighting apparatus of the present invention includes at least one lighting LED, at least one ultraviolet (UV) LED, a substrate configured to have the at least one lighting LED and the at least one UV LED mounted thereon, and a cover disposed to face the substrate at a specific interval and configured to cover the lighting LED and the UV LED. The at least one lighting LED and the at least one UV LED are integrally mounted on the substrate and configured to form a single module of a thin sheet form, and the cover is installed to cover and support the single module placed on the inside wall of an application.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: April 28, 2020
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jung Youl Park, Jong Rack Kim, Young Hwan Son, Seong Min Lee, Jae Seon Yi
  • Patent number: 10559591
    Abstract: A vertical memory device includes first, second and third impurity regions sequentially stacked in a first direction substantially perpendicular to an upper surface of a substrate, a gate electrode structure including gate electrodes spaced apart from each other in the first direction on the third impurity region, a channel extending through the gate electrode structure, the second and third impurity regions, and an upper portion of the first impurity region on the substrate in the first direction, and a charge storage structure covering a portion of an outer sidewall and a lower surface of the channel. The channel directly contacts a sidewall of the second impurity region.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 11, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kohji Kanamori, Young-Hwan Son, Byung-Kwan You, Eun-Taek Jung
  • Publication number: 20200027894
    Abstract: A three-dimensional semiconductor memory device includes: gate electrodes and mold insulation layers alternately stacked on a substrate; a channel layer passing through the gate electrodes and the mold insulation layers; and a gate dielectric layer between the gate electrodes and the channel layer. The gate dielectric layer and the channel layer may be in an upper portion of the substrate and may be bent at a first angle and extend under the mold insulation layers in the upper portion of the substrate.
    Type: Application
    Filed: January 30, 2019
    Publication date: January 23, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young Hwan SON, Seo Goo KANG, Shin Hwan KANG
  • Patent number: 10525155
    Abstract: A sterilizer may include: a first pipe having an inner wall with a light reflecting property; a second pipe disposed in the first pipe so as to pass fluid therethrough and formed of a light transmitting material; and a plurality of UV LEDs arranged on the inner wall of the first pipe and configured to irradiate sterilization UV light onto the fluid.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: January 7, 2020
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Seong Min Lee, Young Hwan Son, Jae Seon Yi, Jong Rack Kim, Ik Hwan Ko
  • Publication number: 20190333925
    Abstract: A vertical non-volatile memory device includes a lower insulating layer on a substrate, a multilayer structure including gate electrodes and interlayer insulating layers alternately stacked on the lower insulating layer, a gate dielectric layer and a channel structure, and has an opening extending through the multilayer structure and exposing the lower insulating layer. The opening includes a first open portion extending through at least one layer of the multilayer structure at a first width, and a second open portion extending through the multilayer structure at a second width less than the first width. The gate dielectric layer lines the opening, and the channel structure is disposed on the gate dielectric layer and is electrically connected to the substrate.
    Type: Application
    Filed: July 8, 2019
    Publication date: October 31, 2019
    Inventors: YOUNG-HWAN SON, JAE-HOON JANG, JEE-HOON HAN
  • Publication number: 20190326316
    Abstract: A vertical memory device includes gate electrodes on a substrate, a channel extending through the gate electrodes, and a contact plug extending through the gate electrodes. The gate electrodes are stacked in a first direction substantially vertical to an upper surface of the substrate and arranged to have a staircase shape including steps of which extension lengths in a second direction substantially parallel to the upper surface gradually increase from a lowermost level toward an uppermost level. A pad at an end portion of each of the gate electrodes in the second direction has a thickness greater than those of other portions thereof. The channel extends in the first direction. The contact plug extends in the first direction. The channel contacts the pad of a first gate electrode among the gate electrodes to be electrically connected thereto, and is electrically insulated from second gate electrodes among the gate electrodes.
    Type: Application
    Filed: December 4, 2018
    Publication date: October 24, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: YOUNG-HWAN SON, Kohji Kanamori, Shin-Hwan Kang, Young Jin Kwon
  • Patent number: 10426864
    Abstract: A storage apparatus according to an embodiment may include a body having a storage space of storage products and an air purifying module coupled to the body. The air purifying module may include a light emitting diode part disposed along a passage of air to provide ultraviolet light, and a filter part disposed adjacent to the light emitting diode part.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: October 1, 2019
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jung Yeol Park, Young Hwan Son, Seong Min Lee, Jae Seon Yi, Jong Hyun Koo, Sang Hee Cho, Ju Won Yoo, Sung Lim Cho, Jong Rack Kim
  • Patent number: 10396086
    Abstract: A vertical non-volatile memory device includes a lower insulating layer on a substrate, a multilayer structure including gate electrodes and interlayer insulating layers alternately stacked on the lower insulating layer, a gate dielectric layer and a channel structure, and has an opening extending through the multilayer structure and exposing the lower insulating layer. The opening includes a first open portion extending through at least one layer of the multilayer structure at a first width, and a second open portion extending through the multilayer structure at a second width less than the first width. The gate dielectric layer lines the opening, and the channel structure is disposed on the gate dielectric layer and is electrically connected to the substrate.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: August 27, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Hwan Son, Jae-Hoon Jang, Jee-Hoon Han
  • Publication number: 20190224353
    Abstract: The multifunction LED lighting apparatus of the present invention includes at least one lighting LED, at least one ultraviolet (UV) LED, a substrate configured to have the at least one lighting LED and the at least one UV LED mounted thereon, and a cover disposed to face the substrate at a specific interval and configured to cover the lighting LED and the UV LED. The at least one lighting LED and the at least one UV LED are integrally mounted on the substrate and configured to form a single module of a thin sheet form, and the cover is installed to cover and support the single module placed on the inside wall of an application.
    Type: Application
    Filed: April 1, 2019
    Publication date: July 25, 2019
    Inventors: Jung Youl PARK, Jong Rack KIM, Young Hwan SON, Seong Min LEE, Jae Seon YI