Abstract: A display substrate includes a gate line, a data line and a pixel electrode. The gate line is extended in a first direction on a base substrate. The data line is extended in a second direction crossing to the first direction. The pixel electrode is disposed on a pixel area of the base substrate. The pixel electrode includes a first sub-electrode and a second sub-electrode spaced apart by an opening portion, and receives a voltage having a same polarity. The opening portion includes a straight line portion extended in the first direction, a diagonal line portion extended in a third direction crossing the first and second directions, and a protrusion portion disposed in a length direction of the straight line portion at a portion of the pixel electrode where the straight line portion and the diagonal line portion meet.

Abstract: A display substrate has first and second conductive layers separated from one another by an insulation layer. The first and second conductive layers are used to integrally form on the display substrate, pixel units in a relatively central display area of the substrate and integrated gate driving circuitry as well as associated wirings thereof in one or more peripheral areas. The first and second conductive layers are covered by a first protection layer made of a first electrically insulative material. A second and supplementing protection layer is provided on top of the first protection layer. The supplementing protection layer (buffer layer) is formed of a material different from that of the first protection layer so as to provide supplemental resistance against corrosive chemical agents and supplemental resistance against formation of cracks.

Abstract: Embodiments of the present invention relate to a liquid crystal display. According to an embodiment, a liquid crystal display including a plurality of pixels arranged in a matrix according to an exemplary embodiment of the present invention includes: a plurality of pixel electrodes respectively including a first sub-pixel electrode and a second sub-pixel electrode; a plurality of first thin film transistors connected to the first sub-pixel electrodes; a plurality of second thin film transistors connected to the second sub-pixel electrodes; a plurality of third thin film transistors connected to the second sub-pixel electrodes; a plurality of first gate lines connected to the first and second thin film transistors; a plurality of data lines connected to the first and second thin film transistors; a plurality of second gate lines connected to the third thin film transistors; and a step-down capacitor connected between the drain electrode of the third thin film transistor and the first gate line.

Abstract: A display substrate has first and second conductive layers separated from one another by an insulation layer. The first and second conductive layers are used to integrally form on the display substrate, pixel units in a relatively central display area of the substrate and integrated gate driving circuitry as well as associated wirings thereof in one or more peripheral areas. The first and second conductive layers are covered by a first protection layer made of a first electrically insulative material. A second and supplementing protection layer is provided on top of the first protection layer. The supplementing protection layer (buffer layer) is formed of a material different from that of the first protection layer so as to provide supplemental resistance against corrosive chemical agents and supplemental resistance against formation of cracks.

Abstract: A liquid crystal display includes: a first insulation substrate; a first gate conductor disposed on the first insulation substrate and in a same layer as a gate line and a second gate conductor disposed on the first insulation substrate and in the same layer as the gate line; a gate insulating layer disposed on the first gate conductor and the second gate conductor; a data conductor disposed on the gate insulating layer and in a same layer as a data line; a thin film transistor disposed on the first insulation substrate; a first spacer disposed on the first insulation substrate; and a second spacer disposed on the first insulation substrate, where heights or widths of the first and second spacers are different from each other and having different heights or widths, and the second spacer overlaps the first gate conductor and the second gate conductor.

Abstract: A display panel and a method for manufacturing the same are disclosed. The display panel includes: a first substrate, a touch spacer formed on a first substrate, a common electrode formed on the touch spacer, a second substrate opposing the first substrate, a sensing electrode facing the touch spacer on the second substrate and an alignment layer on the sensing electrode or the touch spacer, wherein the alignment layer has a thickness equal to or less than 500 ?.

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.

Abstract: A liquid crystal display according to an exemplary embodiment of the present invention includes a substrate, a gate line formed on the substrate, a data line intersecting the gate line and including a source electrode, a drain electrode facing the source electrode, a passivation layer formed on the data line and the drain electrode, a color filter formed on the passivation layer, a cover formed on the color filter and having a contact hole exposing the drain electrode, and a pixel electrode formed on the cover and connected to the drain electrode through the contact hole, wherein the cover includes a dummy hole exposing the color filter.

Abstract: A display substrate includes a data line, a gate line and a fan-out line. The data line is disposed in a display area of a base substrate and transfers a data signal to a switching element electrically connected to a pixel electrode. The gate line is disposed in the display area and transfers a gate signal to the switching element. The fan-out line is disposed in a peripheral area of the base substrate surrounding the display area, electrically connected to at least one of the data line and the gate line, and includes a plurality of conductive layers making contact with each other through a contact hole.

Abstract: A thin film transistor includes: a substrate; a thin film transistor formed on the substrate; a first color filter and a second color filter formed on the thin film transistor and each having a through hole; a capping layer formed on the first color filter and the second color filter; and a pixel electrode formed on the capping layer and connected to the thin film transistor through the through hole, wherein the capping layer formed on the first color filter has a first opening exposing the through hole of the first color filter, the size of the first opening is larger than the size of the through hole, the capping layer formed on the second color filter has a second opening disposed inside the through hole of the second color filter, and the size of the second opening is smaller than the size of the through hole. Accordingly, the capping layer completely covers the green color filter which prevents damage to the green color filter in a dry etching process, and also prevents changes of a color coordinate.

Abstract: The present disclosure relates to a thin film transistor array panel and a manufacturing method thereof.

Abstract: A touch screen display includes; a first substrate, a lower sensor electrode disposed on the first substrate, a second substrate disposed substantially opposite to the first substrate, a sensor spacer disposed on the second substrate and aligned with the lower sensor electrode, a common electrode disposed on the second substrate, an upper sensor electrode disposed on the sensor spacer and connected to the common electrode, and a cutout disposed at an edge of the upper sensor electrode, wherein when touch pressure is applied to the first or second substrate, a change in capacitance is generated due to a change in a distance between the lower sensor electrode and the upper sensor electrode at a touch position, such that the touch position is detected on the basis of the change in capacitance.

Abstract: A display panel and a method for manufacturing the same are disclosed. The display panel includes: a first substrate, a touch spacer formed on a first substrate, a common electrode formed on the touch spacer, a second substrate opposing the first substrate, a sensing electrode facing the touch spacer on the second substrate and an alignment layer on the sensing electrode or the touch spacer, wherein the alignment layer has a thickness equal to or less than 500?.

Abstract: Provided is a thin-film transistor (TFT) substrate. The TFT substrate includes: an insulating substrate; a semiconductor pattern which is formed on the insulating substrate, the semiconductor pattern having a top surface and a bottom surface; a source electrode and a drain electrode which are disposed on the top and bottom surfaces of the semiconductor pattern, respectively; a gate electrode which is disposed alongside the semiconductor pattern with a gate insulating film interposed therebetween; a data line which is connected to the source electrode and extends in a first direction; a gate line which is connected to the gate electrode and extends in a second direction; and a pixel electrode which is connected to the drain electrode and is formed in a pixel region.

Abstract: A touch screen display apparatus includes a first substrate including a pixel electrode and a lower sensor electrode, a second substrate facing the first substrate and including a common electrode and an upper sensor electrode facing the lower sensor electrode, a liquid crystal layer interposed between the substrates, a first alignment layer disposed on the pixel electrode and the common electrode, a second alignment layer disposed on the lower sensor electrode, and a third alignment layer disposed on the upper sensor electrode. The second or third alignment layers aligns the liquid crystal layer in a different direction from a direction the first alignment layer aligns the liquid crystal layer. When pressure is applied onto a point on the first or second substrate, a distance and a capacitance between the lower sensor electrode and the upper sensor electrode at the point are changed to detect a position of the point.

Abstract: A display panel and a method for manufacturing the same are disclosed. The display panel includes: a first substrate, a touch spacer formed on a first substrate, a common electrode formed on the touch spacer, a second substrate opposing the first substrate, a sensing electrode facing the touch spacer on the second substrate and an alignment layer on the sensing electrode or the touch spacer, wherein the alignment layer has a thickness equal to or less than 500 ?.

Abstract: A thin film transistor (“TFT”) array panel according to an exemplary embodiment of the present invention includes a substrate, a first storage electrode formed on the substrate, a first TFT formed on the substrate and separated from the first storage electrode, a first insulating layer formed on the first storage electrode and the first TFT and having a first opening disposed on the first storage electrode, a pixel electrode connected to the first TFT and overlapping the first storage electrode in the first opening, and a second insulating layer disposed between the first storage electrode and the pixel electrode in the first opening, wherein at least a portion of the boundary of the pixel electrode overlaps the first storage electrode and is disposed in the first opening. Accordingly, storage appropriate capacitance is ensured and a reduction of the aperture ratio may be decreased.

Abstract: A base substrate of a color filter substrate includes a display region and a peripheral region. The display region includes a pixel area having a first unit area, a second unit area, and a third unit area that are disposed adjacent to each other, and a blocking area that surrounds peripheral portions of each of the first, second, and third unit areas. A first color filter is formed in the first unit area. A second color filter is formed in the second unit area and the blocking area. A third color filter is formed in the third unit area and on the second color filter in the blocking area. Therefore, the second and third color filters overlap each other so that light is blocked.

Abstract: A display substrate includes a gate line, a data line and a pixel electrode. The gate line is extended in a first direction on a base substrate. The data line is extended in a second direction crossing to the first direction. The pixel electrode is disposed on a pixel area of the base substrate. The pixel electrode includes a first sub-electrode and a second sub-electrode spaced apart by an opening portion, and receives a voltage having a same polarity. The opening portion includes a straight line portion extended in the first direction, a diagonal line portion extended in a third direction crossing the first and second directions, and a protrusion portion disposed in a length direction of the straight line portion at a portion of the pixel electrode where the straight line portion and the diagonal line portion meet.