Abstract: Disclosed is a substrate processing device which includes a substrate transfer part on which a transfer object is received and a jetting system part includes an ink jet body that jets and prints ink on the transfer object over an upper surface of the substrate transfer part, an ink module transfer part that transfers the ink jet body, an encoder disposed around the ink module transfer part to output a movement signal per unit movement distance of the ink module transfer part, an ink ejection controller that interworks with the ink jet body to control an ink jetting timing of the ink jet body, and a signal splitter that interworks with the encoder to count the movement signal, reset a width of the counted movement signal, and transmit the movement signal, the width of which is reset, to the ink ejection controller.

Abstract: The present invention relates to a substrate processing apparatus including: a chamber; a first electrode disposed on the chamber; a second electrode disposed under the first electrode, the second electrode including a plurality of openings; a plurality of protrusion electrodes extending from the first electrode to the plurality of openings of the second electrode; a substrate supporter being opposite to the second electrode and supporting a substrate; a first discharging region between a lower surface of the first electrode and an upper surface of the second electrode; a second discharging region between a side surface of the protrusion electrode and an opening inner surface of the second electrode; a third discharging region between a lower surface of the protrusion electrode and the opening inner surface of the second electrode; and a fourth discharging region between the second electrode and the substrate, wherein plasma is generated in at least one region of the first to fourth discharging regions.

Abstract: Disclosed herein is a unit for collecting and ejecting blood including: a handle extending along a first central axis; a handling block connected to the handle and disposed to have a second central axis that is offset from the first central axis; and a plunger connected to the handle to be movable along a direction of the first central axis and moving toward the handling block when manipulated, wherein the handling block includes: a body having a connection portion connected to the handle and a contact portion located beneath the connection portion; and a collection port formed to pass through the body in a direction from the contact portion to the connection portion and configured to collect blood by a capillary force, and the plunger moves along the direction of the first central axis when manipulated to enter the collection port and push the blood collected in the collection port out of the collection port.

Abstract: A method for electronic stability control of a vehicle includes a compensated moment calculation operation of calculating a compensated moment according to an error between a desired turning speed calculated based on a steering angle and a vehicle speed of the vehicle and a turning speed of the vehicle; a compensated moment comparison operation of comparing the compensated moment calculated in the compensated moment calculation operation with a first reference value and a second reference value; steering rear wheels of the vehicle if it is determined that the compensated moment is equal to or larger than the first reference value and smaller than the second reference value; and a simultaneously performing steering of rear wheels of the vehicle and braking of the vehicle if it is determined that the compensated moment is equal to or larger than the second reference value.

Abstract: A method for electronic stability control of a vehicle includes a compensated moment calculation operation of calculating a compensated moment according to an error between a desired turning speed calculated based on a steering angle and a vehicle speed of the vehicle and a turning speed of the vehicle; a compensated moment comparison operation of comparing the compensated moment calculated in the compensated moment calculation operation with a first reference value and a second reference value; steering rear wheels of the vehicle if it is determined that the compensated moment is equal to or larger than the first reference value and smaller than the second reference value; and a simultaneously performing steering of rear wheels of the vehicle and braking of the vehicle if it is determined that the compensated moment is equal to or larger than the second reference value.

Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.

Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.

Abstract: In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.

Abstract: In an embodiment, a method of forming a lower electrode of a capacitor in a semiconductor memory device includes etching a mold oxide layer to have at a cylindrical structure, resulting in an electrode with increased surface area. The cylindrical structure may have more than one radius. This increased surface area results in an increased capacitance. An excessive etch phenomenon, which occurs because a sacrificial oxide layer is etched at a higher rate than the mold oxide layer, is avoided.

Abstract: A method of fabricating a storage capacitor includes depositing a first titanium nitride layer on a dielectric layer using a chemical vapor deposition technique or an atomic layer deposition technique performed at a first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas at a predetermined flow ratio and depositing a second titanium nitride layer on the first titanium nitride layer using a chemical vapor deposition process performed at a second temperature that is greater than the first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas.

Abstract: In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

Abstract: In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

Abstract: Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening there through on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

Abstract: A wiring structure of a semiconductor device comprises an insulating interlayer, a plug and a conductive pattern. The insulating interlayer has an opening therethrough on a substrate. The plug includes tungsten and fills up the opening. The plug is formed by a deposition process using a reaction of a source gas. A conductive pattern structure makes contact with the plug and includes a first tungsten layer pattern and a second tungsten layer pattern. The first tungsten layer pattern is formed by the deposition process. The second tungsten layer pattern is formed by a physical vapor deposition (PVD) process.

Abstract: Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening therethrough on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.