Patents by Inventor Young-Joon Park
Young-Joon Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130293709Abstract: Provided are a time synchronization apparatus and method for a network camera and a network video recorder (NVR) connected to the network camera. The apparatus includes: a data receiving unit receiving a data stream from the network camera, the data stream including timestamp information of the network camera; a noise determining unit determining whether time information input from the network camera is a noise based on a timestamp of the network camera contained in the timestamp information; and a setting control unit setting a timestamp of the NVR based on the determining of the noise determining unit, wherein the data stream comprises data obtained by the network camera and the timestamp information of the network camera which indicates a time when the data stream was transmitted from the network camera.Type: ApplicationFiled: December 31, 2012Publication date: November 7, 2013Applicant: SAMSUNG TECHWIN CO. LTD.Inventors: Il Hwang CHA, Young Joon PARK
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Patent number: 8438519Abstract: A method of method of manufacturing an integrated circuit. The method comprises performing an electromigration reliability rule-check for at least one of via node of an integrated circuit, including: calculating a net effective current density of the via node. Calculating the net effective current density including determining a sum of effective current densities for individual leads that are coupled to the via node. Leads configured to transfer electrons away from said via node are assigned a positive polarity of the effective current density. Leads configured to transfer electrons towards the via node are assigned a negative polarity of the effective current density.Type: GrantFiled: March 4, 2008Date of Patent: May 7, 2013Assignee: Texas Instruments IncorporatedInventor: Young-Joon Park
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Publication number: 20130002888Abstract: Disclosed are an apparatus for editing multimedia information and a method thereof. The apparatus for editing multimedia information in accordance with the exemplary embodiment of the present invention includes: a display unit the displays a document input window for preparing a document including the multimedia information; a control unit that sets an insertion area for inputting images or moving pictures within the document input window according to a request of a user; and a picture photographing unit that photographs the images or the moving pictures to be input to the insertion area by being driven when the insertion area is set, wherein the control unit inputs the photographed images or moving pictures to the insertion area within the document input window.Type: ApplicationFiled: June 4, 2012Publication date: January 3, 2013Applicant: Electronics and Telecommunications Research InstituteInventors: Soon Ju KOH, Young Joon Park, Pil Sun Heo, Sung Young Jung
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Patent number: 8299612Abstract: A through substrate via (TSV) die includes a plurality of TSVs including an outer dielectric sleeve, an inner metal core and protruding TSV tips including sidewalls that emerge from the TSV die. A passivation layer lateral to protruding TSV tips is on a portion of the sidewalls of protruding TSV tips. The passivation layers is absent from a distal portion of protruding TSV tips to provide an exposed portion of the inner metal core. The TSV tips include bulbous distal tip ends which cover a portion of the TSV sidewalls, are over a topmost surface of the outer dielectric sleeve, and have a maximum cross sectional area that is ?25% more as compared to a cross sectional area of the protruding TSV tips below the bulbous distal tip ends.Type: GrantFiled: September 14, 2011Date of Patent: October 30, 2012Assignee: Texas Instruments IncorporatedInventors: Jeffrey A. West, Young-Joon Park
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Publication number: 20120235296Abstract: A through substrate via (TSV) die includes a plurality of TSVs including an outer dielectric sleeve, an inner metal core and protruding TSV tips including sidewalls that emerge from the TSV die. A passivation layer lateral to protruding TSV tips is on a portion of the sidewalls of protruding TSV tips. The passivation layers is absent from a distal portion of protruding TSV tips to provide an exposed portion of the inner metal core. The TSV tips include bulbous distal tip ends which cover a portion of the TSV sidewalls, are over a topmost surface of the outer dielectric sleeve, and have a maximum cross sectional area that is ?25% more as compared to a cross sectional area of the protruding TSV tips below the bulbous distal tip ends.Type: ApplicationFiled: September 14, 2011Publication date: September 20, 2012Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Jeffrey A. West, Young-Joon Park
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Patent number: 8219953Abstract: Apportioning unequally contributions of different metal paths of a circuit to electromigration (EM) reliability. In an embodiment, a corresponding parameter value representing a magnitude of excess current flowing in a single direction in each metal path is determined. A desired reliability measure for electromigration (EM) is apportioned among the metal paths based on computed parameter values for the corresponding metal path. A reliability analysis for the circuit is performed based on the apportioning. In an embodiment, metal paths which predominantly carry currents with an average value less than a threshold are excluded from being considered as contributors to EM degradation.Type: GrantFiled: January 18, 2009Date of Patent: July 10, 2012Assignee: Texas Instruments IncorporatedInventors: Palkesh Jain, Young-Joon Park, Srikanth Krishnan, Guru Chakrapani Prasad
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Patent number: 8039385Abstract: A through substrate via (TSV) die includes a plurality of TSVs including an outer dielectric sleeve and an inner metal core and protruding TSV tips including sidewalls that emerge from the TSV die. A passivation layer lateral to the protruding TSV tips is on a portion of the sidewalls of the protruding TSV tips. The passivation layers is absent from a distal portion of the protruding TSV tips to provide an exposed portion of the inner metal core. The TSV tips include bulbous distal tip ends including a first metal layer including a first metal other than solder and a second metal layer including a second metal other than solder that covers the exposed tip portion. The bulbous distal tip ends cover a portion of the TSV sidewalls and are over a topmost surface of the outer dielectric sleeve, and have a maximum cross sectional area that is ?25% more as compared to a cross sectional area of the protruding TSV tips below the bulbous distal tip ends.Type: GrantFiled: September 13, 2010Date of Patent: October 18, 2011Assignee: Texas Instruments IncorporatedInventors: Jeffrey A. West, Young-Joon Park
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Publication number: 20110080175Abstract: An integrated circuit is described. The integrated circuit, comprising: a central processor; a memory; and an electromigration compensation system associated with a plurality of leads within the integrated circuit, wherein the electromigration compensation system causes the plurality of leads to have interlocking, horizontally tapered ends that substantially reduces electromigration divergence and consequently lead resistance and circuit shorting.Type: ApplicationFiled: October 7, 2010Publication date: April 7, 2011Inventors: PALKESH JAIN, YOUNG-JOON PARK
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Patent number: 7864225Abstract: A system and method for displaying together images and an image capture time of captured images comprises a storage device and a viewer for displaying an image capture time. The storage device stores image data obtained from an image capture unit and environment data, which includes a storage medium, indicative of environment conditions where images are captured, and creates subtitle data based on the environment data to display a time of capturing the images as a subtitle. Also, The viewer receives the image data and subtitle data to play back the captured images based on the received data, and displays the image capture time using the subtitle data while the captured images are played back.Type: GrantFiled: February 15, 2006Date of Patent: January 4, 2011Assignee: Samsung Techwin Co., Ltd.Inventors: Seung Min Lee, Young Joon Park
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Publication number: 20100041688Abstract: The present invention provides a solid dispersion in which revaprazan particles are surface-modified with a water-soluble polymer, a water-soluble saccharide, a surfactant, or a mixture thereof and a process for preparing the same. The present invention also provides a pharmaceutical composition containing the solid dispersion and a process for preparing the pharmaceutical composition.Type: ApplicationFiled: December 21, 2007Publication date: February 18, 2010Applicant: YUHAN CORPORATIONInventors: Young-Joon Park, Chang-Keun Hyun
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Publication number: 20100032770Abstract: A resistor is formed on field oxide with a portion of the resistor body configured to overlap an active region in an integrated circuit (IC) substrate to provide heatsinking for the resistor body. In one embodiment, cooling fingers extend from the resistor body beyond the field oxide to overlap the active region. In another embodiment, minor areas of the resistor body overlap the active region. The resistor body may be formed of polycrystalline silicon (polysilicon), silicided polysilicon, or metal. An oxide having greater thermal conductance than the field oxide is formed between the overlapping parts of the resistor body and the active region.Type: ApplicationFiled: August 7, 2009Publication date: February 11, 2010Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Young-Joon Park, Ki-Don Lee
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Publication number: 20090228856Abstract: A method of method of manufacturing an integrated circuit. The method comprises performing an electromigration reliability rule-check for at least one of via node of an integrated circuit, including: calculating a net effective current density of the via node. Calculating the net effective current density including determining a sum of effective current densities for individual leads that are coupled to the via node. Leads configured to transfer electrons away from said via node are assigned a positive polarity of the effective current density. Leads configured to transfer electrons towards the via node are assigned a negative polarity of the effective current density.Type: ApplicationFiled: March 4, 2008Publication date: September 10, 2009Applicant: Texas Instruments Inc.Inventor: Young-Joon Park
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Patent number: 7566652Abstract: A semiconductor device 300 includes a metal line 304 formed in a first dielectric layer 302. A capping layer 306 is formed the metal line 304. A second dielectric layer 308 is formed over the first dielectric layer 302 and the metal line 304. A first via 310 is formed in the second dielectric layer 308 and in contact with the metal line 304. A second via 312 is formed in the second dielectric layer 308 and in contact with the metal line 304, and is positioned a distance away from the first via 310. An electrically isolated via 326 is formed in the second dielectric layer 308 and in contact with the metal line 304 and in between the first via 310 and the second via 312. A third dielectric layer 314 is formed over the second dielectric layer 308. First and second trenches 316, 318 are formed in the third dielectric layer 314 and in contact with the first via 310 and the second via 312, respectively. An isolated trench 328 is formed in the third dielectric layer and in contact with the isolated via 326.Type: GrantFiled: July 24, 2006Date of Patent: July 28, 2009Assignee: Texas Instruments IncorporatedInventors: Ki-Don Lee, Young-Joon Park, Ennis Takashi Ogawa
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Publication number: 20090187869Abstract: Apportioning unequally contributions of different metal paths of a circuit to electromigration (EM) reliability. In an embodiment, a corresponding parameter value representing a magnitude of excess current flowing in a single direction in each metal path is determined. A desired reliability measure for electromigration (EM) is apportioned among the metal paths based on computed parameter values for the corresponding metal path. A reliability analysis for the circuit is performed based on the apportioning. In an embodiment, metal paths which predominantly carry currents with an average value less than a threshold are excluded from being considered as contributors to EM degradation.Type: ApplicationFiled: January 18, 2009Publication date: July 23, 2009Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Palkesh Jain, Young-Joon Park, Srikanth Krishnan, Guruprasad C
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Publication number: 20080017989Abstract: A semiconductor device 300 includes a metal line 304 formed in a first dielectric layer 302. A capping layer 306 is formed the metal line 304. A second dielectric layer 308 is formed over the first dielectric layer 302 and the metal line 304. A first via 310 is formed in the second dielectric layer 308 and in contact with the metal line 304. A second via 312 is formed in the second dielectric layer 308 and in contact with the metal line 304, and is positioned a distance away from the first via 310. An electrically isolated via 326 is formed in the second dielectric layer 308 and in contact with the metal line 304 and in between the first via 310 and the second via 312. A third dielectric layer 314 is formed over the second dielectric layer 308. First and second trenches 316, 318 are formed in the third dielectric layer 314 and in contact with the first via 310 and the second via 312, respectively. An isolated trench 328 is formed in the third dielectric layer and in contact with the isolated via 326.Type: ApplicationFiled: July 24, 2006Publication date: January 24, 2008Inventors: Ki-Don Lee, Young-Joon Park, Ennis Takashi Ogawa
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Patent number: 7306260Abstract: The present invention relates to a lap fuse belt for a seat belt. A lap fuse belt for a seat belt includes a plurality of lap fuse belt cases which are coupled to one another by receiving holes and coupling projections formed on surfaces thereof so as to house the lap fuse belt. The lap fuse belt reduces injuries on an occupant by dispersing impact.Type: GrantFiled: November 28, 2006Date of Patent: December 11, 2007Assignee: Hyundai Motor CompanyInventor: Young Joon Park
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Patent number: 7215000Abstract: The present invention provides, in one embodiment, An integrated circuit device (100). The integrated circuit device (100) comprises a circuit feature (105) located over a semiconductor substrate (110) and an insulating layer (115) located over the circuit feature (105). A protective overcoat (120) is located over the insulating layer (115) and a metal structure (125) is located over the protective overcoat (120). The metal structure (125) is electrically connected to the circuit feature (105) by an interconnect (130). The metal structure (125) is coated with a conductive encasement (135), the conductive encasement (135) terminating at a perimeter (140) of the metal structure (125). Another embodiment of the invention in a method of manufacturing an integrated circuit device (200).Type: GrantFiled: August 23, 2004Date of Patent: May 8, 2007Assignee: Texas Instruments IncorporatedInventors: Richard A. Faust, Young-Joon Park
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Patent number: 7122466Abstract: An embodiment of the invention is a method of manufacturing copper interconnects 30 on a semiconductor wafer 10 where an electroplating process is used to deposit a first layer of copper grains 30d having an initial grain size and a second layer of copper grains 30e having a different initial grain size.Type: GrantFiled: July 28, 2003Date of Patent: October 17, 2006Assignee: Texas Instruments IncorporatedInventors: Young-Joon Park, Srikanth Krishnan
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Publication number: 20060038295Abstract: The present invention provides, in one embodiment, An integrated circuit device (100). The integrated circuit device (100) comprises a circuit feature (105) located over a semiconductor substrate (110) and an insulating layer (115) located over the circuit feature (105). A protective overcoat (120) is located over the insulating layer (115) and a metal structure (125) is located over the protective overcoat (120). The metal structure (125) is electrically connected to the circuit feature (105) by an interconnect (130). The metal structure (125) is coated with a conductive encasement (135), the conductive encasement (135) terminating at a perimeter (140) of the metal structure (125). Another embodiment of the invention in a method of manufacturing an integrated circuit device (200).Type: ApplicationFiled: August 23, 2004Publication date: February 23, 2006Applicant: Texas Instruments, IncorporatedInventors: Richard Faust, Young-Joon Park
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Publication number: 20060015681Abstract: Provided is an apparatus and method for writing and reading data. The apparatus for writing and reading data includes an input unit to which data is input, a disc which stores the input data, a disc controller which controls operation of the disc, an output unit which outputs data stored in the disc, and an operation unit which controls operations of the input unit, the disc controller, and the output unit, wherein the disc controller obtains information about an area of the disc in which data can be written, writes data of a file in consecutive positions of the disc using the information about the area of the disc to avoid empty space between files, and reads the data written in the consecutive positions.Type: ApplicationFiled: July 18, 2005Publication date: January 19, 2006Applicant: Samsung Electronics Co., Ltd.Inventor: Young-Joon Park