Patents by Inventor Young-Min Ko
Young-Min Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200280619Abstract: An electronic device control system is provided.Type: ApplicationFiled: October 8, 2018Publication date: September 3, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young-min KO, Ki-hyun KIM, Seok-min BAE, Jung-mo YEON, Hyun-woo OCK, Sung-bin IM, Tae-hoon HA
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Patent number: 10720470Abstract: There is provided a variable resistance memory device including a first electrode line layer including first electrode lines extending in a first direction and spaced apart from each other on a substrate, a second electrode line layer that is above the first electrode line layer and including second electrode lines extending in a second direction orthogonal to the first direction and spaced apart from each other, and a memory cell layer including memory cells between the first electrode line layer and the second electrode line layer. Each of the memory cells includes a selection device layer, an intermediate electrode layer, and a variable resistance layer. A first insulating layer is between the first electrode lines, a second insulating layer is between the memory cells, and a third insulating layer is between the second electrode lines. The second insulating layer includes air gaps on side surfaces of the memory cells.Type: GrantFiled: February 15, 2019Date of Patent: July 21, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Byongju Kim, Young-min Ko, Jong-uk Kim, Kwangmin Park, Jeong-hee Park
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Publication number: 20200111957Abstract: A method of manufacturing a variable resistance memory device includes: forming an array of memory cells on a substrate, each memory cell including a variable resistance structure and a switching element; and forming a sidewall insulating layer covering a sidewall of the switching element. The forming the sidewall insulating layer includes: a preliminary step of supplying a silicon source to an exposed sidewall of the switching element; and a main step of performing a process cycle a plurality of times, the process cycle comprising supplying the silicon source and supplying a reaction gas, A time duration of the supplying the silicon source in the preliminary step is longer than a time duration of the supplying the silicon gas in the process cycle in the main step.Type: ApplicationFiled: May 17, 2019Publication date: April 9, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: BYONGJU KIM, YOUNG-MIN KO, JONGUK KIM, JAEHO JUNG, DONGSUNG CHOI
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Publication number: 20200111954Abstract: A method of manufacturing a variable resistance memory device may include: forming a memory cell including a variable resistance pattern on a substrate; performing a first process to deposit a first protective layer covering the memory cell; and performing a second process to deposit a second protective layer on the first protective layer. The first process and the second process may use the same source material and the same nitrogen reaction material, and a nitrogen content in the first protective layer may be less than a nitrogen content in the second protective layer.Type: ApplicationFiled: May 20, 2019Publication date: April 9, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: JONGUK KIM, YOUNG-MIN KO, BYONGJU KIM, JAEHO JUNG, DONGSUNG CHOI
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Publication number: 20200083319Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.Type: ApplicationFiled: November 11, 2019Publication date: March 12, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Ha-young YI, Youn-seok Choi, Young-min Ko, Mun-jun Kim, Hong-gun Kim, Seung-heon Lee
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Patent number: 10586709Abstract: Methods for fabricating a semiconductor device are provided including sequentially forming a first hard mask layer, a second hard mask layer and a photoresist layer on a target layer, patterning the photoresist layer to form a photoresist pattern, sequentially patterning the second hard mask layer and the first hard mask layer using the photoresist pattern as an etching mask to form a first hard mask pattern and a second hard mask pattern on the first hard mask pattern, and etching the target layer using the first hard mask pattern and the second hard mask pattern as an etching mask, wherein the second hard mask layer includes impurity-doped amorphous silicon.Type: GrantFiled: July 9, 2018Date of Patent: March 10, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young-Min Ko, Hyuk Woo Kwon, Jun-Won Lee
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Publication number: 20200066981Abstract: A variable resistance memory device may include a memory unit including a first electrode disposed on a substrate, a variable resistance pattern disposed on the first electrode and a second electrode disposed on the variable resistance pattern, a selection pattern disposed on the memory unit, and a capping structure covering a sidewall of the selection pattern. The capping structure may include a first capping pattern and a second capping pattern sequentially stacked on at least one sidewall of the selection pattern. The first capping pattern may be silicon pattern, and the second capping pattern may include a nitride.Type: ApplicationFiled: March 27, 2019Publication date: February 27, 2020Inventors: JONG-UK KIM, Young-Min KO, Byong-Ju KIM, Kwang-Min PARK, Jeong-Hee PARK, Dong-Sung CHOI
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Publication number: 20200066800Abstract: A variable resistanvce memory device may include a plurality of first conductive lines extending in a first direction, a plurality of second conductive lines extending in a second direction, a plurality of memory cells, each memory cell at a respective intersection, with respect to a top down view, between a corresponding one of the first conductive lines and a corresponding one of the second conductive lines, each memory cell comprising a variable resistance structure and a switching element sandwiched between a top electrode and a bottom electrode, and a first dielectric layer filling a space between the switching elements of the memory cells. A top surface of the first dielectric layer is disposed between bottom and top surfaces of the top electrodes of the memory cells.Type: ApplicationFiled: April 27, 2019Publication date: February 27, 2020Inventors: BYONGJU KIM, YOUNG-MIN KO, JONGUK KIM, KWANGMIN PARK, JEONGHEE PARK, DONGSUNG CHOI
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Publication number: 20200052038Abstract: There is provided a variable resistance memory device including a first electrode line layer including first electrode lines extending in a first direction and spaced apart from each other on a substrate, a second electrode line layer that is above the first electrode line layer and including second electrode lines extending in a second direction orthogonal to the first direction and spaced apart from each other, and a memory cell layer including memory cells between the first electrode line layer and the second electrode line layer. Each of the memory cells includes a selection device layer, an intermediate electrode layer, and a variable resistance layer. A first insulating layer is between the first electrode lines, a second insulating layer is between the memory cells, and a third insulating layer is between the second electrode lines. The second insulating layer includes air gaps on side surfaces of the memory cells.Type: ApplicationFiled: February 15, 2019Publication date: February 13, 2020Inventors: Byongju Kim, Young-min Ko, Jong-uk Kim, Kwangmin Park, Jeong-hee Park
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Patent number: 10497976Abstract: A lithium air battery may include an electrolyte with a donor number of 10 to 40; and a quinone-based liquid catalyst which added to the electrolyte to induce a discharge in the solution.Type: GrantFiled: December 18, 2017Date of Patent: December 3, 2019Assignees: Hyundai Motor Company, Kia Motors Corporation, Seoul National University R&DB FoundationInventors: Won Keun Kim, Jin Soo Kim, Kyoung Han Ryu, Ho Taek Lee, Byung Ju Lee, Ki Suk Kang, Young Min Ko
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Patent number: 10490623Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.Type: GrantFiled: December 21, 2018Date of Patent: November 26, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Ha-young Yi, Youn-seok Choi, Young-min Ko, Mun-jun Kim, Hong-gun Kim, Seung-heon Lee
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Patent number: 10418027Abstract: An electronic device is provided, which includes a storage configured to store a voice recognition application including a wakeup word for entering into a voice command recognition mode, a sensor configured to sense a sound signal, and a processor configured to convert the sound signal into a digital signal and to transfer the converted digital signal to the application, wherein the application identifies whether a characteristic value of the digital signal is equal to or higher than a predetermined threshold level if the digital signal is received, performs voice recognition for the digital signal if the characteristic value of the digital signal is equal to or higher than the predetermined threshold level, and activates the voice command recognition mode if a keyword of a voice included in the digital signal coincides with the wakeup word.Type: GrantFiled: October 12, 2017Date of Patent: September 17, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Young-min Ko, Jin-geun Park
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Publication number: 20190172717Abstract: Methods for fabricating a semiconductor device are provided including sequentially forming a first hard mask layer, a second hard mask layer and a photoresist layer on a target layer, patterning the photoresist layer to form a photoresist pattern, sequentially patterning the second hard mask layer and the first hard mask layer using the photoresist pattern as an etching mask to form a first hard mask pattern and a second hard mask pattern on the first hard mask pattern, and etching the target layer using the first hard mask pattern and the second hard mask pattern as an etching mask, wherein the second hard mask layer includes impurity-doped amorphous silicon.Type: ApplicationFiled: July 9, 2018Publication date: June 6, 2019Inventors: YOUNG-MIN KO, HYUK WOO KWON, JUN-WON LEE
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Publication number: 20190131386Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.Type: ApplicationFiled: December 21, 2018Publication date: May 2, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Ha-young YI, Youn-seok CHOI, Young-min KO, Mun-jun KIM, Hong-gun KIM, Seung-heon LEE
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Patent number: 10170541Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.Type: GrantFiled: May 22, 2017Date of Patent: January 1, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Ha-young Yi, Youn-seok Choi, Young-min Ko, Mun-jun Kim, Hong-gun Kim, Seung-heon Lee
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Publication number: 20180351763Abstract: A smart home service which is capable of providing an environment in which calling a control command for a device is available via a user terminal protocol to control between the device and a user terminal based on different type of protocol and a control method for the same. The smart home service server connecting at least one device operated based on a first protocol to at least one user terminal operated based on a second protocol, includes an application programming interface (API) controller configured to allow a control command for the at least one device to be called via the second protocol of the at least one user terminal; a filter configured to convert the called control command according to the first protocol; and a control command transmitter configured to transmit the control command converted according to the first protocol, to the at least one device.Type: ApplicationFiled: November 24, 2016Publication date: December 6, 2018Inventors: Hyun-Woo OCK, Sung Bin IM, Young Min KO, Hyun Joong KIM, Hyun Jin OH, Young Seon KONG, Min Su KIM, Seok Min BAE, Suk Tae CHOI, Jung Mo YEON, Lye Suk LEE
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Publication number: 20180183102Abstract: A lithium air battery may include an electrolyte with a donor number of 10 to 40; and a quinone-based liquid catalyst which added to the electrolyte to induce a discharge in the solution.Type: ApplicationFiled: December 18, 2017Publication date: June 28, 2018Applicants: Hyundai Motor Company, Kia Motors Corporation, Seoul National University R&DB FoundationInventors: Won Keun Kim, Jin Soo Kim, Kyoung Han Ryu, Ho Taek Lee, Byung Ju Lee, Ki Suk Kang, Young Min Ko
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Publication number: 20180102125Abstract: An electronic device is provided, which includes a storage configured to store a voice recognition application including a wakeup word for entering into a voice command recognition mode, a sensor configured to sense a sound signal, and a processor configured to convert the sound signal into a digital signal and to transfer the converted digital signal to the application, wherein the application identifies whether a characteristic value of the digital signal is equal to or higher than a predetermined threshold level if the digital signal is received, performs voice recognition for the digital signal if the characteristic value of the digital signal is equal to or higher than the predetermined threshold level, and activates the voice command recognition mode if a keyword of a voice included in the digital signal coincides with the wakeup word.Type: ApplicationFiled: October 12, 2017Publication date: April 12, 2018Inventors: Young-min KO, Jin-geun PARK
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Publication number: 20170345886Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.Type: ApplicationFiled: May 22, 2017Publication date: November 30, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Ha-young YI, Youn-seok CHOI, Young-min KO, Mun-jun KIM, Hong-gun KIM, Seung-heon LEE
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Patent number: 9570448Abstract: A method for manufacturing a semiconductor device includes forming a storage node hole passing through an upper support layer, a bowing prevention layer and an upper mold layer using a dry etching process, forming a lower electrode in the storage node hole, patterning the upper support layer and the bowing prevention layer to expose a portion of the upper mold layer, removing the upper mold layer and at least a portion of the bowing prevention layer using a first wet etching process, and sequentially forming a dielectric layer and an upper electrode that cover the lower electrode. An etch rate of the bowing prevention layer may be substantially equal to an etch rate of the upper support layer during the dry etching process. An etch rate of the bowing prevention layer may be higher than an etch rate of the upper support layer during the first wet etching process.Type: GrantFiled: June 24, 2016Date of Patent: February 14, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Youn-Seok Choi, Young-min Ko, Honggun Kim, Jongmyeong Lee, Byoungdeog Choi