Patents by Inventor Young Su Kim

Young Su Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130086426
    Abstract: The present invention relates to an exception handling test apparatus and method. The exception handling test apparatus includes a generation module configured to generate a modified device driver based on a defect model and information obtained from the device manager, a hooking module configured to hook the device driver using the modified device driver, a scanning module configured to collect test information returned from the hooked modified device driver to the application while the application operates, and an analysis module configured to analyze the collected test information.
    Type: Application
    Filed: May 9, 2011
    Publication date: April 4, 2013
    Applicants: KIA MOTORS CORPORATION, HYUNDAI MOTOR COMPANY
    Inventors: Byoung Ju Choi, Joo Young Seo, Sueng Wan Yang, Young Su Kim, Jung Suk Oh, Hae Young Kwon, Seung Yeun Jang
  • Patent number: 8318344
    Abstract: A negative electrode for a lithium battery includes an active material layer and a current collector. The active material layer has a plurality of crystal grains and the plurality of crystal grains include a plurality of pores. A first pore of the plurality of pores has a first length and a second length, the first length being the maximum length orthogonal to the current collector and the second length being the maximum length orthogonal to the first length, and the first length is greater than the second length.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: November 27, 2012
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Beom-Kwon Kim, Kyu-Nam Joo, Jae-Myung Kim, So-Ra Lee, Jong-Hee Lee, Young-Su Kim, Deok-Hyun Kim, Gu-Hyun Chung
  • Patent number: 8304282
    Abstract: A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: November 6, 2012
    Assignees: Samsung SDI Co., Ltd., Samsung Display Co., Ltd.
    Inventors: Young Su Kim, Sang Ho Kim
  • Publication number: 20120270365
    Abstract: A method for manufacturing a solar cell according to an exemplary embodiment includes: forming a first doping film on a substrate; patterning the first doping film so as to form a first doping film pattern and so as to expose a portion of the substrate; forming a diffusion prevention film on the first doping film pattern so as to cover the exposed portion of the substrate; etching the diffusion prevention film so as to form spacers on lateral surfaces of the first doping film pattern; forming a second doping film on the first doping film pattern so as to cover the spacer and exposed substrate; forming a first doping region on the substrate surface by diffusing an impurity from the first doping film pattern into the substrate; and forming a second doping region on the substrate surface by diffusing an impurity from the second doping film pattern into the substrate.
    Type: Application
    Filed: July 3, 2012
    Publication date: October 25, 2012
    Inventors: Young Su KIM, Doo-Youl LEE
  • Patent number: 8284349
    Abstract: A backlight unit includes a plurality of light emitting diodes as a light source; a board having a rectangular shape and including a plurality of metal lines each extending along a first direction, wherein the plurality of light emitting diodes are arranged on the board and respectively connected to the plurality of metal lines; a pad portion attached on a side, which is parallel to the first direction, of the board and including first to Nth pads respectively connected to the plurality of metal lines, wherein N is a positive integer; a driving circuit connected to the first to Nth pads and providing a driving signal into the plurality of light emitting diodes; and an optical member at a side of the light emitting diodes and for improving a light property.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: October 9, 2012
    Assignee: LG Display Co., Ltd.
    Inventors: Hyung-Seok Kim, Young-Su Kim
  • Patent number: 8269258
    Abstract: A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: September 18, 2012
    Assignees: Samsung SDI Co., Ltd., Samsung Electronics Co., Ltd.
    Inventors: Young Su Kim, Sang Ho Kim
  • Publication number: 20120220071
    Abstract: A screen mask has a mesh, a frame, and at least one emulsion pattern. The mesh includes a squeeze surface pressed by a squeegee, and a discharge surface discharging a paste. The frame fixes an edge of the mesh. The emulsion pattern is placed on the discharge surface and includes a main pattern, and an auxiliary pattern spaced apart from the main pattern.
    Type: Application
    Filed: November 17, 2011
    Publication date: August 30, 2012
    Inventors: Young-Su Kim, Doo-Youl Lee, Sung-Chul Lee
  • Patent number: 8222129
    Abstract: A method for manufacturing a solar cell according to an exemplary embodiment includes: forming a first doping film on a substrate; patterning the first doping film so as to form a first doping film pattern and so as to expose a portion of the substrate; forming a diffusion prevention film on the first doping film pattern so as to cover the exposed portion of the substrate; etching the diffusion prevention film so as to form spacers on lateral surfaces of the first doping film pattern; forming a second doping film on the first doping film pattern so as to cover the spacer and exposed substrate; forming a first doping region on the substrate surface by diffusing an impurity from the first doping film pattern into the substrate; and forming a second doping region on the substrate surface by diffusing an impurity from the second doping film pattern into the substrate.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: July 17, 2012
    Assignees: Samsung Electronics Co., Ltd., Samsung SDI Co., Ltd.
    Inventors: Young Su Kim, Doo-Youl Lee
  • Publication number: 20120177989
    Abstract: A negative active material composition includes a negative active material, a binder, and a solvent, in which the solvent includes an aqueous solvent and an organic solvent. A method of preparing a negative electrode plate uses the negative active material composition. A lithium battery is manufactured using the negative active material composition, and has good lifetime characteristics due to the formation of pores in the electrode plate.
    Type: Application
    Filed: May 16, 2011
    Publication date: July 12, 2012
    Inventors: Dong-Ho Son, Ki-Jun Kim, Ihn Kim, Young-Su Kim, Sam-Jin Park, Na-Ri Seo, Myoung-Sun Kim
  • Patent number: 8211738
    Abstract: Disclosed herein is a method of forming a light-absorbing layer of a polycrystalline silicon solar cell, including: forming a polycrystalline silicon layer on a back electrode; forming an intrinsic amorphous silicon layer on the polycrystalline silicon layer; and heat-treating the transparent insulating substrate to vertically crystallize the intrinsic amorphous silicon layer using the polycrystalline silicon layer as a seed for crystallization through a metal induced vertical crystallization (MIVC) process to form the intrinsic amorphous silicon layer into a light-absorbing layer made of polycrystalline silicon, and is a method of fabricating a high-efficiency polycrystalline silicon solar cell using the light-absorbing layer.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: July 3, 2012
    Assignee: SNU R&DB Foundation
    Inventors: Seung Ki Joo, Hyeong Suk Yoo, Young Su Kim
  • Patent number: 8211739
    Abstract: Disclosed herein is a polycrystalline silicon solar cell, including: a back electrode formed on a transparent insulating substrate; an N-type polycrystalline silicon layer in which amorphous silicon is crystallized through MIC process, and in which electrons are accumulated; a light-absorbing layer which is formed by vertically crystallizing an intrinsic amorphous silicon layer using the polycrystalline silicon layer as a seed for crystallization through MIVC process, in which pairs of electrons and holes are generated in response to incident light, and which has a vertical column grain structure in which grains are arranged in the direction in which electrons and holes move; a P-type polycrystalline silicon layer which has the vertical column grain structure, and in which holes are accumulated; a transparent electrode layer; front electrodes; and an antireflection coating film, and is a method of fabricating the same.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: July 3, 2012
    Assignee: SNU R&DB Foundation
    Inventors: Seung Ki Joo, Hyeong Suk Yoo, Young Su Kim, Nam Kyu Song
  • Publication number: 20120163416
    Abstract: A pulse generator of an ultra wideband (UWB) system includes: a plurality of delay cells for receiving pulses, delaying the received pulses for a predetermined time, and outputting the delayed pulses; and an edge combiner connected to output ends of the plurality of delay cells for receiving the delayed pulses from the plurality of delay cells, outputting fine pulses corresponding to the delayed time, and generating one impulse signal with the outputted fine pulses. The edge combiner includes a plurality of XOR gates for receiving a first delayed pulse and a second delayed pulse from an nth delay cell and an (n+1)th delay cell among the plurality of delay cells and generating fine pulses, respectively, and an OR gate for receiving a first fine pulse and a second fine pulse respectively output from a first XOR gate and a second XOR gate included in the plurality of XOR gates.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 28, 2012
    Applicants: UNIST Academy-Industry Research Corporation, Electronics and Telecommunications Research Institute
    Inventors: Jin Doo JEONG, Hyung Soo Lee, Sangsung Choi, Franklin Bien, Yun ho Choi, Young su Kim
  • Publication number: 20120162184
    Abstract: A method of driving a display panel includes applying a common voltage to the display panel, sensing a frequency of the display panel to generate a frequency signal, adjusting a gain of an operational amplifier based on the frequency signal, receiving a feedback common voltage from the display panel, and compensating the common voltage using an input resistor, the operational amplifier and a feedback resistor based on the feedback common voltage to apply the compensated common voltage to the display panel. The operational amplifier includes an inverting input terminal connected to the input resistor, a non-inverting input terminal to which a reference common voltage is applied and an output terminal. The feedback resistor is between the inverting input terminal and the output terminal.
    Type: Application
    Filed: August 15, 2011
    Publication date: June 28, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Su KIM, Jae-Hoon LEE, Chang-Ho LEE, Yu-Han BAE
  • Publication number: 20120139883
    Abstract: A gate drive circuit includes a shift register in which plural stages are cascade-connected to each other. In an n-th stage, a pull-up part outputs a high voltage of a clock signal to an output node as a high voltage of an n-th gate signal in response to a high voltage on a first node. A pull-down part pulls the high voltage of the n-th gate signal down to a first low voltage in response to an (n+1)th carry signal. A discharging part discharges the first node to a second low voltage level lower than the first low voltage level in response to the (n+1)th carry signal. A carry part outputs the high voltage of the clock signal as an n-th carry signal (mirroring the n-th gate signal) in response to a high voltage on the first node.
    Type: Application
    Filed: November 9, 2011
    Publication date: June 7, 2012
    Inventors: Jae-Hoon LEE, Young-Su KIM, Whee-Won LEE, Jun-Yong SONG, Yu-Han BAE, You-Mee HYUN
  • Publication number: 20120139598
    Abstract: A pulse generator is provided. The pulse generator includes: a time delayed pulse generation unit including a plurality of delay cells for receiving a first pulse having a first pulse width and outputting pulses delayed by a particular time delay value on the basis of one of a rising edge and a falling edge of the first pulse; an edge combiner configured to receive the plurality of time delayed pulses from the time delayed pulse generation unit and generate second pulses having a second pulse width; and a channel selector configured to regulate the number of outputs of the second pulses generated by the edge combiner.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 7, 2012
    Applicants: UNIST Academy-Industry Corporation, Electronics and Telecommunications Research Institute
    Inventors: Jae Hwan KIM, Hyung Soo LEE, Sang Sung CHOI, Kyeong Deok MOON, Yun Ho CHOI, Young Su KIM, Franklin BIEN
  • Patent number: 8180005
    Abstract: Provided are an apparatus and method for selecting an optimal signal using auxiliary equalization in a diversity receiver. The optimal signal selecting apparatus includes: a plurality of sync recovery units for extracting sync information from baseband signals, which are candidate signals, except a baseband signal selected as a current optimal signal a plurality of auxiliary equalizers for channel-equalizing the candidate signals based on the extracted sync information; a plurality of SNR measuring units for measuring signal-to-noise ratios (SNRs) of the candidate signals inputted to the auxiliary equalizers and the candidates signals equalized in the auxiliary equalizers; and an optimal signal selector for selecting an optimal candidate signal from the candidate signals by using the extracted sync information and the measured SNRs, and replacing the optimal signal with the optimal candidate signal when reception quality of the current optimal signal is poor.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: May 15, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ju-Yeun Kim, Young-Su Kim, Jae-Hwui Bae, Hyun Lee, Jong-Soo Lim, Soo-In Lee
  • Publication number: 20120114422
    Abstract: A mooring system for a vessel includes an attachment unit configured to be detachably attached to a hull of the vessel; a robot arm including a plurality of arms, the arms being coupled to each other to turn in a vertical direction, the robot, arm extending by an arm actuator provided thereto to transfer the attachment unit to an attachment position of the hull; a rotation unit connected to the robot arm and allowing the robot arm to turn in a horizontal direction; and a mooring winch for winding a mooring cable to draw the attachment unit. A floating body or a quay wall may include the mooring system.
    Type: Application
    Filed: December 16, 2010
    Publication date: May 10, 2012
    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Phill-Seung LEE, SoonHung Han, Hyun Chung, Yong-Yook Kim, Kook-Jin Choi, Sang-Il Kim, Young-Hee Cho, Young-Su Kim
  • Publication number: 20120107997
    Abstract: In a method of manufacturing a solar cell, a first dopant layer is formed on a lower surface of a substrate and a diffusion-preventing layer is formed on an upper surface of the substrate. Then, the first dopant layer is patterned to expose portions of the lower surface of the substrate, and a second dopant layer is formed on the exposed portion of the lower surface of the substrate. A third dopant layer is formed on the diffusion-preventing layer, and the substrate is heated to diffuse dopants from the first, second, and third dopant layers into the substrate, thereby forming semiconductor areas in the substrate.
    Type: Application
    Filed: September 21, 2011
    Publication date: May 3, 2012
    Inventors: Young-Jin KIM, Dong-Seop Kim, Doo-Youl Lee, Jun-Hyun Park, Sang-Ho Kim, Ju-Hyun Jeong, Young-Soo Kim, Chan-Bin Mo, Young-Su Kim, Myeong-Woo Kim, Sang-Joon Lee
  • Publication number: 20120094427
    Abstract: A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste.
    Type: Application
    Filed: December 22, 2011
    Publication date: April 19, 2012
    Inventors: Young Su Kim, Sang Ho Kim
  • Publication number: 20120094426
    Abstract: A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste.
    Type: Application
    Filed: December 22, 2011
    Publication date: April 19, 2012
    Inventors: Young Su Kim, Sang Ho Kim