Abstract: A driving apparatus for a display device includes: a signal controller that generates a pre-clock signal, a charge sharing control signal and a scanning start signal; a clock signal generator that generates a clock signal swinging between a first voltage and a second voltage based on the pre-clock signal and the charge sharing control signal; and a gate driver that generates gate signals based on the scanning start signal and the clock signal, where the clock signal generator includes: a voltage generator that generates a third voltage; and a clock generator that receives one of the first to third voltages in response to the pre-clock signal and the charge sharing control signal, and outputs an output signal based on the one of the first to third voltages as the clock signal, where the third voltage is lower than the first voltage and higher than the second voltage.

Abstract: The present invention relates to an exception handling test apparatus and method. The exception handling test apparatus includes a generation module configured to generate a modified device driver based on a defect model and information obtained from the device manager, a hooking module configured to hook the device driver using the modified device driver, a scanning module configured to collect test information returned from the hooked modified device driver to the application while the application operates, and an analysis module configured to analyze the collected test information.

Abstract: A negative electrode for a lithium battery includes an active material layer and a current collector. The active material layer has a plurality of crystal grains and the plurality of crystal grains include a plurality of pores. A first pore of the plurality of pores has a first length and a second length, the first length being the maximum length orthogonal to the current collector and the second length being the maximum length orthogonal to the first length, and the first length is greater than the second length.

Abstract: A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste.

Abstract: A method for manufacturing a solar cell according to an exemplary embodiment includes: forming a first doping film on a substrate; patterning the first doping film so as to form a first doping film pattern and so as to expose a portion of the substrate; forming a diffusion prevention film on the first doping film pattern so as to cover the exposed portion of the substrate; etching the diffusion prevention film so as to form spacers on lateral surfaces of the first doping film pattern; forming a second doping film on the first doping film pattern so as to cover the spacer and exposed substrate; forming a first doping region on the substrate surface by diffusing an impurity from the first doping film pattern into the substrate; and forming a second doping region on the substrate surface by diffusing an impurity from the second doping film pattern into the substrate.

Abstract: A backlight unit includes a plurality of light emitting diodes as a light source; a board having a rectangular shape and including a plurality of metal lines each extending along a first direction, wherein the plurality of light emitting diodes are arranged on the board and respectively connected to the plurality of metal lines; a pad portion attached on a side, which is parallel to the first direction, of the board and including first to Nth pads respectively connected to the plurality of metal lines, wherein N is a positive integer; a driving circuit connected to the first to Nth pads and providing a driving signal into the plurality of light emitting diodes; and an optical member at a side of the light emitting diodes and for improving a light property.

Abstract: A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste.

Abstract: A screen mask has a mesh, a frame, and at least one emulsion pattern. The mesh includes a squeeze surface pressed by a squeegee, and a discharge surface discharging a paste. The frame fixes an edge of the mesh. The emulsion pattern is placed on the discharge surface and includes a main pattern, and an auxiliary pattern spaced apart from the main pattern.

Abstract: A method for manufacturing a solar cell according to an exemplary embodiment includes: forming a first doping film on a substrate; patterning the first doping film so as to form a first doping film pattern and so as to expose a portion of the substrate; forming a diffusion prevention film on the first doping film pattern so as to cover the exposed portion of the substrate; etching the diffusion prevention film so as to form spacers on lateral surfaces of the first doping film pattern; forming a second doping film on the first doping film pattern so as to cover the spacer and exposed substrate; forming a first doping region on the substrate surface by diffusing an impurity from the first doping film pattern into the substrate; and forming a second doping region on the substrate surface by diffusing an impurity from the second doping film pattern into the substrate.

Abstract: A negative active material composition includes a negative active material, a binder, and a solvent, in which the solvent includes an aqueous solvent and an organic solvent. A method of preparing a negative electrode plate uses the negative active material composition. A lithium battery is manufactured using the negative active material composition, and has good lifetime characteristics due to the formation of pores in the electrode plate.

Abstract: Disclosed herein is a method of forming a light-absorbing layer of a polycrystalline silicon solar cell, including: forming a polycrystalline silicon layer on a back electrode; forming an intrinsic amorphous silicon layer on the polycrystalline silicon layer; and heat-treating the transparent insulating substrate to vertically crystallize the intrinsic amorphous silicon layer using the polycrystalline silicon layer as a seed for crystallization through a metal induced vertical crystallization (MIVC) process to form the intrinsic amorphous silicon layer into a light-absorbing layer made of polycrystalline silicon, and is a method of fabricating a high-efficiency polycrystalline silicon solar cell using the light-absorbing layer.

Abstract: Disclosed herein is a polycrystalline silicon solar cell, including: a back electrode formed on a transparent insulating substrate; an N-type polycrystalline silicon layer in which amorphous silicon is crystallized through MIC process, and in which electrons are accumulated; a light-absorbing layer which is formed by vertically crystallizing an intrinsic amorphous silicon layer using the polycrystalline silicon layer as a seed for crystallization through MIVC process, in which pairs of electrons and holes are generated in response to incident light, and which has a vertical column grain structure in which grains are arranged in the direction in which electrons and holes move; a P-type polycrystalline silicon layer which has the vertical column grain structure, and in which holes are accumulated; a transparent electrode layer; front electrodes; and an antireflection coating film, and is a method of fabricating the same.

Abstract: A pulse generator of an ultra wideband (UWB) system includes: a plurality of delay cells for receiving pulses, delaying the received pulses for a predetermined time, and outputting the delayed pulses; and an edge combiner connected to output ends of the plurality of delay cells for receiving the delayed pulses from the plurality of delay cells, outputting fine pulses corresponding to the delayed time, and generating one impulse signal with the outputted fine pulses. The edge combiner includes a plurality of XOR gates for receiving a first delayed pulse and a second delayed pulse from an nth delay cell and an (n+1)th delay cell among the plurality of delay cells and generating fine pulses, respectively, and an OR gate for receiving a first fine pulse and a second fine pulse respectively output from a first XOR gate and a second XOR gate included in the plurality of XOR gates.

Abstract: A method of driving a display panel includes applying a common voltage to the display panel, sensing a frequency of the display panel to generate a frequency signal, adjusting a gain of an operational amplifier based on the frequency signal, receiving a feedback common voltage from the display panel, and compensating the common voltage using an input resistor, the operational amplifier and a feedback resistor based on the feedback common voltage to apply the compensated common voltage to the display panel. The operational amplifier includes an inverting input terminal connected to the input resistor, a non-inverting input terminal to which a reference common voltage is applied and an output terminal. The feedback resistor is between the inverting input terminal and the output terminal.

Abstract: A gate drive circuit includes a shift register in which plural stages are cascade-connected to each other. In an n-th stage, a pull-up part outputs a high voltage of a clock signal to an output node as a high voltage of an n-th gate signal in response to a high voltage on a first node. A pull-down part pulls the high voltage of the n-th gate signal down to a first low voltage in response to an (n+1)th carry signal. A discharging part discharges the first node to a second low voltage level lower than the first low voltage level in response to the (n+1)th carry signal. A carry part outputs the high voltage of the clock signal as an n-th carry signal (mirroring the n-th gate signal) in response to a high voltage on the first node.

Abstract: A pulse generator is provided. The pulse generator includes: a time delayed pulse generation unit including a plurality of delay cells for receiving a first pulse having a first pulse width and outputting pulses delayed by a particular time delay value on the basis of one of a rising edge and a falling edge of the first pulse; an edge combiner configured to receive the plurality of time delayed pulses from the time delayed pulse generation unit and generate second pulses having a second pulse width; and a channel selector configured to regulate the number of outputs of the second pulses generated by the edge combiner.

Abstract: Provided are an apparatus and method for selecting an optimal signal using auxiliary equalization in a diversity receiver. The optimal signal selecting apparatus includes: a plurality of sync recovery units for extracting sync information from baseband signals, which are candidate signals, except a baseband signal selected as a current optimal signal a plurality of auxiliary equalizers for channel-equalizing the candidate signals based on the extracted sync information; a plurality of SNR measuring units for measuring signal-to-noise ratios (SNRs) of the candidate signals inputted to the auxiliary equalizers and the candidates signals equalized in the auxiliary equalizers; and an optimal signal selector for selecting an optimal candidate signal from the candidate signals by using the extracted sync information and the measured SNRs, and replacing the optimal signal with the optimal candidate signal when reception quality of the current optimal signal is poor.

Abstract: A mooring system for a vessel includes an attachment unit configured to be detachably attached to a hull of the vessel; a robot arm including a plurality of arms, the arms being coupled to each other to turn in a vertical direction, the robot, arm extending by an arm actuator provided thereto to transfer the attachment unit to an attachment position of the hull; a rotation unit connected to the robot arm and allowing the robot arm to turn in a horizontal direction; and a mooring winch for winding a mooring cable to draw the attachment unit. A floating body or a quay wall may include the mooring system.

Abstract: In a method of manufacturing a solar cell, a first dopant layer is formed on a lower surface of a substrate and a diffusion-preventing layer is formed on an upper surface of the substrate. Then, the first dopant layer is patterned to expose portions of the lower surface of the substrate, and a second dopant layer is formed on the exposed portion of the lower surface of the substrate. A third dopant layer is formed on the diffusion-preventing layer, and the substrate is heated to diffuse dopants from the first, second, and third dopant layers into the substrate, thereby forming semiconductor areas in the substrate.

Abstract: A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste.