Abstract: A plasma torch includes a rear torch unit and a front torch unit which are connected through an insulating body. The insulating body is made of an insulator, is injected with gas required to generate plasma, and includes an inflow chamber that may move the injected gas. The rear torch unit coupled with a rear side of the insulation body communicates with the inflow chamber and has a magnetic coil generating a magnetic field within a cavity of the rear electrode wound around an outer circumferential surface thereof. The front torch unit disposed at a front side of the insulating body so as to face the rear torch unit communicates with the inflow chamber of the insulating body and has the front electrode disposed therein. The front torch unit does not include a magnetic coil winding the front electrode, and thus may be easily detached from the insulating body.

Abstract: A gasification melting furnace includes a gasification part into which the combustible material inputs, a sedimentary part communicating with a lower part of the gasification part, and a melting part communicating with a lateral face of the sedimentary part and having a heater, wherein the sedimentary part is filled with the combustible material and a gas generated in the melting part passes through the combustible material and inputs into the gasification part, thereby stably and rapidly treating the combustible material, reducing energy consumption of the heater, and providing a synthetic gas containing decreased hazardous substances.

Abstract: An interleaved memory circuit includes a memory bank including at least one first memory cell for storing a charge representative of a first datum, the first memory cell being coupled with a first word line and a first bit line. The interleaved memory circuit further includes a local control circuit coupled with the memory bank. The interleaved memory circuit further includes a global control circuit coupled with the local control circuit, an interleaving access including a clock signal having a first cycle and a second cycle for accessing the first memory cell, where the second cycle is capable of enabling the local control circuit to trigger a first transition of a first read column select signal RSSL for accessing the first memory cell.

Abstract: In a method, a first edge of a first tracking signal in a first direction of a memory array is generated. A first edge of a second tracking signal in a second direction of the memory array is generated. A first edge of a write-timing control signal is generated based on a slower edge of the first edge the first tracking signal and of the first edge of the second tracking signal. The first edge of the write-timing control signal is used to generate a second edge of the second tracking signal.

Abstract: An apparatus and method for automatic update are provided. The method includes storing authentication information for data, including first and second data, receiving the first data from the device, performing an authentication of the first data using the authentication information, and determining whether to receive the data, including the first data and the second data, according to the authentication.

Abstract: A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

Abstract: The present invention relates to a fusion protein in which a myostatin mature protein is fused to a multimer of myostatin-derived antigenic peptide Myo-2, a surface expression vector containing a polynucleotide encoding the fusion protein, a recombinant microorganism transformed with the vector, and a feedstuff additive or a pharmaceutical composition containing the microorganism as an effective ingredient. The feedstuff additive or pharmaceutical composition according to the present invention can be used for muscle development and regulation of muscle growth in livestock and poultry, as well as for preventing and treating muscle-wasting diseases and degenerative diseases such as muscular dystrophy, muscular atrophy and the like. In addition, the transformed strain shows the same effect even if the strain itself after culture thereof is directly used, and thus it is very economical.

Abstract: The present invention relates to a laundry machine having a drying function for drying an object to be dried, especially clothes. The laundry machine according to one embodiment of the present invention may be a circulating drying machine that supplies the hot air to an object to be dried, so as to remove water, and then condenses the water from the hot air and heats the condensed water to supply the heat to the object to be dried. At this time, condensing may be carried out using natural convection.

Abstract: A control system of a vehicle according to an exemplary embodiment of the present invention may include an input portion for inputting an order for generating an virtual avatar of a driver, an image detection portion that detects an outside image of the driver according to the order that is input by the input portion, an avatar generating portion that transforms the image of the real driver into the virtual avatar, and an integrated control portion that controls a driver seat, a steering device, a side view mirror, or a rear view mirror according to the shape of the virtual avatar.

Abstract: An apparatus and a method for searching for a radio frequency in a radio receiver are provided. A received broadcast signal is analyzed to determine if it has an abnormal waveform. If the abnormal waveform is detected, a fundamental radio frequency corresponding to the abnormal waveform is detected. The user of the radio receiver may then tune to the detected fundamental radio frequency. The abnormal waveform may have been transmitted by another radio receiver and serve as an indication of the radio frequency to which the other radio receiver is currently tuned. Thus, embodiments of the present invention serve as a way to share radio information among different radio receivers. The abnormal signal may have been derived from the radio frequency signal to which the other radio receiver was tuned. The abnormal waveform may be a clipped version of the original radio signal.

Abstract: A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

Abstract: A method for displaying contents based on seamless information is provided. The method includes receiving display history information of multimedia contents, including stop information indicating a stop location in the multimedia contents, from one of a plurality of devices, generating seamless information about the multimedia contents based on the display history information of the multimedia contents, and transmitting the generated seamless information to one or more of the plurality of devices, where the devices that received the transmitted seamless information store the seamless information and one of the devices displays the multimedia contents based on the stored seamless information.

Abstract: The present invention relates to an apparatus and a method for melting incineration ash generated in an incinerator using a steam plasma torch which is capable of minimizing secondary pollutants and collecting calcium chloride from the melt. An exemplary embodiment of the present invention provides a method for treating incineration ash, including: generating a melt by melting the incineration ash comprising fly ash and bottom ash using a steam plasma torch; cooling the melt using water to dissolve molten salt included in the melt in the water and vitrify slag included in the melt; and collecting calcium chloride from the water in which the molten salt is dissolved.

Abstract: A memory array comprises a plurality of memory cells arranged in a plurality of rows and a plurality of columns. A column of the plurality of columns includes a first power supply node configured to provide a first voltage, a second power supply node configured to provide a second voltage, and a plurality of internal supply nodes electrically coupled together and configured to receive the first voltage or the second voltage for a plurality of memory cells in the column and a plurality of internal ground nodes. The internal ground nodes are electrically coupled together and configured to provide at least two current paths for the plurality of memory cells in the column.

Abstract: A memory circuit includes at least one memory cell for storing a charge representative of a datum. The memory cell is coupled with a word line and a first bit line. At least one bit line equalization transistor is coupled between the first bit line and a second bit line. A bit line equalization circuit is coupled with the bit line equalization transistor. The bit line equalization circuit is configured for providing a pulse to the bit line equalization transistor to substantially equalize voltages of the first bit line and the second bit line during a standby period before an access cycle of the memory cell.

Abstract: A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

Abstract: A memory has a tracking circuit for a read tracking operation. The memory includes a memory bit cell array, a tracking column, a tracking row, a sense amplifier row coupled to the memory bit cell array and the tracking row, and a sense amplifier enable logic. The memory further includes a tracking bit line coupled to the tracking column and the sense amplifier enable logic, and a tracking word line coupled to the tracking row and the sense amplifier enable logic. The tracking circuit is configured to track a column time delay along the tracking column before a row time delay along the tracking row.

Abstract: A circuit includes a first node; a second node; a first PMOS transistor having a source coupled to the first node, a drain coupled to a first control transistor, and a gate driven by a first voltage; and a first NMOS transistor having a source coupled to the second node, a drain coupled to the first control transistor, and a gate driven by a second voltage. The first PMOS transistor is configured to automatically turn off based on the first voltage and a first node voltage at the first node. The first NMOS transistor is configured to automatically turn off based on the second voltage and a second node voltage at the second node. When the first PMOS transistor, the control transistor, and the first NMOS transistor are on, the first node voltage is lowered while the second voltage is raised.

Abstract: An interleaved memory circuit includes a memory bank including at least one first memory cell for storing a charge representative of a first datum, the first memory cell being coupled with a first word line and a first bit line. The interleaved memory circuit further includes a local control circuit coupled with the memory bank. The interleaved memory circuit further includes a global control circuit coupled with the local control circuit, an interleaving access including a clock signal having a first cycle and a second cycle for accessing the first memory cell, where the second cycle is capable of enabling the local control circuit to trigger a first transition of a first read column select signal RSSL for accessing the first memory cell.

Abstract: A method for fabricating a semiconductor device to which a stress technique is applied and in which a leakage current caused by silicidation can be suppressed. The method includes forming an isolation region in a semiconductor substrate; forming a gate electrode over an element region defined by the isolation region formed in the semiconductor substrate; and forming a semiconductor lager in the element region at both sides of the gate electrode apart from at least part of the isolation region. By doing so, the formation of a spike near the isolation region is suppressed even if a silicide layer is formed. Accordingly, a leakage current caused by such a spike can be suppressed.