Patents by Inventor Yousuke Hagiwara

Yousuke Hagiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160065199
    Abstract: An amplitude detector includes a first amplitude detection transistor and an output terminal. The first amplitude detection transistor receives a first signal by a gate and a second signal that forms a differential pair with the first signal by a drain, and detects an amplitude of the differential pair. The output terminal outputs an amplitude signal in accordance with amplitude detected by the first amplitude detection transistor.
    Type: Application
    Filed: March 1, 2015
    Publication date: March 3, 2016
    Inventor: Yousuke HAGIWARA
  • Patent number: 8849219
    Abstract: In general, according to one embodiment, a DA converter configured to convert a digital signal comprising n (n>1) bits to an analog current to output the analog current from an output terminal, includes n voltage-current converters. Each of them corresponds to each bit of the digital signal and is configured to generate a current depending on the corresponding bit. A k-th (k is an integer of 0 to n?1) voltage-current converter includes a first transistor whose threshold voltage is adjustable. The first transistor includes a semiconductor substrate, a first diffusion region, a second diffusion region, an insulating film, a charge accumulating film, and a gate.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: September 30, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Deguchi, Shouhei Kousai, Yousuke Hagiwara, Masamichi Suzuki, Atsuhiro Kinoshita, Takao Marukame
  • Publication number: 20130252559
    Abstract: In general, according to one embodiment, a DA converter configured to convert a digital signal comprising n (n>1) bits to an analog current to output the analog current from an output terminal, includes n voltage-current converters. Each of them corresponds to each bit of the digital signal and is configured to generate a current depending on the corresponding bit. A k-th (k is an integer of 0 to n?1) voltage-current converter includes a first transistor whose threshold voltage is adjustable. The first transistor includes a semiconductor substrate, a first diffusion region, a second diffusion region, an insulating film, a charge accumulating film, and a gate.
    Type: Application
    Filed: August 30, 2012
    Publication date: September 26, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jun DEGUCHI, Shouhei Kousai, Yousuke Hagiwara, Masamichi Suzuki, Atsuhiro Kinoshita, Takao Marukame
  • Patent number: 7969237
    Abstract: A semiconductor integrated circuit device includes at least one first transistor configured to control conductance between an input power line and an output power line, at least one second transistor configured to control conductance between the input power line and the output power line, a first buffer configured to supply a first control signal for driving the at least one first transistor to a first control line connected to the at least one first transistor, a second buffer configured to generate a second control signal for driving the at least one second transistor upon receipt of the first control signal supplied through the first control line and supply the second control signal to a second control line connected to the at least one second transistor, and at least one capacitor connected between the first control line and the output power line.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: June 28, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuya Fujita, Yousuke Hagiwara
  • Publication number: 20100259316
    Abstract: A semiconductor integrated circuit device includes at least one first transistor configured to control conductance between an input power line and an output power line, at least one second transistor configured to control conductance between the input power line and the output power line, a first buffer configured to supply a first control signal for driving the at least one first transistor to a first control line connected to the at least one first transistor, a second buffer configured to generate a second control signal for driving the at least one second transistor upon receipt of the first control signal supplied through the first control line and supply the second control signal to a second control line connected to the at least one second transistor, and at least one capacitor connected between the first control line and the output power line.
    Type: Application
    Filed: November 23, 2009
    Publication date: October 14, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tetsuya Fujita, Yousuke Hagiwara