Abstract: In a photoelectric conversion device, in a first period in which a respective different offset voltage is supplied to a comparator included in each of a plurality of AD conversion circuits, a control unit performs control to bring the offset voltage into a first driving state in which a voltage change amount per unit time of the offset voltage is a first voltage amount, and, in a second period in which a ramp signal is supplied to the comparator included in each of the plurality of AD conversion circuits, the control unit performs control to bring the ramp signal into a second driving state in which a voltage change amount per unit time of the ramp signal is a second voltage amount, wherein the first voltage amount is larger the second voltage amount.

Abstract: The photoelectric conversion device includes a plurality of pixels arranged to form a plurality of rows and a plurality of columns, wherein each of the plurality of pixels includes a photoelectric conversion unit, a plurality of output lines, wherein at least two of the plurality of output lines are arranged in each of the plurality of columns and each of the plurality of output lines is connected to a pixel of a corresponding column, a scanning circuit configured to sequentially select plural rows that are a part of the plurality of rows, and a selection circuit that includes an input unit to which a control signal different from a control signal input to the scanning circuit is input and is configured to select a row that is the other part of the plurality of rows.

Abstract: A photoelectric conversion device includes a first substrate and a second substrate. A plurality of photoelectric conversion circuits is disposed on the first substrate. A plurality of floating diffusion circuits, a first switch, and a plurality of amplification transistors are disposed on the second substrate. The plurality of floating diffusion circuits is connected to the plurality of photoelectric conversion circuits. The first switch is configured to connect a first floating diffusion circuit and a second floating diffusion circuit in the plurality of floating diffusion circuits. The plurality of amplification transistors is configured to output signals based on potentials of the plurality of floating diffusion circuits.

Abstract: Since a failure related to an output from a sensor is not detected from an image signal and a failure of the sensor is not detected from an output from the sensor in a system including the sensor for abnormality detection, it is not possible to perform the abnormality detection and to indicate the abnormality to the outside of the system. An apparatus includes a pixel area including multiple pixels, multiple sensors, a processing unit that compares signals based on outputs from the multiple sensors with each other, an output unit that outputs information based on a result of comparison.

Abstract: A photoelectric conversion device includes a pixel array having aperture pixels arranged so as to form rows and columns, signal lines arranged in the pixel array so as to allow readout of signals from the aperture pixels, current sources connected to the signal lines, a first voltage supply line configured to supply a first reference voltage to the aperture pixels, a first pad connected to the first voltage supply line, a bias circuit configured to supply a bias voltage to the current sources, a second voltage supply line electrically separated from the first voltage supply line, and configured to supply a second reference voltage to the bias circuit, and a second pad connected to the second voltage supply line.

Abstract: A photoelectric conversion device includes pixels each including a plurality of photoelectric conversion elements and arranged in a matrix, and a control circuit that controls the pixels on row-by-row. Each pixel may output a first signal corresponding to charge generated by the first photoelectric conversion element and a second signal corresponding to charge generated by the first and second photoelectric conversion elements. The control circuit performs a first reset operation and a first readout operation for reading out the second signal on pixels in a first row, and performs a second reset operation, a second readout operation for reading out the first signal, and a third readout operation for reading out the second signal on pixels in a second row. The control circuit performs a third reset operation on pixels of any one of rows in a period one before a period during which the second reset operation is performed.

Abstract: An image capturing apparatus includes a plurality of pixels, a signal line connected to the plurality of pixels, and a limiter circuit configured to limit an amplitude of the signal at the signal line. A first pixel in the plurality of pixels sequentially outputs a noise signal, a focus detection signal, and an image capturing signal to the signal line. A second pixel in the plurality of pixels sequentially outputs a noise signal and an image capturing signal to the signal line, and wherein a potential of the signal at the signal line is set to a potential by the limiter circuit during a period after the second pixel outputs the noise signal and before the second pixel outputs the image capturing signal.

Abstract: An analog-to-digital conversion circuit includes a comparator circuit configured to perform processing of comparison between an analog signal and a ramp signal, and a counter configured to perform count processing in parallel with the comparison processing by the comparator circuit. The analog-to-digital conversion circuit acquires digital data, which is a count value corresponding to the comparison processing, and subjects the analog signal to analog-to-digital conversion. A period from the start to the end of the analog-to-digital conversion of the one analog signal includes a first period and a second period following the first period. The first and the second periods are switched based on an output of the counter. The count processing is performed at a high speed during the first period and performed at a low speed during the second period.

Abstract: A photoelectric converter includes pixels, vertical output lines to which a signal is outputted from the pixels, clippers configured to limit a potential of the output lines and a controller. Each of the clippers includes a first circuit configured to output an amplification signal according to a predetermined potential and the potential of the output line and a second circuit configured to supply a current according to the amplification signal to the output line. The controller controls each of the clippers to a state selected from states including a first state in which a range in which the potential of the output line can change is limited using the first and second circuits, and a second state in which the range in which the potential of the vertical output line can change is limited with an output of the second circuit deactivated.

Abstract: Since a failure related to an output from a sensor is not detected from an image signal and a failure of the sensor is not detected from an output from the sensor in a system including the sensor for abnormality detection, it is not possible to perform the abnormality detection and to indicate the abnormality to the outside of the system. An apparatus includes a pixel area including multiple pixels, multiple sensors, a processing unit that compares signals based on outputs from the multiple sensors with each other, an output unit that outputs information based on a result of comparison.

Abstract: A photoelectric conversion apparatus includes a photoelectric conversion region provided with a plurality of photoelectric conversion units, a signal processing unit configured to process an output signal from the plurality of photoelectric conversion units, and a processing unit configured to perform processing based on a learned model on data processed by the signal processing unit. The photoelectric conversion apparatus also includes a first pad connected to the processing unit and a second pad connected to the signal processing unit.

Abstract: An image capturing apparatus includes a plurality of pixels, a signal line connected to the plurality of pixels, and a limiter circuit configured to limit an amplitude of the signal at the signal line. A first pixel in the plurality of pixels sequentially outputs a noise signal, a focus detection signal, and an image capturing signal to the signal line. A second pixel in the plurality of pixels sequentially outputs a noise signal and an image capturing signal to the signal line, and wherein a potential of the signal at the signal line is set to a potential by the limiter circuit during a period after the second pixel outputs the noise signal and before the second pixel outputs the image capturing signal.

Abstract: An analog-to-digital conversion circuit includes a comparator circuit configured to perform processing of comparison between an analog signal and a ramp signal, and a counter configured to perform count processing in parallel with the comparison processing by the comparator circuit. The analog-to-digital conversion circuit acquires digital data, which is a count value corresponding to the comparison processing, and subjects the analog signal to analog-to-digital conversion. A period from the start to the end of the analog-to-digital conversion of the one analog signal includes a first period and a second period following the first period. The first and the second periods are switched based on an output of the counter. The count processing is performed at a high speed during the first period and performed at a low speed during the second period.

Abstract: A unit circuit includes a photoelectric conversion element, an output transistor including an input node and configured to output a signal based on a charge from the photoelectric conversion element, a reset transistor, and a first transistor connected to the input node and configured to change a capacitance of the input node. A first control signal supplied to a gate electrode of the first transistor has at least three types of voltages.

Abstract: A photoelectric converter includes pixels, vertical output lines to which a signal is outputted from the pixels, clippers configured to limit a potential of the output lines and a controller. Each of the clippers includes a first circuit configured to output an amplification signal according to a predetermined potential and the potential of the output line and a second circuit configured to supply a current according to the amplification signal to the output line. The controller controls each of the clippers to a state selected from states including a first state in which a range in which the potential of the output line can change is limited using the first and second circuits, and a second state in which the range in which the potential of the vertical output line can change is limited with an output of the second circuit deactivated.

Abstract: A unit circuit includes a photoelectric conversion element, an output transistor including an input node and configured to output a signal based on a charge from the photoelectric conversion element, a reset transistor, and a first transistor connected to the input node and configured to change a capacitance of the input node. A first control signal supplied to a gate electrode of the first transistor has at least three types of voltages.

Abstract: Disclosed embodiments perform readout at a high rate without being affected by transition of pixel transistors. A solid state imaging device of an embodiment has a pixel having a photoelectric conversion unit that generates charges, an amplification transistor including an input node that receives a signal based on the charges generated in the photoelectric conversion unit, and a reset transistor that resets the potential of the input node of the amplification transistor; a signal processing circuit that reads out a signal from the pixel via a signal line; and a switch provided between the signal line and an input node of the signal processing circuit, and a signal value of a control signal applied to the gate of the reset transistor changes while the switch is in the off-state.

Abstract: Disclosed embodiments perform readout at a high rate without being affected by transition of pixel transistors. A solid state imaging device of an embodiment has a pixel having a photoelectric conversion unit that generates charges, an amplification transistor including an input node that receives a signal based on the charges generated in the photoelectric conversion unit, and a reset transistor that resets the potential of the input node of the amplification transistor; a signal processing circuit that reads out a signal from the pixel via a signal line; and a switch provided between the signal line and an input node of the signal processing circuit, and a signal value of a control signal applied to the gate of the reset transistor changes while the switch is in the off-state.

Abstract: A unit circuit includes a photoelectric conversion element, an output transistor including an input node and configured to output a signal based on a charge from the photoelectric conversion element, a reset transistor, and a first transistor connected to the input node and configured to change a capacitance of the input node. A first control signal supplied to a gate electrode of the first transistor has at least three types of voltages.

Abstract: A solid-state imaging device includes pixels forming pixel rows, and a scanning circuit that performs a reset operation of a photoelectric converter and a readout operation of a pixel signal based on charges generated by the photoelectric converter including charge transfer from the photoelectric converter to the holding unit. The pixel rows include imaging rows and focus detection rows. The scanning circuit performs an image capture scan of the imaging rows and a focus detection scan of the focus detection rows, independently, such that signals of the focus detection rows are output after signals from the imaging rows. The scanning circuit performs the focus detection scan such that the reset operation on the focus detection row does not overlap with a charge transfer period on an imaging row belonging to a unit pixel row neighboring a unit pixel row to which a focus detection row under the reset operation belongs.