Patents by Inventor Yu-Chen Hsu

Yu-Chen Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10366971
    Abstract: A structure includes a first package component, and a second package component over and bonded to the first package component. A supporting material is disposed in a gap between the first package component and the second package component. A molding material is disposed in the gap and encircling the supporting material.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: July 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chen Hsu, Yu-Feng Chen, Han-Ping Pu, Meng-Tse Chen, Guan-Yu Chen
  • Publication number: 20190212368
    Abstract: A probe card includes a space transformer, a printed circuit board and a plurality of welding elements. The space transformer is disposed with a plurality of first conductive protrusions. Each of the first conductive protrusions has a first end surface. The printed circuit board is disposed with a plurality of second conductive protrusions. Each of the second conductive protrusions has a second end surface. The welding elements are respectively and electrically connected between each of the second end surfaces and the corresponding first end surface. A first surface of the space transformer away from the printed circuit board has a first degree of flatness. A second surface of the printed circuit board away from the space transformer has a second degree of flatness. The first degree of flatness is less than the second degree of flatness.
    Type: Application
    Filed: January 4, 2019
    Publication date: July 11, 2019
    Inventors: Hsien-Ta HSU, Yu-Chen HSU, Ching-Hua WU, Kuan-Chun CHOU, Horng-Kuang FAN
  • Patent number: 10290919
    Abstract: An electronic device is provided, including a display module, an input module, a hinge module, and an antenna. The hinge module connects the display module and the input module and has a first side and an opposite second side. The antenna is disposed in the hinge module and is situated on the first side. When the display module is rotated with respect to the input module, the hinge module forces the antenna to move from the first side to the second side.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: May 14, 2019
    Assignee: WISTRON CORP.
    Inventors: Yu Chen Hsu, Ching Pin Hsu, Chien An Chou
  • Publication number: 20190006736
    Abstract: An electronic device is provided, including a display module, an input module, a hinge module, and an antenna. The hinge module connects the display module and the input module and has a first side and an opposite second side. The antenna is disposed in the hinge module and is situated on the first side. When the display module is rotated with respect to the input module, the hinge module forces the antenna to move from the first side to the second side.
    Type: Application
    Filed: September 29, 2017
    Publication date: January 3, 2019
    Inventors: Yu Chen Hsu, Ching Pin Hsu, Chien An Chou
  • Publication number: 20180267083
    Abstract: A microelectromechanical probe has tail, head and body portions, and includes a pinpoint layer having a planarized top surface where a structural layer having first and second sides, a cutting face and a front terminal surface adjoining the first and second sides is disposed. The cutting face descends from the top surface of the structural layer toward the pinpoint layer to the front terminal surface. The front terminal surface extends from a front end of the cutting face to the top surface of the pinpoint layer. The pinpoint layer has a pinpoint protruding over the front terminal surface and located at the head portion. Within the head portion, the pinpoint layer is greater in hardness and less in electrical conductivity than the structural layer. The probe makes small probing marks, is highly recognizable in an automatic pinpoint recognition process, and can be conveniently installed.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 20, 2018
    Inventors: Shao-Lun WEI, Yu-Chen HSU, Mao-Fa SHEN, Neng-Hsuan KUO, Chien-Yu LIN, Ching-Kai CHU
  • Publication number: 20180024163
    Abstract: A method of making a cantilever MEMS probe module includes the steps of forming a cantilever MEMS probe on a first surface of a circuit substrate by a MEMS fabrication process in a way that the cantilever MEMS probe has a support post electrically and mechanically connected with an electric contact of the first surface, a cantilever arm connected with the support post, and a needle connected with the cantilever arm, and forming a through hole penetrating through the first surface and a second surface opposite to the first surface of the circuit substrate and corresponding in position to the needle and a part of the cantilever arm by using a cutting tool to cut the circuit substrate from the second surface toward the first surface of the circuit substrate. A probe module made by the method is disclosed too.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 25, 2018
    Inventors: YU-CHEN HSU, YU-WEN WANG, HORNG-KUANG FAN, MAO-FA SHEN
  • Patent number: 9780046
    Abstract: An embodiment device includes a semiconductor substrate and an interconnect structure over the semiconductor substrate. The interconnect structure includes a functional circuit region and a first portion of a seal ring spaced apart from the functional circuit region by a buffer zone. The device also includes a passivation layer over the interconnect structure and a second portion of the seal ring over the passivation layer and connected the first portion of the seal ring. The second portion of the seal ring is disposed in the buffer zone.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: October 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Yu Pan, Han-Ping Pu, Pei-Haw Tsao, Yu-Chen Hsu
  • Publication number: 20170176497
    Abstract: A microelectromechanical probe is manufactured by a MEMS manufacturing process forming a probe body and a cutting process providing a pinpoint portion a cutting face. The probe has a top surface, a body portion, and a pinpoint portion extended in a probing direction from the body portion and provided with first and second sides and a probing end oriented in the probing direction. The cutting face is provided on the top surface, adjoins the first and second sides and the probing end, and has at least one cut mark formed by the cutting process, extended from the first side to the second side and non-parallel to the probing direction. The cutting face descends from an edge cut mark to the probing end.
    Type: Application
    Filed: December 15, 2016
    Publication date: June 22, 2017
    Inventors: Shao-Lun WEI, Yu-Chen HSU, Mao-Fa SHEN, Chih-Hao HSU
  • Patent number: 9673184
    Abstract: A package includes a first package component having a top surface, a second package component bonded to the top surface of the first package component, and a plurality of electrical connectors at the top surface of the first package component. A molding material is over the first package component and molding the second package component therein. The molding material includes a first portion overlapping the second package component, wherein the first portion includes a first top surface, and a second portion encircling the first portion and molding bottom portions of the plurality of electrical connectors therein. The second portion has a second top surface lower than the first top surface.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: June 6, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chen Hsu, Chun-Hung Lin, Yu-Feng Chen, Han-Ping Pu
  • Publication number: 20170141052
    Abstract: An embodiment device includes a semiconductor substrate and an interconnect structure over the semiconductor substrate. The interconnect structure includes a functional circuit region and a first portion of a seal ring spaced apart from the functional circuit region by a buffer zone. The device also includes a passivation layer over the interconnect structure and a second portion of the seal ring over the passivation layer and connected the first portion of the seal ring. The second portion of the seal ring is disposed in the buffer zone.
    Type: Application
    Filed: November 13, 2015
    Publication date: May 18, 2017
    Inventors: Hsin-Yu Pan, Han-Ping Pu, Pei-Haw Tsao, Yu-Chen Hsu
  • Publication number: 20160172348
    Abstract: A structure includes a first package component, and a second package component over and bonded to the first package component. A supporting material is disposed in a gap between the first package component and the second package component. A molding material is disposed in the gap and encircling the supporting material.
    Type: Application
    Filed: February 19, 2016
    Publication date: June 16, 2016
    Inventors: Yu-Chen Hsu, Yu-Feng Chen, Han-Ping Pu, Meng-Tse Chen, Guan-Yu Chen
  • Publication number: 20160155733
    Abstract: A method comprises depositing a protection layer over a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.
    Type: Application
    Filed: February 8, 2016
    Publication date: June 2, 2016
    Inventors: Yao-Chun Chuang, Yu-Chen Hsu, Hao-Juin Liu, Chita Chuang, Chen-Cheng Kuo, Chen-Shien Chen
  • Patent number: 9293404
    Abstract: A structure includes a first package component, and a second package component over and bonded to the first package component. A supporting material is disposed in a gap between the first package component and the second package component. A molding material is disposed in the gap and encircling the supporting material.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: March 22, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chen Hsu, Yu-Feng Chen, Han-Ping Pu, Meng-Tse Chen, Guan-Yu Chen
  • Patent number: 9257412
    Abstract: A structure comprises a plurality of connectors formed on a top surface of a first semiconductor die, a second semiconductor die formed on the first semiconductor die and coupled to the first semiconductor die through the plurality of connectors and a first dummy conductive plane formed between an edge of the first semiconductor die and the plurality of connectors, wherein an edge of the first dummy conductive plane and a first distance to neutral point (DNP) direction form a first angle, and wherein the first angle is less than or equal to 45 degrees.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: February 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Chun Chuang, Yu-Chen Hsu, Hao-Juin Liu, Chita Chuang, Chen-Cheng Kuo, Chen-Shien Chen
  • Publication number: 20150355235
    Abstract: A probe for a probe head having lower and upper dies includes a main portion, a conductive portion stacked on at least a part of the main portion, an attachment layer covering the main portion and the conductive portion, a skin effect layer covering the attachment layer, and a stopping portion for being abutted against the lower or upper die. The main portion includes a first material. The conductive portion includes a second material. The skin effect layer includes a third material. The electrical conductivity of the third material is greater than that of the second material. The electrical conductivity of the second material is greater than that of the first material. The hardness of the first material is greater than that of the second material, and also greater than that of the third material.
    Type: Application
    Filed: June 5, 2015
    Publication date: December 10, 2015
    Inventors: Yu-Chen HSU, Shao-Lun WEI, Horng-Kuang FAN
  • Patent number: 9053990
    Abstract: The disclosure is directed to a device and method for manufacture thereof. The device includes a first workpiece bonded to a second workpiece by a bump interconnection structure. The bump interconnection structure allows for optimized packaging assembly yield and bond integrity.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: June 9, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chita Chuang, Yao-Chun Chuang, Yu-Chen Hsu, Ming Hung Tseng, Chen-Shien Chen
  • Publication number: 20150147847
    Abstract: A package includes a first package component having a top surface, a second package component bonded to the top surface of the first package component, and a plurality of electrical connectors at the top surface of the first package component. A molding material is over the first package component and molding the second package component therein. The molding material includes a first portion overlapping the second package component, wherein the first portion includes a first top surface, and a second portion encircling the first portion and molding bottom portions of the plurality of electrical connectors therein. The second portion has a second top surface lower than the first top surface.
    Type: Application
    Filed: January 29, 2015
    Publication date: May 28, 2015
    Inventors: Yu-Chen Hsu, Chun-Hung Lin, Yu-Feng Chen, Han-Ping Pu
  • Patent number: 8970024
    Abstract: A package includes a first package component having a top surface, a second package component bonded to the top surface of the first package component, and a plurality of electrical connectors at the top surface of the first package component. A molding material is over the first package component and molding the second package component therein. The molding material includes a first portion overlapping the second package component, wherein the first portion includes a first top surface, and a second portion encircling the first portion and molding bottom portions of the plurality of electrical connectors therein. The second portion has a second top surface lower than the first top surface.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: March 3, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chen Hsu, Chun-Hung Lin, Yu-Feng Chen, Han-Ping Pu
  • Publication number: 20140264810
    Abstract: A package includes a first package component having a top surface, a second package component bonded to the top surface of the first package component, and a plurality of electrical connectors at the top surface of the first package component. A molding material is over the first package component and molding the second package component therein. The molding material includes a first portion overlapping the second package component, wherein the first portion includes a first top surface, and a second portion encircling the first portion and molding bottom portions of the plurality of electrical connectors therein. The second portion has a second top surface lower than the first top surface.
    Type: Application
    Filed: May 30, 2013
    Publication date: September 18, 2014
    Inventors: Yu-Chen Hsu, Chun-Hung Lin, Yu-Feng Chen, Han-Ping Pu
  • Patent number: 8797255
    Abstract: An electronic-ink display panel including an active matrix substrate, a front plane laminate and an electronic-ink layer is provided. The active matrix substrate has multiple pixel units. Each pixel unit includes multiple sub-pixel units, and each sub-pixel unit has a storage capacitor. In the same pixel unit, the capacitance of the storage capacitor of at least one sub-pixel unit is different from those of the storage capacitors of the other sub-pixel units. The front plane laminate is disposed above the active matrix substrate and the electronic-ink layer is disposed between the active matrix substrate and the front plane laminate.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: August 5, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Yu-Chen Hsu, Chi-Ming Wu