Abstract: In an embodiment, a device includes: a lower source/drain region; an upper source/drain region; a nanostructure between the upper source/drain region and the lower source/drain region; a gate structure extending into a sidewall of the nanostructure, the gate structure including a gate dielectric and a gate electrode, an outer sidewall of the gate electrode being aligned with an outer sidewall of the gate dielectric; and a gate contact adjacent the gate structure, the gate contact extending along the outer sidewall of the gate electrode and the outer sidewall of the gate dielectric.

Abstract: The present disclosure relates to a semiconductor memory device and a fabricating method thereof, and the semiconductor memory device includes a substrate, bit lines, plugs and a spacer structure. The bit lines are separately disposed on the substrate, and the plugs are also disposed on the substrate to alternately arrange with the bit lines. The spacer structure is disposed on the substrate, between each of the bit lines and each of the plugs. The spacer structure includes a first air gap layer, a first spacer and a second air gap layer, and the first air gap layer, the first spacer and the second air gap layer are sequentially stacked between sidewalls of the bit lines and the plugs. Therefore, two air gap layers may be formed between the bit lines and the storage node contacts to improve the delay between the resistor and the capacitor.

Abstract: A device includes a substrate, a first fin, a second fin, a first isolation structure, a second isolation structure, and a gate structure. The first fin extends from a p-type region of the substrate. The second fin extends from an n-type region of the substrate. The first isolation structure is over the p-type region and adjacent to the first fin. The first isolation structure has a bottom surface and opposite first and second sidewalls connected to the bottom surface, a first round corner is between the bottom surface and the first sidewall of the first isolation structure, and the first sidewall is substantially parallel to the second sidewall. The second isolation structure is over the n-type region and adjacent to the first fin. The first isolation structure is deeper than the second isolation structure. The gate structure is over the first isolation structure and covering the first fin.

Abstract: An electronic system includes a display device, a first host and a second host. The display device includes a network interface port for connecting to an external network, a first port, a second port, a control unit for recording information associated with a designated network bridge target, and a hub unit for controlling the signal transmission between the network interface port, the first port, the second port and the control unit. The first host is coupled to the first port and configured to activate network bridge function when set as the designated network bridge target, thereby connecting to the external network. The second host is coupled to the second port and configured to connect to the external network using the network bridge function via the second port, the hub unit and the first port.

Abstract: A non-volatile memory and an operating method thereof are provided. The non-volatile memory includes a memory array and a controller. Each main memory cell string, a first judgment memory cell string, and a second judgment memory cell string of the memory array respectively includes a plurality of main memory cells, a plurality of first judgment memory cells and a plurality of second judgment memory cells. During a programming operation, the controller determines, according to a data level of each main memory cell, a data level of the corresponding first judgment memory cell, determines, according to data levels of each first judgment memory cell and its preceding first judgment memory cell, a data level of the 10 corresponding second judgment memory cell, and accordingly determines whether to perform a pre-programming operation during an erasing operation.

Abstract: A laser whose emission is modulated by ultrasound is presented. The laser is usually micron-sized. In response to ultrasound modulation, the laser emission increases and decreases. Such a change in emission can be detected by external optical detectors. This type of laser can be used as a new type of imaging modality, in which laser emission in combination with sound waves or ultrasound waves, is used for imaging Laser emission has a much narrower spectral linewidth and stronger intensity than fluorescence and therefore is able to achieve higher sensitivity, whereas sound waves are used to provide a better spatial resolution of the laser emission from the laser. In ultrasound modulated laser based imaging, multiple lasers can be placed inside cells or tissues.

Abstract: An electrolytic cell includes a cation exchange membrane, a cathode compartment, and an anode compartment. The cathode compartment includes a gas diffusion electrode and a flow channel element, in which the flow channel element is between the cation exchange membrane and the gas diffusion electrode, and has a plurality of flow channels arranged in parallel with each other. The anode compartment includes an anode mesh, in which the cation exchange membrane is between the anode mesh and the flow channel element. A distance between the anode mesh and the gas diffusion electrode is substantially equal to the sum of a first thickness of the cation exchange membrane and a second thickness of the flow channel element. The novel electrolytic cell can combine with a chloralkali electrolytic cell to deal with gaseous CO2 and produce products, e.g., synthesis gas, for other purposes.

Abstract: An optical fiber connector includes a connecting unit, an adapter unit, and an attenuation unit. The adapter unit includes an insertion seat connected removably to a main housing of the connecting unit, and two guide frame bodies located respectively at two opposite sides of the insertion seat in a transverse direction. The insertion seat has two insertion holes spaced apart in the transverse direction and extending in a front-rear direction. Each guide frame body extends in the front-rear direction away from the connecting unit. The attenuation unit includes two attenuation components, two rear ferrules, and two front ferrules. The attenuation components are arranged in the transverse direction and disposed within the main housing. The rear ferrules respectively extend rearwardly from rear ends of the attenuation components into the insertion holes. The front ferrules respectively extend forwardly from front ends of the attenuation components through and outwardly of the main housing.

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

Abstract: The application relates to a method for developing the agitation system of a scale-up polymerization vessel. A simulated prediction model is obtained by use of a small polymerization vessel and by integrating Taguchi experimental design method with artificial intelligence (AI) neural network. Accordingly, vessel parameters for the agitation system of a scale-up polymerization vessel can be rapidly and accurately predicted based on simulation qualities thereof, further facilitating a construction of the agitation system of a scale-up polymerization vessel.

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

Abstract: An electronic device display may have an active area with pixels. An optical sensor may be formed under a sensor region in the active area. During operation, ambient light and/or other light associated with the optical sensor may pass through the sensor region. To ensure that the light for the optical sensor can pass through the display, the display may have one or more layers with sensor openings such as a metal layer and a pressure sensitive adhesive layer that attaches the metal layer to the pixels of the display. To help minimize visibility of the openings in the sensor region, the pressure sensitive adhesive layer may be configured to have a reflectivity that matches the appearance of the display in the sensor region to surrounding areas. Undesired light output uniformity can be reduced by ensuring that the substrate material in the display has a low light absorption coefficient.

Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

Abstract: Disclosed are composites comprising copper foils having at least one smooth surface and an adhesive layer with low Dk and Df properties. Also disclosed are copper clad laminates made by laminating the present composites with flexible or rigid substrates that exhibit heat resistance and good to excellent bonding strength. The PCBs made therefrom exhibit low insertion loss and may be assembled with other components to form various electrical devices utilizing high speed of at least 1 Gps or high frequency signals of at least 1 GHz.

Abstract: A UE performs up to a threshold number of attempts to transmit a default capability message to a base station, the default capability message representing a default set of CA combinations supported by the UE. If transmission is unsuccessful, the UE switches to a compact capability mode in which the UE attempts to transmit compacted UE capability messages representing successively smaller subsets of the default set of CA combinations until either a capability message is successfully received by the base station or a second threshold number of unsuccessful transmission attempts is performed. To facilitate configuration of an initial compacted capability message, the UE maintains a PC list that lists one or more cells that have been identified previously as incapable of receiving default-sized capability messages and that further identifies a representation of a limited subset of CA combinations to include in capability messages sent to a corresponding listed cell.

Abstract: An electronic device display may have an active area with pixels. An optical sensor may be formed under a sensor region in the active area. During operation, ambient light and/or other light associated with the optical sensor may pass through the sensor region. To ensure that the light for the optical sensor can pass through the display, the display may have one or more layers with sensor openings such as a metal layer and a pressure sensitive adhesive layer that attaches the metal layer to the pixels of the display. To help minimize visibility of the openings in the sensor region, the pressure sensitive adhesive layer may be configured to have a reflectivity that matches the appearance of the display in the sensor region to surrounding areas. Undesired light output uniformity can be reduced by ensuring that the substrate material in the display has a low light absorption coefficient.

Abstract: The present invention relates to silicon-based powders and a method for producing the silicon-based powders. The method for producing the silicon-based powders includes a hydrolysis step of a silicon precursor having an alkoxy group, a condensation step and a drying step. By a specific weight ratio of water to the silicon precursor having the alkoxy group and a silicon precursor having a secondary amino group and an alkyl group, in the method for producing the silicon-based powders, the condensation step can be performed without organic solvents, and a modification on silicon-based gels can be performed to enhance a safety of processes and a hydrophobicity of the resulted silicon-based powders, and decrease a thermal conductivity and a bulk density of the resulted silicon-based powders.

Abstract: The present invention relates to a fiber composite material and a method for producing the fiber composite material. The method for producing the fiber composite material includes a hydrolysis step of a silicon precursor having an alkoxy group, an in-situ condensation step and a drying step. A specific silicon precursor having a secondary amino group and alkyl groups is used therein, as well as a specific weight ratio of the silicon precursor to a fiber material, the in-situ condensation step can be performed in the absence of organic solvents in the method for producing the fiber composite material, and a hydrophobic modification on silicon-based gels can be performed, thereby simplifying the process, decreasing a thermal conductivity of the resulted fiber composite material and preventing drop dust of the resulted fiber composite material.

Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

Abstract: A large area deposition type additive manufacturing equipment is disclosed. The large area deposition type additive manufacturing equipment includes a light source module, a dynamic photomask module, a raw material tank and a deposition module. The light source module includes a plurality of light emitting members, a light diffusion member, a light enhancement member and a light emitting angle limiter. Light emitted from the light emitting members passes through the light diffusion member, the light enhancement member and the light emitting angle limiter to become a collimated curing light. The collimated curing light travels through a transparent member of the raw material tank and a dynamic photomask module to reach liquid photocurable material in the raw material tank, thereby curing the liquid photocurable material. The angle of emitted light ranges within ±30° with respect to a normal line of an incident plane of the light source module.