Patents by Inventor Yu-Cheng Shen

Yu-Cheng Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961724
    Abstract: The present disclosure provides a thin-film-deposition equipment with shielding device, which includes a reaction chamber, a carrier and a shielding device, wherein a portion of the shielding device and the carrier are disposed within the reaction chamber. The shielding device includes a first-shield member, a second-shield member and a driver. The driver interconnects the first-shield member and the second-shield member, for driving the first-shield member and the second-shield member to move in opposite directions. During a deposition process, the driver swings the shield members away from each other into an open state. During a cleaning process, the driver swings the shield members toward each other into a shielding state for covering the carrier, such that to prevent polluting the carrier during the process of cleaning the thin-film-deposition equipment.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: April 16, 2024
    Assignee: SKY TECH INC.
    Inventors: Jing-Cheng Lin, Yu-Te Shen
  • Patent number: 11953738
    Abstract: The present invention discloses a display including a display panel and a light redirecting film disposed on the viewing side of the display panel. The light redirecting film comprises a light redistribution layer, and a light guide layer disposed on the light redistribution layer. The light redistribution layer includes a plurality of strip-shaped micro prisms extending along a first direction and arranged at intervals and a plurality of diffraction gratings arranged at the bottom of the intervals between the adjacent strip-shaped micro prisms, wherein each of the strip-shaped micro prisms has at least one inclined light-guide surface, and the bottom of each interval has at least one set of diffraction gratings, and the light guide layer is in contact with the strip-shaped micro prisms and the diffraction gratings.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: April 9, 2024
    Assignee: BenQ Materials Corporation
    Inventors: Cyun-Tai Hong, Yu-Da Chen, Hsu-Cheng Cheng, Meng-Chieh Wu, Chuen-Nan Shen, Kuo-Jung Huang, Wei-Jyun Chen, Yu-Jyuan Dai
  • Publication number: 20240113345
    Abstract: A battery module and a short protection method thereof are provided. The battery module has a battery cell pack and a control circuit. The method includes: detecting a temperature of the battery cell pack as a battery cell temperature through the control circuit; determining whether the battery cell temperature shows a downward trend when the battery cell temperature is higher than a first predetermined temperature value; and deactivating the battery module when the battery cell temperature does not show the downward trend.
    Type: Application
    Filed: May 23, 2023
    Publication date: April 4, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Chunyen Lai, Yu-Cheng Shen, Chun Tsao, Chaochan Tan, Huichuan Lo, Wen-Che Chung, Ming Hung Yao
  • Publication number: 20240086109
    Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a write command from a host system, and the write command including first data; checking a status of a first physical programming unit in a first physical erasing unit; in response to the status of the first physical programming unit being a first status, sending a first command sequence to a rewritable non-volatile memory module, and the first command sequence being configured to instruct the rewritable non-volatile memory module to store at least part of the first data to the first physical programming unit.
    Type: Application
    Filed: October 17, 2022
    Publication date: March 14, 2024
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei-Cheng Li, Yu-Chung Shen, Jia-Li Xu, Ping-Cheng Chen
  • Publication number: 20240079263
    Abstract: A wafer container includes a frame, a door and at least a pair of shelves. The frame has opposite sidewalls. The pair of the shelves are respectively disposed and aligned on the opposite sidewalls of the frame. Various methods and devices are provided for holding at least one wafer to the shelves during transport.
    Type: Application
    Filed: February 22, 2023
    Publication date: March 7, 2024
    Inventors: Kai-Hung HSIAO, Chi-Chung JEN, Yu-Chun SHEN, Yuan-Cheng KUO, Chih-Hsiung HUANG, Wen-Chih CHIANG
  • Publication number: 20240068089
    Abstract: The invention provides a deposition equipment with a shielding mechanism, which includes a reaction chamber, a carrier, a cover ring and a shielding mechanism. The shielding mechanism includes a first bearing arm, a second bearing arm, a first shielding plate and a second shielding plate. The first and second shielding plates are respectively placed on the first and second bearing arms. There are corresponding alignment units between the lower surface of the first and second shielding plates and the upper surface the carrier, so that the first and second shielding plates can be aligned with the carrier. There is also a corresponding alignment unit between the upper surface of the first and second shielding plates and the lower surface the cover ring, so that the cover ring can be aligned with the first and second shielding plates to define a cleaning space in the reaction chamber.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: JING-CHENG LIN, YU-TE SHEN
  • Patent number: 11835982
    Abstract: A portable computing device including a central processing unit (CPU) and a controller is provided. The controller is coupled between the CPU, a graphics processing unit, and a battery module. The controller determines whether to adjust performance of the CPU and the graphics processing unit according to at least one of a battery capacity, a battery power, a battery current, a battery voltage, or a battery temperature of the battery module.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: December 5, 2023
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Hao-Hsuan Lin, Yu-Hsiu Su, Chun-Nan Wang, Jia-Ying Wu, Chia-Sen Chang, Yu-Cheng Shen, Shih-Hsiang Kao
  • Patent number: 11822405
    Abstract: The present disclosure provides a power allocating system, including adapters and an electronic device. Each of the adapters includes a processor. The electronic device includes a controller. The controller obtains rated information and current output information from each of the processors to calculate an output utilization rate of each of the adapters. The controller transmits at least one adjusting signal to at least one of the processors according to the output utilization rates to adjust the output utilization rate of the adapters.
    Type: Grant
    Filed: November 26, 2020
    Date of Patent: November 21, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Tzu-Nan Cheng, Yu-Cheng Shen
  • Publication number: 20230369464
    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of work function metal layers and an oxygen absorbing layer over a channel region of the semiconductor device, including forming a first work function metal layer over the channel region, forming an oxygen absorbing layer over the first work function metal layer, forming a second work function metal layer over the oxygen absorbing layer. A gate electrode metal layer is formed over the plurality of work function metal layers. The work function metal layers, oxygen absorbing layer, and gate electrode metal layer are made of different materials.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 16, 2023
    Inventors: Yu-Cheng SHEN, Guan-Jie SHEN
  • Patent number: 11757023
    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of work function metal layers and an oxygen absorbing layer over a channel region of the semiconductor device, including forming a first work function metal layer over the channel region, forming an oxygen absorbing layer over the first work function metal layer, forming a second work function metal layer over the oxygen absorbing layer. A gate electrode metal layer is formed over the plurality of work function metal layers. The work function metal layers, oxygen absorbing layer, and gate electrode metal layer are made of different materials.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: September 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Cheng Shen, Guan-Jie Shen
  • Publication number: 20230132175
    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of work function metal layers and an oxygen absorbing layer over a channel region of the semiconductor device, including forming a first work function metal layer over the channel region, forming an oxygen absorbing layer over the first work function metal layer, forming a second work function metal layer over the oxygen absorbing layer. A gate electrode metal layer is formed over the plurality of work function metal layers. The work function metal layers, oxygen absorbing layer, and gate electrode metal layer are made of different materials.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Inventors: Yu-Cheng SHEN, Guan-Jie SHEN
  • Publication number: 20230023668
    Abstract: A battery device and a battery protection method for same are provided. It is determined, according to electrical capacity of a battery, whether a battery device communicates with an electronic device, and whether the battery is being charged or discharged, whether to control the battery device to enter a shutdown mode.
    Type: Application
    Filed: July 11, 2022
    Publication date: January 26, 2023
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Chunyen Lai, Yu-Cheng Shen, Chieh-Ju Yang, Chun Tsao, Chaochan Tan, Huichuan Lo
  • Patent number: 11538926
    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of work function metal layers and an oxygen absorbing layer over a channel region of the semiconductor device, including forming a first work function metal layer over the channel region, forming an oxygen absorbing layer over the first work function metal layer, forming a second work function metal layer over the oxygen absorbing layer. A gate electrode metal layer is formed over the plurality of work function metal layers. The work function metal layers, oxygen absorbing layer, and gate electrode metal layer are made of different materials.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: December 27, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Cheng Shen, Guan-Jie Shen
  • Publication number: 20220336585
    Abstract: The present disclosure describes a semiconductor device and methods for forming the same. The semiconductor device includes nanostructures on a substrate and a source/drain region in contact with the nanostructures. The semiconductor device also includes a gate structure that includes first and second portions. The first portion is formed between each nanostructure of nanostructures. The second portion is formed under the bottom-most nanostructure of the plurality of nanostructures and extends under a top surface of the substrate.
    Type: Application
    Filed: September 8, 2021
    Publication date: October 20, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Cheng Shen, Guan-Jie Shen
  • Publication number: 20220298634
    Abstract: An apparatus for manufacturing a semiconductor device may include a chamber, a chuck provided in the chamber, and a biased power supply physically connected with the chuck. The apparatus may include a target component provided over the chuck and the biased power supply, and a magnetron assembly provided over the target component. The magnetron assembly may include a plurality of outer magnetrons and a plurality of inner magnetrons, and a spacing between each adjacent magnetrons of the plurality of outer magnetrons may be different from a spacing between each adjacent magnetrons of the plurality of inner magnetrons.
    Type: Application
    Filed: March 18, 2021
    Publication date: September 22, 2022
    Inventors: Yu-Ting TSAI, Chung-Liang CHENG, Wen-Cheng CHENG, Che-Hung LIU, Yu-Cheng SHEN, Chyi-Tsong NI
  • Publication number: 20220283627
    Abstract: A portable computing device including a central processing unit (CPU) and a controller is provided. The controller is coupled between the CPU, a graphics processing unit, and a battery module. The controller determines whether to adjust performance of the CPU and the graphics processing unit according to at least one of a battery capacity, a battery power, a battery current, a battery voltage, or a battery temperature of the battery module.
    Type: Application
    Filed: February 10, 2022
    Publication date: September 8, 2022
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Hao-Hsuan Lin, Yu-Hsiu Su, Chun-Nan Wang, Jia-Ying Wu, Chia-Sen Chang, Yu-Cheng Shen, Shih-Hsiang Kao
  • Patent number: 11211479
    Abstract: A method of fabricating a trimmed fin includes: forming a preliminary fin including silicon and germanium protruding from a substrate, in which the preliminary fin has a first germanium concentration at a top surface of the preliminary fin and a second germanium concentration at a position beneath the top surface of the preliminary fin, and the first germanium concentration is less than the second germanium concentration; oxidizing an exposed surface of the preliminary fin to form a trimmed fin covered by an oxide layer; and removing the oxide layer to obtain the trimmed fin.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: December 28, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACIURING CO., LTD.
    Inventors: Yu-Cheng Shen, Guan-Jie Shen
  • Publication number: 20210313454
    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of work function metal layers and an oxygen absorbing layer over a channel region of the semiconductor device, including forming a first work function metal layer over the channel region, forming an oxygen absorbing layer over the first work function metal layer, forming a second work function metal layer over the oxygen absorbing layer. A gate electrode metal layer is formed over the plurality of work function metal layers. The work function metal layers, oxygen absorbing layer, and gate electrode metal layer are made of different materials.
    Type: Application
    Filed: April 1, 2020
    Publication date: October 7, 2021
    Inventors: Yu-Cheng SHEN, Guan-Jie SHEN
  • Publication number: 20210173459
    Abstract: The present disclosure provides a power allocating system, including adapters and an electronic device. Each of the adapters includes a processor. The electronic device includes a controller. The controller obtains rated information and current output information from each of the processors to calculate an output utilization rate of each of the adapters. The controller transmits at least one adjusting signal to at least one of the processors according to the output utilization rates to adjust the output utilization rate of the adapters.
    Type: Application
    Filed: November 26, 2020
    Publication date: June 10, 2021
    Inventors: Tzu-Nan CHENG, Yu-Cheng SHEN
  • Patent number: 10719111
    Abstract: A multiport connector and a power control method are provided. The multiport connector comprises a power output port and multiple power input ports. The power output port is connected to an electronic device. The power input ports are connected to multiple power adapters to form multiple power transmission paths. Each power transmission path comprises a power line, a detecting circuit and an impedance component connected to the detecting circuit in series. Therefore, when the electronic device is connected to the multiport connector, the electronic device detects the equivalent impedance formed by the impedance components on the detecting circuits to adjust an upper limit of load power.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: July 21, 2020
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Yu Hung, Yu-Cheng Shen, Tzu-Nan Cheng