Abstract: The invention discloses a power supply with a frequency conversion function. The power supply is connected with a motherboard. The power supply includes a pulse width modulation (PWM) controller, a direct current-direct current (DC-DC) converter, and a switch resistor modulation circuit. The PWM controller generates a PWM signal. The DC-DC converter is connected with the PWM controller and the motherboard, and it generates a plurality of voltages to the motherboard after it receives the PWM signal. The switch resistor modulation circuit provides a first resistance value and a second resistance value switched to correspondingly generate a first switching frequency or a second switching frequency. The second resistance value is larger than the first resistance value. The second switching frequency is smaller than the first switching frequency.

Abstract: A computer includes a computer case, a motherboard, a cable box, a power supply and a peripheral component. The computer case has a first disk drive slot and a second disk drive slot within the inner portion thereof. The cable box is installed in the first disk drive slot. The power supply is connected with the cable box through a power cord. The peripheral component is installed in the second disk drive slot, wherein electricity is transmitted from the power supply to the peripheral component through the cable box.

Abstract: A switch power supply includes an AC/DC converter, a DC/DC converter, a battery charge-discharge switching circuit, and a detecting and controlling circuit. The AC/DC converter receives an input AC voltage and converts the input AC voltage into a DC voltage. The DC/DC converter converts the DC voltage into several working voltages required for operating the electronic device. The battery charge-discharge switching circuit is selectively connected to the AC/DC converter or the DC/DC converter and connected to the battery. The detecting and controlling circuit detects the input AC voltage. If the input AC voltage is abnormal, the detecting and controlling circuit issues a control signal to the battery charge-discharge switching circuit. In response to the control signal, the battery issues a discharge voltage to the DC/DC converter and the discharge voltage is converted into the working voltages by the DC/DC converter.

Abstract: A power detection jack can be connected with a plurality of power output jacks respectively to receive different power levels. Each of the power output jacks has a first insulation element, and the lengths of the first insulation elements are different from each other. The power detection jack includes a first electrode, a second electrode and a power detection element. The first electrode is disposed inside the power detection jack. The second electrode is disposed outside the power detection jack. The power detection element is disposed between the first electrode and the second electrode. When the power detection jack is connected with one of the power output jacks, the power level provided by the power output jack is determined according to a connection state of the power detection element and the first insulation element.

Abstract: A device and method for block code error correction. The device includes a block code input unit, an erasing address table, an error table and a decoder. The block code input unit is used to input a block code. The erasing address table and the error table have a plurality of erasing entities and error entities in rows and columns, respectively. The decoder decodes the block code in a row direction based on the erasing address table to find data errors on rows and update the error table, and updates the erasing address table in the row direction according to a first determination principle. Next, the decoder decodes the block code in a column direction based on the erasing address table to find data errors on columns and update the error table, and updates the erasing address table in the column direction according to a second determination principle.

Abstract: A device and method for block code error correction. The device includes a block code input unit, an erasing address table, an error table and a decoder. The block code input unit is used to input a block code. The erasing address table and the error table have a plurality of erasing entities and error entities in rows and columns, respectively. The decoder decodes the block code in a row direction based on the erasing address table to find data errors on rows and update the error table, and updates the erasing address table in the row direction according to a first determination principle. Next, the decoder decodes the block code in a column direction based on the erasing address table to find data errors on columns and update the error table, and updates the erasing address table in the column direction according to a second determination principle.