Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a substrate and a seed layer on the substrate. The substrate includes a base and a composite layer encapsulating the base. The semiconductor structure also includes an epitaxial layer on the seed layer. The semiconductor structure also includes a semiconductor device on the epitaxial layer, and an interlayer dielectric layer on the epitaxial layer. The interlayer dielectric layer covers the semiconductor device. The semiconductor structure further includes a via structure that penetrates at least the composite layer of the substrate and is in contact with the base.

Abstract: A semiconductor structure and a method for forming the same are provided. A semiconductor structure includes a substrate, a seed layer on the substrate, an epitaxial layer on the seed layer, a first transistor on the epitaxial layer, an interlayer dielectric layer on the epitaxial layer, a dielectric pillar penetrating through the interlayer dielectric layer and the epitaxial layer, and a conductive liner disposed on a sidewall of the dielectric pillar. The conductive liner is electrically connected to the first transistor and the seed layer.

Abstract: A semiconductor structure includes a substrate, a gate electrode, a first dielectric layer, a gate metal layer, a source structure, and a drain structure. The first dielectric layer has a first opening exposing the gate electrode and a second opening, and the depth of the second opening is greater than the depth of the first opening. The gate metal layer conformally covers the top surface of the first dielectric layer, the first opening, and the second opening to serve as a gate field plate. A first portion of the gate metal layer at the bottom of the first opening is higher than a second portion of the gate metal layer at the bottom of the second opening. The source structure and the drain structure are disposed at opposite sides of the gate structure, wherein the second opening is disposed between the gate electrode and the drain structure.

Abstract: A semiconductor device includes and an active region and a peripheral region. The peripheral region includes a seal region. The semiconductor device includes a substrate and a seed layer one the substrate. The semiconductor device also includes a GaN-containing composite layer on the seed layer, and the GaN-containing composite layer is disposed in the active region and the peripheral region. The semiconductor device also includes a gate electrode, a source electrode and a drain electrode disposed on the GaN-containing composite layer within the active region. The source electrode and the drain electrode are disposed at two opposite sides of the gate electrode. The semiconductor device further includes a sealing structure, and the sealing structure includes a barrier structure and a seal component in the seal region. The barrier structure is disposed around the active region. The barrier structure penetrates the GaN-containing composite layer and the seed layer.

Abstract: A semiconductor structure is provided. The semiconductor structure includes: a substrate; a source structure and a drain structure disposed on the substrate; a gate structure disposed on the substrate and between the source structure and the drain structure; a first field plate disposed on the substrate; a first oxide layer disposed between the substrate and the first field plate; a second field plate disposed on the first field plate, wherein the second field plate is closer to the drain structure than the first field plate; a planarized second oxide layer disposed between the first oxide layer and the second field plate; and a third field plate disposed on the second field plate, wherein the third field plate is closer to the drain structure than the second field plate.

Abstract: A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes providing a substrate; forming a silicon layer on the substrate, wherein an edge region of the top surface of the substrate is exposed from the silicon layer; epitaxially growing a GaN-based semiconductor material on the silicon layer and the substrate to form a GaN-based semiconductor layer on the silicon layer and a plurality of GaN-based nodules on the edge region of the top surface of the substrate; and performing a first dry etch step to remove the GaN-based nodules, wherein performing the first dry etch step includes applying a first bias power that is equal to or higher than 1500 W.

Abstract: A semiconductor device includes a first composite III-V group compound semiconductor layer disposed on a composite substrate, and a second III-V group compound semiconductor layer disposed on the first composite III-V group compound semiconductor layer. The semiconductor device also includes a gate structure disposed on the second III-V group compound semiconductor layer, and a source electrode and a drain electrode disposed on the second III-V group compound semiconductor layer and at opposite sides of the gate structure. The semiconductor device further includes a field plate disposed between the gate structure and the drain electrode, and a conductive structure penetrating through the second III-V group compound semiconductor layer and the first composite III-V group compound semiconductor layer, wherein the field plate is electrically connected to the composite substrate through the conductive structure.

Abstract: A semiconductor device includes a base and a conductive layer to form a composite substrate. The conductive layer covers a surface of the base. The semiconductor device also includes a dielectric layer covering the conductive layer. The conductive layer is disposed between the dielectric layer and the base. The semiconductor device further includes a GaN-containing composite layer, a gate electrode disposed over the GaN-containing composite layer, a source electrode and a drain electrode disposed on the GaN-containing composite layer. The source electrode and the drain electrode are disposed at two opposite sides of the gate electrode. In addition, a method for manufacturing the semiconductor device with a composite substrate is provided.

Abstract: A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes providing a substrate; forming a silicon layer on the substrate, wherein an edge region of the top surface of the substrate is exposed from the silicon layer; epitaxially growing a GaN-based semiconductor material on the silicon layer and the substrate to form a GaN-based semiconductor layer on the silicon layer and a plurality of GaN-based nodules on the edge region of the top surface of the substrate; and performing a first dry etch step to remove the GaN-based nodules, wherein performing the first dry etch step includes applying a first bias power that is equal to or higher than 1500 W.

Abstract: A semiconductor structure includes a substrate, a gate electrode, a first dielectric layer, a gate metal layer, a source structure, and a drain structure. The first dielectric layer has a first opening exposing the gate electrode and a second opening, and the depth of the second opening is greater than the depth of the first opening. The gate metal layer conformally covers the top surface of the first dielectric layer, the first opening, and the second opening to serve as a gate field plate. A first portion of the gate metal layer at the bottom of the first opening is higher than a second portion of the gate metal layer at the bottom of the second opening. The source structure and the drain structure are disposed at opposite sides of the gate structure, wherein the second opening is disposed between the gate electrode and the drain structure.

Abstract: A semiconductor device includes a first composite III-V group compound semiconductor layer disposed on a composite substrate, and a second III-V group compound semiconductor layer disposed on the first composite III-V group compound semiconductor layer. The semiconductor device also includes a gate structure disposed on the second III-V group compound semiconductor layer, and a source electrode and a drain electrode disposed on the second III-V group compound semiconductor layer and at opposite sides of the gate structure. The semiconductor device further includes a field plate disposed between the gate structure and the drain electrode, and a conductive structure penetrating through the second III-V group compound semiconductor layer and the first composite III-V group compound semiconductor layer, wherein the field plate is electrically connected to the composite substrate through the conductive structure.

Abstract: A method for manufacturing a semiconductor device structure is provided. The method includes providing a base substrate and forming a buffer layer on the base substrate. The method also includes forming a patterned silicon layer on the buffer layer. The patterned silicon layer has an opening to expose a portion of the buffer layer. The method further includes epitaxially growing a patterned channel layer and a patterned barrier layer on a top surface of the patterned silicon layer sequentially. In addition, the method includes forming a gate electrode on the patterned barrier layer.

Abstract: A HEMT includes a buffer layer disposed on the substrate. A barrier layer is disposed on the buffer layer. A channel layer is disposed in the buffer layer adjacent to an interface of the buffer layer and the barrier layer. A band adjustment layer is disposed on the barrier layer, including a first band adjustment layer, a second band adjustment layer, and a third band adjustment layer from top to bottom. A passivation layer is disposed on the barrier layer adjoining the band adjustment layer. A gate electrode is disposed on the band adjustment layer. Source/drain electrodes are disposed on opposite sides of the gate electrode on the barrier layer through the passivation layer. The first band adjustment layer, the second band adjustment layer, and the third band adjustment layer include N-type doped, undoped, and P-type doped III-V or II-VI semiconductors, respectively.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a first III-V group compound semiconductor layer disposed on the substrate. The first III-V group compound semiconductor layer includes a fin structure having a top surface, a first sidewall, and a second sidewall opposite to the first sidewall. The semiconductor device also includes a second III-V group compound semiconductor layer disposed on the first III-V group compound semiconductor layer. The first III-V group compound semiconductor layer and the second III-V group compound semiconductor layer are made of different materials. The semiconductor device also includes a gate electrode disposed on the second III-V group compound semiconductor layer.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a first III-V group compound semiconductor layer disposed on the substrate. The first III-V group compound semiconductor layer includes a fin structure having a top surface, a first sidewall, and a second sidewall opposite to the first sidewall. The semiconductor device also includes a second III-V group compound semiconductor layer disposed on the first III-V group compound semiconductor layer. The first III-V group compound semiconductor layer and the second III-V group compound semiconductor layer are made of different materials. The semiconductor device also includes a gate electrode disposed on the second III-V group compound semiconductor layer.

Abstract: A method of fabricating a semiconductor structure includes forming a GaN-based semiconductor layer on a substrate, forming a silicon-containing insulating layer on the GaN-based semiconductor layer, forming a recess in the silicon-containing insulating layer in a first etching step, wherein the first etching step is performed by using a fluorine-containing etchant and applying a first bias power, and enlarging the recess to extend into the GaN-based semiconductor layer in a second etching step, wherein the second etching step is performed by using the same fluorine-containing etchant as the first etching step and applying a second bias power that is greater than the first bias power. In addition, a method of fabricating a high electron mobility transistor is provided.

Abstract: A high electron mobility transistor (HEMT) structure including a substrate, a barrier layer, a buffer layer, a source, a drain, a multi-gate structure, and a multi-field plate structure is provided. The barrier layer is disposed over the substrate. The buffer layer is disposed between the substrate and the barrier layer, and includes a channel region adjacent to an interface between the barrier layer and the buffer layer. The source and the drain are disposed on the barrier layer. The multi-gate structure is disposed between the source and the drain, and includes first conductive finger portions spaced apart from each other. The multi-field plate structure is disposed between the multi-gate structure and the drain, and includes second conductive finger portions spaced apart from each other. The first conductive finger portions and the second conductive finger portions are in an alternate and parallel arrangement.

Abstract: A semiconductor structure includes a substrate, a semiconductor device in the substrate, and an isolating structure in the substrate and adjacent to the semiconductor device. The isolating structure has a roughness surface at a sidewall of the isolating structure, and the roughness surface includes carbon atoms thereon.

Abstract: A semiconductor structure includes a substrate, a semiconductor device in the substrate, and an isolating structure in the substrate and adjacent to the semiconductor device. The isolating structure has a roughness surface at a sidewall of the isolating structure, and the roughness surface includes carbon atoms thereon.

Abstract: A multimedia storage apparatus comprises a demultiplexer, a stream converter, and a memory. The demultiplexer separates A/V data and auxiliary data from a first stream, while the stream converter converts the A/V data into a second stream. The memory then stores the auxiliary data. A multimedia storage method comprises the following steps: separating A/V data and auxiliary data from a first stream; converting the A/V data into a second stream; and storing the auxiliary data for display.