Patents by Inventor Yu-Chieh Wang

Yu-Chieh Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240161818
    Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 16, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu-Feng Chang, Chun-Chieh Chang
  • Patent number: 11983848
    Abstract: Aspects of the disclosure provide a frame processor for processing frames with aliasing artifacts. For example, the frame processor can include a super-resolution (SR) and anti-aliasing (AA) engine and an attention reference frame generator coupled to the SR and AA engine. The SR and AA engine can be configured to enhance resolution and remove aliasing artifacts of a frame to generate a first high-resolution frame with aliasing artifacts and a second high-resolution frame with aliasing artifacts removed. The attention reference frame generator can be configured to generate an attention reference frame based on the first high-resolution frame and the second high-resolution frame.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: May 14, 2024
    Assignee: MEDIATEK INC.
    Inventors: Cheng-Lung Jen, Pei-Kuei Tsung, Chih-Wei Chen, Yao-Sheng Wang, Shih-Che Chen, Yu-Sheng Lin, Chih-Wen Goo, Shih-Chin Lin, Tsung-Shian Huang, Ying-Chieh Chen
  • Publication number: 20240144056
    Abstract: A method includes: obtaining impact values for characteristic conditions; selecting training data subsets respectively from training data sets according to the impact values; obtaining a candidate model and an evaluation value based on the training data subsets; supplementing the training data subsets according to the impact values; obtaining another candidate model and another evaluation value based on training data subsets thus supplemented; repeating the step of supplementing the training data subset, and the step of obtaining another candidate model and another evaluation value based on the training data subsets thus supplemented; and selecting one of the candidate models as a prediction model based on the evaluation values.
    Type: Application
    Filed: August 2, 2023
    Publication date: May 2, 2024
    Applicants: TAIPEI VETERANS GENERAL HOSPITAL
    Inventors: Chin-Chou Huang, Ming-Hui Hung, Ling-Chieh Shih, Yu-Ching Wang, Han Cheng, Yu-Chieh Shiao, Yu-Hsuan Tseng
  • Publication number: 20240141922
    Abstract: A heat dissipation system of an electronic device including a body, a plurality of heat sources disposed in the body, and at least one centrifugal heat dissipation fan disposed in the body is provided. The centrifugal heat dissipation fan includes a housing and an impeller disposed in the housing on an axis. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions, and the plurality of outlets respectively correspond to the plurality of heat sources.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Applicant: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Chun-Chieh Wang, Shu-Hao Kuo
  • Publication number: 20240134155
    Abstract: An imaging optical lens assembly includes four lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element and a fourth lens element. Each of the four lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. At least one of all lens surfaces of the four lens elements is aspheric and has at least one inflection point.
    Type: Application
    Filed: October 9, 2023
    Publication date: April 25, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Yu-Tai TSENG, Yu-Chun KE, Kuo-Jui WANG, Tzu-Chieh KUO
  • Patent number: 11964881
    Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 23, 2024
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan, Chung-Kai Chang, Chi-Shih Chen, Yu-Ting Cheng
  • Patent number: 11960899
    Abstract: An information handling system includes multiple dual in-line memory modules (DIMMs) and a basic input/output system (BIOS). The DIMMs form a memory system of the information handling system. The BIOS begins a system boot of the information handling system, and performs a first memory reference code training. Based on the first memory reference code training, the BIOS discovers a bad DIMM of the DIMMs, and stores information associated with the bad DIMM. The BIOS reboots the information handling system. During the reboot, the BIOS retrieves the information associated with the bad DIMM. The BIOS disables a slot associated with the bad DIMM. In response to the slot being disabled, the BIOS performs a second memory reference code training. Based on the second memory reference code training, the BIOS downgrades the memory system to a closest possible DIMM population.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: April 16, 2024
    Assignee: Dell Products L.P.
    Inventors: Ching-Lung Chao, Hsin-Chieh Wang, Wei G. Liu, Yu-Hsuan Chou
  • Fan
    Patent number: 11946483
    Abstract: A fan is provided herein, including a housing, a hub, and a plurality of blades. The housing includes a top case and a bottom case. The hub is rotatably disposed between the top case and the bottom case in an axial direction. The blades extend from the hub in a radial direction, located between the top case and the bottom case. Each of the blades has a proximal end and a distal end. The proximal end is connected to the hub. The distal end is opposite from the proximal end, located at the other side of the blade, having at least one recessed portion. Each of the recessed portions form a passage for air.
    Type: Grant
    Filed: May 17, 2023
    Date of Patent: April 2, 2024
    Assignee: ACER INCORPORATED
    Inventors: Jau-Han Ke, Tsung-Ting Chen, Chun-Chieh Wang, Yu-Ming Lin, Cheng-Wen Hsieh, Wen-Neng Liao
  • Publication number: 20240107414
    Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Yu-Chieh HUANG, Kuhn-Chang LIN, Jen-Chun CHANG, Wen-Hsin HSIA, Chia-Jou LU, Sheng-Chih WANG, Chenghsin LIN, Yeong Leong CHOO, Chun-Hsiang CHIU, Chihhung HSIEH, Kai-Chun CHENG, Chung Wei LIN
  • Patent number: 11942396
    Abstract: A heterogeneous integration semiconductor package structure including a heat dissipation assembly, multiple chips, a package assembly, multiple connectors and a circuit substrate is provided. The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface. The chips are disposed on the connection surface of the heat dissipation assembly and electrically connected to the first redistribution structure layer. The package assembly surrounds the chips and includes a second redistribution structure layer disposed on a lower surface and multiple conductive vias electrically connected to the first redistribution structure layer and the second redistribution structure layer. The connectors are disposed on the package assembly and electrically connected to the second redistribution structure layer.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: March 26, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Heng-Chieh Chien, Shu-Jung Yang, Yu-Min Lin, Chih-Yao Wang, Yu-Lin Chao
  • Publication number: 20240096630
    Abstract: Disclosed is a semiconductor fabrication method. The method includes forming a gate stack in an area previously occupied by a dummy gate structure; forming a first metal cap layer over the gate stack; forming a first dielectric cap layer over the first metal cap layer; selectively removing a portion of the gate stack and the first metal cap layer while leaving a sidewall portion of the first metal cap layer that extends along a sidewall of the first dielectric cap layer; forming a second metal cap layer over the gate stack and the first metal cap layer wherein a sidewall portion of the second metal cap layer extends further along a sidewall of the first dielectric cap layer; forming a second dielectric cap layer over the second metal cap layer; and flattening a top layer of the first dielectric cap layer and the second dielectric cap layer using planarization operations.
    Type: Application
    Filed: January 12, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Wei Yin, Tzu-Wen Pan, Yu-Hsien Lin, Yu-Shih Wang, Jih-Sheng Yang, Shih-Chieh Chao, Yih-Ann Lin, Ryan Chia-Jen Chen
  • Publication number: 20240088041
    Abstract: The present disclosure provides a semiconductor structure, including a substrate, a gate structure over the substrate, including a work function layer over the substrate, a dielectric layer at least partially surrounding the gate structure, and a capping layer over the gate structure, wherein a bottom of the capping layer includes at least one protrusion protruding toward the substrate.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 14, 2024
    Inventors: TSENG-CHIEH PAN, YU-HSIANG WANG, CHI-SHIN WANG, FAN-YI HSU
  • Publication number: 20240079434
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures.
    Type: Application
    Filed: January 5, 2023
    Publication date: March 7, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Chen-Jong Wang, Dun-Nian Yaung, Yu-Chun Chen
  • Patent number: 11916155
    Abstract: An optoelectronic package and a method for producing the optoelectronic package are provided. The optoelectronic package includes a carrier, a photonic device, a first encapsulant and a second encapsulant. The photonic device is disposed on the carrier. The first encapsulant covers the carrier and is disposed around the photonic device. The second encapsulant covers the first encapsulant and the photonic device. The first encapsulant has a topmost position and a bottommost position, and the topmost position is not higher than a surface of the photonic device.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: February 27, 2024
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chien-Hsiu Huang, Bo-Jhih Chen, Kuo-Ming Chiu, Meng-Sung Chou, Wei-Te Cheng, Kai-Chieh Liang, Yun-Ta Chen, Yu-Han Wang
  • Patent number: 11913472
    Abstract: A centrifugal heat dissipation fan including a housing and an impeller disposed in the housing on an axis is provided. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions. A heat dissipation system of an electronic device is also provided.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: February 27, 2024
    Assignee: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Chun-Chieh Wang, Shu-Hao Kuo
  • Patent number: 11916314
    Abstract: A mobile device includes a housing, a first radiation element, a second radiation element, a third radiation element, a first switch element, and a second switch element. The first radiation element has a first feeding point. The second radiation element has a second feeding point. The first radiation element, the second radiation element, and the third radiation element are distributed over the housing. The first switch element is closed or open, so as to selectively couple the first radiation element to the third radiation element. The second switch element is closed or open, so as to selectively couple the second radiation element to the third radiation element. An antenna structure is formed by the first radiation element, the second radiation element, and the third radiation element.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: February 27, 2024
    Assignee: HTC Corporation
    Inventors: Cheng-Hung Lin, Szu-Po Wang, Chia-Te Chien, Chun-Chieh Wang, Kang-Ling Li, Chun-Hsien Lee, Yu-Chieh Chiu
  • Publication number: 20240016828
    Abstract: In one aspect, the present disclosure provides GlcNAc-Asn analogs of the formula: wherein the variables are as defined herein. In another aspect, the present disclosure also provides pharmaceutical compositions and methods of using the compounds disclosed herein. Additionally, the present disclosure also provides methods of treating cancer comprising inhibiting NGLY1.
    Type: Application
    Filed: August 23, 2023
    Publication date: January 18, 2024
    Applicant: University of North Texas Health Science Center
    Inventors: Yu-Chieh WANG, Victor J.T. LIN, Ashwini Ashwini ZOLEKAR, Kyle A. EMMITTE, Nigam M. MISHRA, Jin LIU
  • Publication number: 20230357737
    Abstract: Certain embodiments are directed to modified or variant Cas9 proteins, and/or methods of using the same.
    Type: Application
    Filed: May 24, 2023
    Publication date: November 9, 2023
    Inventors: Jin LIU, Zhicheng ZUO, Yu-Chieh WANG
  • Patent number: 11779592
    Abstract: In one aspect, the present disclosure provides GlcNAc-Asn analogs of the formula (I): wherein the variables are as defined herein. In another aspect, the present disclosure also provides pharmaceutical compositions and methods of using the compounds disclosed herein. Additionally, the present disclosure also provides methods of treating cancer comprising inhibiting NGLY1.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: October 10, 2023
    Assignee: UNIVERSITY OF NORTH TEXAS HEALTH SCIENCE CENTER
    Inventors: Yu-Chieh Wang, Victor J. T. Lin, Ashwini Zolekar, Kyle A. Emmitte, Nigam M. Mishra, Jin Liu
  • Publication number: 20230304865
    Abstract: A non-contact body temperature measurement device includes a thermal imager, an anemometer and a processing unit. The thermal imager is provided to capture thermal images. The anemometer is provided to measure wind speed and output a wind speed signal. The processing unit is provided to process the thermal images according to the wind speed signal and remove the thermal image showing great variation in temperature between two consecutive frames. Consequently, an accurate body temperature can be measured through the processed thermal images.
    Type: Application
    Filed: July 28, 2022
    Publication date: September 28, 2023
    Inventors: Fu-Kang Wang, Pin-Hsun Juan, Ya-Chi Su, Yu-Chieh Wang, Ju-Yin Shih