Patents by Inventor Yu-Chih Tseng

Yu-Chih Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210129272
    Abstract: The present invention provides a solder for nickel based superalloy soldering. The solder includes 11 wt % to 13 wt % chromium, 5.0 wt % to 7.0 wt % aluminum, 3.5 wt % to 5.0 wt % molybdenum, 1.5 wt % to 2.5 wt % niobium, 0.4 wt % to 1.0 wt % titanium, 0.03 wt % to 0.07 wt % carbon, 0.05 wt %-0.15 wt % zirconium, 0.001 wt % to 0.1 wt % boron and remainder nickel or other inevitable impurities, thereby reducing occurrence of soldering hot cracking and insufficient weld bead strength in nickel based superalloy raw materials during soldering.
    Type: Application
    Filed: October 30, 2019
    Publication date: May 6, 2021
    Inventors: Chao-Yu Lin, Chao-Nan Wei, Chien-Hung Liao, Hui-Yun Po, Sheng-Long Lee, Yu-Chih Tseng, Vun-Shing Chengn
  • Publication number: 20210134853
    Abstract: A method for manufacturing a display device is disclosed, the method at least includes the following step: Firstly, a temporary substrate is provided, a hydrogen containing structure is formed on the temporary substrate, a polymer film is formed on the hydrogen containing structure, and a display element is formed on the polymer film. Afterwards, a laser beam process is performed, to focus a laser beam on the hydrogen containing structure, and the temporary substrate is then removed.
    Type: Application
    Filed: November 5, 2019
    Publication date: May 6, 2021
    Inventors: Hsin-Hao Huang, Sheng-Hui Chiu, Yu-Chih Tseng
  • Publication number: 20210098506
    Abstract: The present disclosure provides a flexible display device including a substrate, a first metal layer, a first insulating layer and a second insulating layer. The substrate includes an active region and a peripheral region adjacent to the active region. The first metal layer is disposed on the substrate. The first insulating layer is disposed on the first metal layer, and the first insulating layer includes a first via hole disposed in the peripheral region. The second insulating layer is disposed on the first insulating layer, and the second insulating layer includes a second via hole. In a top view direction of the flexible display device, the first via hole is disposed within the second via hole, and the second via hole exposes a portion of a top surface of the first insulating layer.
    Type: Application
    Filed: September 7, 2020
    Publication date: April 1, 2021
    Inventors: Kuo-Shun Tsai, Chu-Hong Lai, Yu-Chih Tseng
  • Publication number: 20210063802
    Abstract: An electronic device includes a first flexible substrate, a bonding pad and a first supporting film. The bonding pad is disposed on the first flexible substrate, and a first supporting film is attached to the first flexible substrate. The first supporting film has a first opening corresponding to the bonding pad.
    Type: Application
    Filed: August 3, 2020
    Publication date: March 4, 2021
    Inventors: Hsin-Hao Huang, Yu-Chih Tseng, Chu-Hong Lai
  • Publication number: 20210057461
    Abstract: A manufacturing method of an electronic device is provided. The method includes providing a dummy substrate. The method includes forming a conductive pattern on the dummy substrate. The method includes forming a flexible layer to cover the conductive pattern. Additionally, the method includes forming a circuit layer on the flexible layer. The method includes removing the dummy substrate.
    Type: Application
    Filed: July 29, 2020
    Publication date: February 25, 2021
    Inventors: Yu-Chia HUANG, Kuan-Feng LEE, Tsung-Han TSAI, Chu-Hong LAI, Yu-Chih TSENG
  • Publication number: 20200400994
    Abstract: A liquid crystal device comprises a first polymer substrate, a first buffer layer, thin film transistors, a liquid crystal layer and a second polymer substrate. The first buffer layer is disposed on the first polymer substrate. The thin film transistors are disposed on the first buffer layer. The liquid crystal layer is disposed on the thin film transistors. The second polymer substrate is disposed on the liquid crystal layer.
    Type: Application
    Filed: May 26, 2020
    Publication date: December 24, 2020
    Inventors: Yu-Chih Tseng, Kuo-Shun Tsai, Chuan-Ming Yeh, Chu-Hong Lai, Ker-Yih Kao
  • Publication number: 20200249514
    Abstract: A liquid crystal display device including a first flexible substrate, a plurality of first spacers, a second flexible substrate, a plurality of second spacers, and a liquid crystal layer is provided. The first spacers are disposed on the first flexible substrate, the second flexible substrate is disposed opposite to the first flexible substrate, the second spacers are disposed on the second flexible substrate, and the liquid crystal layer is disposed between the first flexible substrate and the second flexible substrate.
    Type: Application
    Filed: December 31, 2019
    Publication date: August 6, 2020
    Inventors: Yu-Chih Tseng, Chu-Hong Lai, Kuo-Shun Tsai, Chen-Shuo Hsieh
  • Publication number: 20200249516
    Abstract: A display device is provided and includes a first polymer substrate, a plurality of thin-film transistors, a second polymer substrate, and a liquid crystal layer. The thin-film transistors are disposed on the first polymer substrate. The second polymer substrate is disposed opposite to the first polymer substrate. The liquid crystal layer is disposed between the first polymer substrate and the second polymer substrate. The first polymer substrate has a first thickness, the second polymer substrate has a second thickness, and the first thickness is greater than the second thickness.
    Type: Application
    Filed: December 30, 2019
    Publication date: August 6, 2020
    Inventors: Yu-Chih Tseng, Chu-Hong Lai
  • Publication number: 20200140622
    Abstract: A method of preparing tunable inorganic patterned nanofeatures by infiltration of a block copolymer scaffold having a plurality of self-assembled periodic polymer microdomains. The method may be used sequential infiltration synthesis (SIS), related to atomic layer deposition (ALD). The method includes selecting a metal precursor that is configured to selectively react with the copolymer unit defining the microdomain but is substantially non-reactive with another polymer unit of the copolymer. A tunable inorganic features is selectively formed on the microdomain to form a hybrid organic/inorganic composite material of the metal precursor and a co-reactant. The organic component may be optionally removed to obtain an inorganic feature s with patterned nanostructures defined by the configuration of the microdomain.
    Type: Application
    Filed: December 19, 2019
    Publication date: May 7, 2020
    Applicant: UCHICAGO ARGONNE, LLC
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng, Qing Peng
  • Patent number: 10577466
    Abstract: A method of preparing tunable inorganic patterned nanofeatures by infiltration of a block copolymer scaffold having a plurality of self-assembled periodic polymer microdomains. The method may be used sequential infiltration synthesis (SIS), related to atomic layer deposition (ALD). The method includes selecting a metal precursor that is configured to selectively react with the copolymer unit defining the microdomain but is substantially non-reactive with another polymer unit of the copolymer. A tunable inorganic features is selectively formed on the microdomain to form a hybrid organic/inorganic composite material of the metal precursor and a co-reactant. The organic component may be optionally removed to obtain an inorganic feature s with patterned nanostructures defined by the configuration of the microdomain.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: March 3, 2020
    Assignee: UChicago Argonne, LLC
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng, Qing Peng
  • Patent number: 10571803
    Abstract: Simplified methods of multiple-patterning photolithography using sequential infiltration synthesis to modify the photoresist such that it withstands plasma etching better than unmodified resist and replaces one or more hard masks and/or a freezing step in MPL processes including litho-etch-litho-etch photolithography or litho-freeze-litho-etch photolithography.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: February 25, 2020
    Assignee: UChicago Argonne, LLC
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng
  • Publication number: 20170343896
    Abstract: Simplified methods of multiple-patterning photolithography using sequential infiltration synthesis to modify the photoresist such that it withstands plasma etching better than unmodified resist and replaces one or more hard masks and/or a freezing step in MPL processes including litho-etch-litho-etch photolithography or litho-freeze-litho-etch photolithography.
    Type: Application
    Filed: June 12, 2017
    Publication date: November 30, 2017
    Inventors: Seth B. DARLING, Jeffrey W. ELAM, Yu-Chih TSENG
  • Patent number: 9786511
    Abstract: A plasma etch resist material modified by an inorganic protective component via sequential infiltration synthesis (SIS) and methods of preparing the modified resist material. The modified resist material is characterized by an improved resistance to a plasma etching or related process relative to the unmodified resist material, thereby allowing formation of patterned features into a substrate material, which may be high-aspect ratio features. The SIS process forms the protective component within the bulk resist material through a plurality of alternating exposures to gas phase precursors which infiltrate the resist material. The plasma etch resist material may be initially patterned using photolithography, electron-beam lithography or a block copolymer self-assembly process.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: October 10, 2017
    Assignee: UCHICAGO ARGONNE, LLC
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng, Qing Peng
  • Patent number: 9684234
    Abstract: Simplified methods of multiple-patterning photolithography using sequential infiltration synthesis to modify the photoresist such that it withstands plasma etching better than unmodified resist and replaces one or more hard masks and/or a freezing step in MPL processes including litho-etch-litho-etch photolithography or litho-freeze-litho-etch photolithography.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: June 20, 2017
    Assignee: UCHICAGO ARGONNE, LLC
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng
  • Publication number: 20170137577
    Abstract: A method of preparing tunable inorganic patterned nanofeatures by infiltration of a block copolymer scaffold having a plurality of self-assembled periodic polymer microdomains. The method may be used sequential infiltration synthesis (SIS), related to atomic layer deposition (ALD). The method includes selecting a metal precursor that is configured to selectively react with the copolymer unit defining the microdomain but is substantially non-reactive with another polymer unit of the copolymer. A tunable inorganic features is selectively formed on the microdomain to form a hybrid organic/inorganic composite material of the metal precursor and a co-reactant. The organic component may be optionally removed to obtain an inorganic feature s with patterned nanostructures defined by the configuration of the microdomain.
    Type: Application
    Filed: October 24, 2016
    Publication date: May 18, 2017
    Applicant: UChicago Argonne, LLC
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng, Qing Peng
  • Patent number: 9487600
    Abstract: A method of preparing tunable inorganic patterned nanofeatures by infiltration of a block copolymer scaffold having a plurality of self-assembled periodic polymer microdomains. The method may be used sequential infiltration synthesis (SIS), related to atomic layer deposition (ALD). The method includes selecting a metal precursor that is configured to selectively react with the copolymer unit defining the microdomain but is substantially non-reactive with another polymer unit of the copolymer. A tunable inorganic features is selectively formed on the microdomain to form a hybrid organic/inorganic composite material of the metal precursor and a co-reactant. The organic component may be optionally removed to obtain an inorganic features with patterned nanostructures defined by the configuration of the microdomain.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: November 8, 2016
    Assignee: UChicago Argonne, LLC
    Inventors: Seth B. Darling, Jeffrey Elam, Yu-Chih Tseng, Qing Peng
  • Publication number: 20150255298
    Abstract: A plasma etch resist material modified by an inorganic protective component via sequential infiltration synthesis (SIS) and methods of preparing the modified resist material. The modified resist material is characterized by an improved resistance to a plasma etching or related process relative to the unmodified resist material, thereby allowing formation of patterned features into a substrate material, which may be high-aspect ratio features. The SIS process forms the protective component within the bulk resist material through a plurality of alternating exposures to gas phase precursors which infiltrate the resist material. The plasma etch resist material may be initially patterned using photolithography, electron-beam lithography or a block copolymer self-assembly process.
    Type: Application
    Filed: March 11, 2015
    Publication date: September 10, 2015
    Applicant: UCHICAGO ARGONNE LLC
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng, Qing Peng
  • Patent number: 8980418
    Abstract: A plasma etch resist material modified by an inorganic protective component via sequential infiltration synthesis (SIS) and methods of preparing the modified resist material. The modified resist material is characterized by an improved resistance to a plasma etching or related process relative to the unmodified resist material, thereby allowing formation of patterned features into a substrate material, which may be high-aspect ratio features. The SIS process forms the protective component within the bulk resist material through a plurality of alternating exposures to gas phase precursors which infiltrate the resist material. The plasma etch resist material may be initially patterned using photolithography, electron-beam lithography or a block copolymer self-assembly process.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: March 17, 2015
    Assignee: UChicago Argonne, LLC
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng, Qing Peng
  • Publication number: 20130256265
    Abstract: Simplified methods of multiple-patterning photolithography using sequential infiltration synthesis to modify the photoresist such that it withstands plasma etching better than unmodified resist and replaces one or more hard masks and/or a freezing step in MPL processes including litho-etch-litho-etch photolithography or litho-freeze-litho-etch photolithography.
    Type: Application
    Filed: May 24, 2013
    Publication date: October 3, 2013
    Applicant: UChicago Argonne LLC
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng
  • Publication number: 20120241411
    Abstract: A plasma etch resist material modified by an inorganic protective component via sequential infiltration synthesis (SIS) and methods of preparing the modified resist material. The modified resist material is characterized by an improved resistance to a plasma etching or related process relative to the unmodified resist material, thereby allowing formation of patterned features into a substrate material, which may be high-aspect ratio features. The SIS process forms the protective component within the bulk resist material through a plurality of alternating exposures to gas phase precursors which infiltrate the resist material. The plasma etch resist material may be initially patterned using photolithography, electron-beam lithography or a block copolymer self-assembly process.
    Type: Application
    Filed: March 22, 2012
    Publication date: September 27, 2012
    Inventors: Seth B. Darling, Jeffrey W. Elam, Yu-Chih Tseng, Qing Peng